From 7e59a5e0f9c92a8bf4a843067b389b8ae7dc82c0 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 20 Dec 2021 22:11:50 +0100 Subject: [PATCH] i2c: enforce all traits have the same Error type. --- CHANGELOG.md | 3 +++ src/i2c.rs | 70 +++++++++++++++++----------------------------------- 2 files changed, 25 insertions(+), 48 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 656efa373..42c99decc 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -13,6 +13,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ### Fixed - Fixed blanket impl of `DelayUs` not covering the `delay_ms` method. +### Changed +- `i2c`: traits now enforce all impls on the same struct have the same `Error` type. + ## [v1.0.0-alpha.6] - 2021-11-19 *** This is (also) an alpha release with breaking changes (sorry) *** diff --git a/src/i2c.rs b/src/i2c.rs index c20fd587d..3e8415ad5 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -22,14 +22,13 @@ //! Here is an example of an embedded-hal implementation of the `Write` trait //! for both modes: //! ``` -//! # use embedded_hal::i2c::{ErrorKind, SevenBitAddress, TenBitAddress, blocking::Write}; +//! # use embedded_hal::i2c::{ErrorKind, ErrorType, SevenBitAddress, TenBitAddress, blocking::Write}; //! /// I2C0 hardware peripheral which supports both 7-bit and 10-bit addressing. //! pub struct I2c0; //! +//! # impl ErrorType for I2c0 { type Error = ErrorKind; } //! impl Write for I2c0 //! { -//! # type Error = ErrorKind; -//! # //! fn write(&mut self, addr: u8, output: &[u8]) -> Result<(), Self::Error> { //! // ... //! # Ok(()) @@ -38,8 +37,6 @@ //! //! impl Write for I2c0 //! { -//! # type Error = ErrorKind; -//! # //! fn write(&mut self, addr: u16, output: &[u8]) -> Result<(), Self::Error> { //! // ... //! # Ok(()) @@ -184,6 +181,18 @@ impl core::fmt::Display for NoAcknowledgeSource { } } +/// I2C error type trait +/// +/// This just defines the error type, to be used by the other traits. +pub trait ErrorType { + /// Error type + type Error: Error; +} + +impl ErrorType for &mut T { + type Error = T::Error; +} + /// Address mode (7-bit / 10-bit) /// /// Note: This trait is sealed and should not be implemented outside of this crate. @@ -202,13 +211,10 @@ impl AddressMode for TenBitAddress {} /// Blocking I2C traits pub mod blocking { - use super::{AddressMode, Error, SevenBitAddress}; + use super::{AddressMode, ErrorType, SevenBitAddress}; /// Blocking read - pub trait Read { - /// Error type - type Error: Error; - + pub trait Read: ErrorType { /// Reads enough bytes from slave with `address` to fill `buffer` /// /// # I2C Events (contract) @@ -231,18 +237,13 @@ pub mod blocking { } impl> Read for &mut T { - type Error = T::Error; - fn read(&mut self, address: A, buffer: &mut [u8]) -> Result<(), Self::Error> { T::read(self, address, buffer) } } /// Blocking write - pub trait Write { - /// Error type - type Error: Error; - + pub trait Write: ErrorType { /// Writes bytes to slave with address `address` /// /// # I2C Events (contract) @@ -263,18 +264,13 @@ pub mod blocking { } impl> Write for &mut T { - type Error = T::Error; - fn write(&mut self, address: A, bytes: &[u8]) -> Result<(), Self::Error> { T::write(self, address, bytes) } } /// Blocking write (iterator version) - pub trait WriteIter { - /// Error type - type Error: Error; - + pub trait WriteIter: ErrorType { /// Writes bytes to slave with address `address` /// /// # I2C Events (contract) @@ -286,8 +282,6 @@ pub mod blocking { } impl> WriteIter for &mut T { - type Error = T::Error; - fn write_iter(&mut self, address: A, bytes: B) -> Result<(), Self::Error> where B: IntoIterator, @@ -297,10 +291,7 @@ pub mod blocking { } /// Blocking write + read - pub trait WriteRead { - /// Error type - type Error: Error; - + pub trait WriteRead: ErrorType { /// Writes bytes to slave with address `address` and then reads enough bytes to fill `buffer` *in a /// single transaction* /// @@ -332,8 +323,6 @@ pub mod blocking { } impl> WriteRead for &mut T { - type Error = T::Error; - fn write_read( &mut self, address: A, @@ -345,10 +334,7 @@ pub mod blocking { } /// Blocking write (iterator version) + read - pub trait WriteIterRead { - /// Error type - type Error: Error; - + pub trait WriteIterRead: ErrorType { /// Writes bytes to slave with address `address` and then reads enough bytes to fill `buffer` *in a /// single transaction* /// @@ -366,8 +352,6 @@ pub mod blocking { } impl> WriteIterRead for &mut T { - type Error = T::Error; - fn write_iter_read( &mut self, address: A, @@ -395,10 +379,7 @@ pub mod blocking { /// Transactional I2C interface. /// /// This allows combining operations within an I2C transaction. - pub trait Transactional { - /// Error type - type Error: Error; - + pub trait Transactional: ErrorType { /// Execute the provided operations on the I2C bus. /// /// Transaction contract: @@ -420,8 +401,6 @@ pub mod blocking { } impl> Transactional for &mut T { - type Error = T::Error; - fn exec<'a>( &mut self, address: A, @@ -434,10 +413,7 @@ pub mod blocking { /// Transactional I2C interface (iterator version). /// /// This allows combining operation within an I2C transaction. - pub trait TransactionalIter { - /// Error type - type Error: Error; - + pub trait TransactionalIter: ErrorType { /// Execute the provided operations on the I2C bus (iterator version). /// /// Transaction contract: @@ -457,8 +433,6 @@ pub mod blocking { } impl> TransactionalIter for &mut T { - type Error = T::Error; - fn exec_iter<'a, O>(&mut self, address: A, operations: O) -> Result<(), Self::Error> where O: IntoIterator>,