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i2c: implement all operations in terms of transaction.
1 parent 0a72e01 commit dd74149

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2 files changed

+28
-31
lines changed

2 files changed

+28
-31
lines changed

embedded-hal-async/src/i2c.rs

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,10 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
4141
/// - `MAK` = master acknowledge
4242
/// - `NMAK` = master no acknowledge
4343
/// - `SP` = stop condition
44-
async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error>;
44+
async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
45+
self.transaction(address, &mut [Operation::Read(read)])
46+
.await
47+
}
4548

4649
/// Writes bytes to slave with address `address`
4750
///
@@ -59,7 +62,10 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
5962
/// - `SAK` = slave acknowledge
6063
/// - `Bi` = ith byte of data
6164
/// - `SP` = stop condition
62-
async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error>;
65+
async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
66+
self.transaction(address, &mut [Operation::Write(write)])
67+
.await
68+
}
6369

6470
/// Writes bytes to slave with address `address` and then reads enough bytes to fill `read` *in a
6571
/// single transaction*.
@@ -88,7 +94,13 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
8894
address: A,
8995
write: &[u8],
9096
read: &mut [u8],
91-
) -> Result<(), Self::Error>;
97+
) -> Result<(), Self::Error> {
98+
self.transaction(
99+
address,
100+
&mut [Operation::Write(write), Operation::Read(read)],
101+
)
102+
.await
103+
}
92104

93105
/// Execute the provided operations on the I2C bus as a single transaction.
94106
///

embedded-hal/src/i2c.rs

Lines changed: 13 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -29,18 +29,6 @@
2929
//! # impl ErrorType for I2c0 { type Error = ErrorKind; }
3030
//! impl I2c<SevenBitAddress> for I2c0
3131
//! {
32-
//! fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
33-
//! // ...
34-
//! # Ok(())
35-
//! }
36-
//! fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
37-
//! // ...
38-
//! # Ok(())
39-
//! }
40-
//! fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
41-
//! // ...
42-
//! # Ok(())
43-
//! }
4432
//! fn transaction(&mut self, address: u8, operations: &mut [Operation<'_>]) -> Result<(), Self::Error> {
4533
//! // ...
4634
//! # Ok(())
@@ -49,18 +37,6 @@
4937
//!
5038
//! impl I2c<TenBitAddress> for I2c0
5139
//! {
52-
//! fn read(&mut self, addr: u16, write: &mut [u8]) -> Result<(), Self::Error> {
53-
//! // ...
54-
//! # Ok(())
55-
//! }
56-
//! fn write(&mut self, addr: u16, read: &[u8]) -> Result<(), Self::Error> {
57-
//! // ...
58-
//! # Ok(())
59-
//! }
60-
//! fn write_read(&mut self, addr: u16, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
61-
//! // ...
62-
//! # Ok(())
63-
//! }
6440
//! fn transaction(&mut self, address: u16, operations: &mut [Operation<'_>]) -> Result<(), Self::Error> {
6541
//! // ...
6642
//! # Ok(())
@@ -232,7 +208,7 @@ impl AddressMode for SevenBitAddress {}
232208

233209
impl AddressMode for TenBitAddress {}
234210

235-
/// Transactional I2C operation.
211+
/// I2C operation.
236212
///
237213
/// Several operations can be combined as part of a transaction.
238214
#[derive(Debug, PartialEq, Eq)]
@@ -263,7 +239,9 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
263239
/// - `MAK` = master acknowledge
264240
/// - `NMAK` = master no acknowledge
265241
/// - `SP` = stop condition
266-
fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error>;
242+
fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
243+
self.transaction(address, &mut [Operation::Read(read)])
244+
}
267245

268246
/// Writes bytes to slave with address `address`
269247
///
@@ -281,7 +259,9 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
281259
/// - `SAK` = slave acknowledge
282260
/// - `Bi` = ith byte of data
283261
/// - `SP` = stop condition
284-
fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error>;
262+
fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
263+
self.transaction(address, &mut [Operation::Write(write)])
264+
}
285265

286266
/// Writes bytes to slave with address `address` and then reads enough bytes to fill `read` *in a
287267
/// single transaction*
@@ -305,7 +285,12 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
305285
/// - `MAK` = master acknowledge
306286
/// - `NMAK` = master no acknowledge
307287
/// - `SP` = stop condition
308-
fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error>;
288+
fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
289+
self.transaction(
290+
address,
291+
&mut [Operation::Write(write), Operation::Read(read)],
292+
)
293+
}
309294

310295
/// Execute the provided operations on the I2C bus.
311296
///

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