From c7fa03ef65f4b8b387da770c5e6452e47bfc9f3e Mon Sep 17 00:00:00 2001
From: "Cliff L. Biffle" <cliff@oxide.computer>
Date: Sun, 24 May 2020 17:19:57 -0700
Subject: [PATCH 1/8] ITM: don't test reserved bits in is_fifo_ready

On ARMv7-M, bits 31:1 of the value read from STIMx are reserved, so
comparing them against zero is a bad idea.

On ARMv8-M, bit 1 has been repurposed to indicate DISABLED. This means
that the is_fifo_ready impl hangs forever when ITM is disabled on a
Cortex-M33 (for example).

Changed to test only the FIFOREADY bit.
---
 src/peripheral/itm.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/peripheral/itm.rs b/src/peripheral/itm.rs
index 30c7e47f..f5057c1a 100644
--- a/src/peripheral/itm.rs
+++ b/src/peripheral/itm.rs
@@ -55,6 +55,6 @@ impl Stim {
     /// Returns `true` if the stimulus port is ready to accept more data
     #[inline]
     pub fn is_fifo_ready(&self) -> bool {
-        unsafe { ptr::read_volatile(self.register.get()) == 1 }
+        unsafe { ptr::read_volatile(self.register.get()) & 1 == 1 }
     }
 }

From f58e5e13740d254738646d144f4c24470ba940ad Mon Sep 17 00:00:00 2001
From: "Cliff L. Biffle" <cliff@oxide.computer>
Date: Tue, 9 Jun 2020 18:49:00 -0700
Subject: [PATCH 2/8] ITM: don't test reserved bits in is_fifo_ready

On ARMv7-M, bits 31:1 of the value read from STIMx are reserved, so
comparing them against zero is a bad idea.

On ARMv8-M, bit 1 has been repurposed to indicate DISABLED. This means
that the is_fifo_ready impl hangs forever when ITM is disabled on a
Cortex-M33 (for example).

Changed to test only the FIFOREADY bit on ARMv7-M, and to test either
FIFOREADY or DISABLED on ARMv8-M.
---
 src/peripheral/itm.rs | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/peripheral/itm.rs b/src/peripheral/itm.rs
index f5057c1a..9fe963d8 100644
--- a/src/peripheral/itm.rs
+++ b/src/peripheral/itm.rs
@@ -53,8 +53,19 @@ impl Stim {
     }
 
     /// Returns `true` if the stimulus port is ready to accept more data
+    #[cfg(not(armv8m))]
     #[inline]
     pub fn is_fifo_ready(&self) -> bool {
-        unsafe { ptr::read_volatile(self.register.get()) & 1 == 1 }
+        unsafe { ptr::read_volatile(self.register.get()) & 0b1 == 1 }
+    }
+
+    /// Returns `true` if the stimulus port is ready to accept more data
+    #[cfg(armv8m)]
+    #[inline]
+    pub fn is_fifo_ready(&self) -> bool {
+        // ARMv8-M adds a disabled bit; we indicate that we are ready to
+        // proceed with a stimulus write if the port is either ready (bit 0) or
+        // disabled (bit 1).
+        unsafe { ptr::read_volatile(self.register.get()) & 0b11 != 0 }
     }
 }

From 33f031868df877a4f54720938ab48fc434485f49 Mon Sep 17 00:00:00 2001
From: Peter Taylor <PTaylor@FluenTech.info>
Date: Fri, 19 Jun 2020 12:55:48 -0600
Subject: [PATCH 3/8] Correct the documentation for the `SCB::set_pendst`
 function

---
 src/peripheral/scb.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index 55ecdee8..f829c6b2 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -706,7 +706,7 @@ impl SCB {
         }
     }
 
-    /// Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt
+    /// Set the PENDSTSET bit in the ICSR register which will pend a SysTick interrupt
     #[inline]
     pub fn set_pendst() {
         unsafe {

From b607b35faf9ba21c0f6718c1e717e59e5166b98f Mon Sep 17 00:00:00 2001
From: "Cliff L. Biffle" <cliff@oxide.computer>
Date: Sat, 4 Jul 2020 10:27:51 -0700
Subject: [PATCH 4/8] Use assembly sequences to enable caches.

See #232, which this partially fixes -- there's still the question of
taking an interrupt in the midst of these sequences.
---
 asm-v7.s                        |  37 ++++++++++++++++++++++++++++++++
 bin/thumbv6m-none-eabi.a        | Bin 5806 -> 5822 bytes
 bin/thumbv7em-none-eabi.a       | Bin 10570 -> 11258 bytes
 bin/thumbv7em-none-eabihf.a     | Bin 10570 -> 11258 bytes
 bin/thumbv7m-none-eabi.a        | Bin 8328 -> 9008 bytes
 bin/thumbv8m.base-none-eabi.a   | Bin 8254 -> 8286 bytes
 bin/thumbv8m.main-none-eabi.a   | Bin 13372 -> 14084 bytes
 bin/thumbv8m.main-none-eabihf.a | Bin 13372 -> 14084 bytes
 src/peripheral/scb.rs           |  26 +++++++++++++++-------
 9 files changed, 55 insertions(+), 8 deletions(-)

diff --git a/asm-v7.s b/asm-v7.s
index fad6f4c0..17d7110e 100644
--- a/asm-v7.s
+++ b/asm-v7.s
@@ -1,3 +1,4 @@
+  .syntax unified
   .cfi_sections .debug_frame
 
   .section .text.__basepri_max
@@ -39,3 +40,39 @@ __faultmask:
   bx lr
   .cfi_endproc
   .size __faultmask, . - __faultmask
+
+  .section .text.__enable_icache
+  .global __enable_icache
+  .thumb_func
+  .cfi_startproc
+__enable_icache:
+  ldr r0, =0xE000ED14       @ CCR
+  mrs r2, PRIMASK           @ save critical nesting info
+  cpsid i                   @ mask interrupts
+  ldr r1, [r0]              @ read CCR
+  orr.w r1, r1, #(1 << 17)  @ Set bit 17, IC
+  str r1, [r0]              @ write it back
+  dsb                       @ ensure store completes
+  isb                       @ synchronize pipeline
+  msr PRIMASK, r2           @ unnest critical section
+  bx lr
+  .cfi_endproc
+  .size __enable_icache, . - __enable_icache
+
+  .section .text.__enable_dcache
+  .global __enable_dcache
+  .thumb_func
+  .cfi_startproc
+__enable_dcache:
+  ldr r0, =0xE000ED14       @ CCR
+  mrs r2, PRIMASK           @ save critical nesting info
+  cpsid i                   @ mask interrupts
+  ldr r1, [r0]              @ read CCR
+  orr.w r1, r1, #(1 << 16)  @ Set bit 16, DC
+  str r1, [r0]              @ write it back
+  dsb                       @ ensure store completes
+  isb                       @ synchronize pipeline
+  msr PRIMASK, r2           @ unnest critical section
+  bx lr
+  .cfi_endproc
+  .size __enable_dcache, . - __enable_dcache
diff --git a/bin/thumbv6m-none-eabi.a b/bin/thumbv6m-none-eabi.a
index 001436833a97754ec85a3c730644ac1623b2bfb1..91563ff4593b29a1a50da79d8ef0680f0bf47c3f 100644
GIT binary patch
delta 176
zcmZ3dyH9sR1S6A~#pEbP4MvyE&5R!y84V|wFyAsxOi9eu4=BpdN=+^))-Nh8F40ZR
zO-fBkNlnpD&MzuSt<cS7aQ6#Ua12&3(la*JGi2CY$nuq+@y+CP5r4*($=gNB8MjQ<
z7u9C8pByc!%&0KAUR0eiWb$$#d1CT;AlWkcJCJ-aSzb(?iG_8thnN~rI$um(VhS$<
L!#YL=IDjz$v)eI!

delta 160
zcmdm|yH0mQ1S6BF(c~yb4MvmA&5R!y8C52iFyB&6$<NKq%goky&QHnAOV>}%FDgl`
z(9LCV_X|~U3|27GGd9`W$nuq+@y_IO5r4*#$;U;?8JA497u9Aon4B%D%qTFqUsRpZ
xW%70)xnuHuAXze*T}++v#$<glb*3*YlOx2`fYSA1>Jlxy3=HcS8Q=iM1OWUqEBXKc

diff --git a/bin/thumbv7em-none-eabi.a b/bin/thumbv7em-none-eabi.a
index f7dc35cdb9f6d97bf6505b104458c9c147ffd1d4..dafb25588ddc84b6086dddba59f7567cbd6b39a1 100644
GIT binary patch
delta 1948
zcmb_dUuaup6hGfhZqsVFCTWv2Y1Z5{u{U)#H%+Q*2eNi6Yeli*s#7P+pXNec%^I6@
z^{ruSASg^d6Ndx;!DNmh#gsk?)!~Ea9(?G74?YNe@nPC&)QJf5oSU1P1QiqyIo~<I
z@0{;^=brETPCkG1x1%qQu8a&TRZ86f06hSb`~PFl2LOM?p>=@JdNP@re`WQPJ^IOX
z=2<=Y%xrpgPKRXD#90I5P<Rk8inHQA91jkNiSmQeO(BL*>GR>^){hhEY&xesvbb<U
zpDh-&#ic@VP|s!bY*x=|vkQww{rSNhOg{XWGJZsfM-z$Y5R^ydpF6}2)Lhfz46eAA
z#Twpn?G*<w<POP-1>iFNVC%%=Zo8Pl1-B|b!`Ep%gBxyD`qqjirC+kjX!rEXGi?B`
zVaGs7oX4bR(wd0HV|c|AS^3CD<phw24G{q!c%f8rzL1~Xt~g5h$x_8(=$)k7rnW2g
z(~Ik3Zu}=05~+>K^tp}7!nxBGJNW=~eFxvv`;`91=MCD+0s$H&Z0o*j-ls_dgaBFM
zBrHzRi2Y5tzX``gPz%ye(=^L+RFdjKU4tgut9?B(l>&z8V7y`iFLo!=VcwOfCRtAx
za)YP#MGK(KE#!3VKb#&%0k};B_?A^|t3?l^<~@c_dD|VmWN$aTszY!2c1u7Uuo7ZZ
zmD+%@Vj_Sl{?p#tWN*bKUjVO%?0A)U(`OeByyOe4bnQf7#R6{NgBQdt#7>IhYQQoC
z8*mE@Heef!nwWEOLMuGbfT_sgB80Q_PBQ6&j)z3F_a7e+;IW?2;S&@@qN1E-xx1R2
zM454&_{G~<dg!XL>;|BpA^oQ0kCD1?vptR{ccqRSZa&kE3dx5c5st7VU%vH>M_9H3
zOqh6zB{iBE6F<R{a>$x^j^%E=+OZE`^dG#NUT-nF(-6!C5pA3`+r-!QE9Ip<Ug0`L
zA!_9(6&@lE<8!u7*Go;7e9e-1&$N&*=sb;YnmP-P$Mh~S-|{hHrZE{HMv@8#+&-xi
zbYK9~-gefI3UPrqd)@m#B(;8dzHT`mL~Z#s(ra6i3Nr%70&dr4)AStqOmU~uza&e2
z;I}C-m!9+LAg%@8BAo+s&P=NW4pvoTWE=C3rZgsL_?0Hdc&GcnCse=FSF}@#=6EM3
zacw6nt>8#C8j%3<bP8RgG+Q5Fgl<cUyf{D?aV>y@{HPQ285wk0;<mf%Q;MSy^ZoSW
zcEoR`1y6DVZn;2_f&zb6Cd9q?zGpyO!1>^s*iRklX#C$dn({k+X{+#~MV%J+;1P9M
zJdIzdd&LyqQbTfz(o?u1j#bK}{)38mD5A<Gvd8$=;V%I@{WoAl6|1<SsNy<qk$wa3
T98kO0=nJ>1-)D@p$e=#}AgDz>

delta 1348
zcmb_cUr1A76hGhH?kfMx>HfP-uWs(nE!)_ZsE`;=w2<td81%5xiHPZ}Mp`{+kP+d-
z=zzThy$tlhhhULG4}wKR2)z_Y_z+|eJw%Wagb$tXx*J!YeCUJo{m$=v=ls5V&hFix
zzISJ{%~SEXw6iW10e};L{rG=ozX71N8Y4iBF`4Wi8P7m6IglR1=fyMF!Q!~#58^8}
zBOHz5Ng=@E`Rl?@#(bF4fAXf%qr+pvBjNURYItlYJdnPY8Juhwh0asG((!Xr^hhk8
zzbbB(v2`4>_OJ{tStnQy!?qBM;6<C4nQ+P`vjoo5{sQ0Ap26R=uVJ-a7B=<RW%tu@
z+Ag!Z_{iR=kH(rC`E!^bi!>DgF|I%W9AHO}!^sA4$`KZvVYKQR#5xuh7&@KRewotP
zG%E*_q1T`@x{P&3v!cN31w}&-fXjLr=bYyKG=}TWDB27XwpPaRVdZypyG^+5GGVvh
zgo|X|#AgW)yG<PyAa!752C@ob6}z|yRlB$Wg1h(u0AB_ZEQSG3Z6ntZN&!kZ(l2M?
zSO#F>NW@V<cLA0B63lvPamCZts-)5VN*X<vkEan2aHL#iB*dFIKM0U0oOf|7!s)7;
zSR9zouU1#G{#z8|ZK<o9oFSDEs%P}R!6C9XGQJjd01}~<jIL0|!|?%`T0<`60kc+H
z%RO?n<*QU4p%^dcp9h~VFP|gRmVX5NY_(Yz_JqF?Z^An+^I(oVt?)Jp2PnpcX~O@6
zm&oVB{8GLoBC#D;+4&i_Hw9FJv|XTJgx_>*g_!mxA3bv$#rRG92UJ^FBcCg&>pqdw
z$Xw=@4;0cWq%;crby5|+l22`ns|srjCA+_LlZ2+pY!tWPlaNcyP*x)@hrEUy)ouai
zyb1c^PYCrai)P<5)_`w)eZhTv<%O&AXX-BNnFaIpJ@gNu3r?`}csm$k%{U+QihLFl
zpGEmo%GY*s1%Cx)agxp>ywmc%vzo>BkSr`HeX!SvA(?I9%aH8guhAE^PeM{q)?eZ>
B)xrP(

diff --git a/bin/thumbv7em-none-eabihf.a b/bin/thumbv7em-none-eabihf.a
index f7dc35cdb9f6d97bf6505b104458c9c147ffd1d4..dafb25588ddc84b6086dddba59f7567cbd6b39a1 100644
GIT binary patch
delta 1948
zcmb_dUuaup6hGfhZqsVFCTWv2Y1Z5{u{U)#H%+Q*2eNi6Yeli*s#7P+pXNec%^I6@
z^{ruSASg^d6Ndx;!DNmh#gsk?)!~Ea9(?G74?YNe@nPC&)QJf5oSU1P1QiqyIo~<I
z@0{;^=brETPCkG1x1%qQu8a&TRZ86f06hSb`~PFl2LOM?p>=@JdNP@re`WQPJ^IOX
z=2<=Y%xrpgPKRXD#90I5P<Rk8inHQA91jkNiSmQeO(BL*>GR>^){hhEY&xesvbb<U
zpDh-&#ic@VP|s!bY*x=|vkQww{rSNhOg{XWGJZsfM-z$Y5R^ydpF6}2)Lhfz46eAA
z#Twpn?G*<w<POP-1>iFNVC%%=Zo8Pl1-B|b!`Ep%gBxyD`qqjirC+kjX!rEXGi?B`
zVaGs7oX4bR(wd0HV|c|AS^3CD<phw24G{q!c%f8rzL1~Xt~g5h$x_8(=$)k7rnW2g
z(~Ik3Zu}=05~+>K^tp}7!nxBGJNW=~eFxvv`;`91=MCD+0s$H&Z0o*j-ls_dgaBFM
zBrHzRi2Y5tzX``gPz%ye(=^L+RFdjKU4tgut9?B(l>&z8V7y`iFLo!=VcwOfCRtAx
za)YP#MGK(KE#!3VKb#&%0k};B_?A^|t3?l^<~@c_dD|VmWN$aTszY!2c1u7Uuo7ZZ
zmD+%@Vj_Sl{?p#tWN*bKUjVO%?0A)U(`OeByyOe4bnQf7#R6{NgBQdt#7>IhYQQoC
z8*mE@Heef!nwWEOLMuGbfT_sgB80Q_PBQ6&j)z3F_a7e+;IW?2;S&@@qN1E-xx1R2
zM454&_{G~<dg!XL>;|BpA^oQ0kCD1?vptR{ccqRSZa&kE3dx5c5st7VU%vH>M_9H3
zOqh6zB{iBE6F<R{a>$x^j^%E=+OZE`^dG#NUT-nF(-6!C5pA3`+r-!QE9Ip<Ug0`L
zA!_9(6&@lE<8!u7*Go;7e9e-1&$N&*=sb;YnmP-P$Mh~S-|{hHrZE{HMv@8#+&-xi
zbYK9~-gefI3UPrqd)@m#B(;8dzHT`mL~Z#s(ra6i3Nr%70&dr4)AStqOmU~uza&e2
z;I}C-m!9+LAg%@8BAo+s&P=NW4pvoTWE=C3rZgsL_?0Hdc&GcnCse=FSF}@#=6EM3
zacw6nt>8#C8j%3<bP8RgG+Q5Fgl<cUyf{D?aV>y@{HPQ285wk0;<mf%Q;MSy^ZoSW
zcEoR`1y6DVZn;2_f&zb6Cd9q?zGpyO!1>^s*iRklX#C$dn({k+X{+#~MV%J+;1P9M
zJdIzdd&LyqQbTfz(o?u1j#bK}{)38mD5A<Gvd8$=;V%I@{WoAl6|1<SsNy<qk$wa3
T98kO0=nJ>1-)D@p$e=#}AgDz>

delta 1348
zcmb_cUr1A76hGhH?kfMx>HfP-uWs(nE!)_ZsE`;=w2<td81%5xiHPZ}Mp`{+kP+d-
z=zzThy$tlhhhULG4}wKR2)z_Y_z+|eJw%Wagb$tXx*J!YeCUJo{m$=v=ls5V&hFix
zzISJ{%~SEXw6iW10e};L{rG=ozX71N8Y4iBF`4Wi8P7m6IglR1=fyMF!Q!~#58^8}
zBOHz5Ng=@E`Rl?@#(bF4fAXf%qr+pvBjNURYItlYJdnPY8Juhwh0asG((!Xr^hhk8
zzbbB(v2`4>_OJ{tStnQy!?qBM;6<C4nQ+P`vjoo5{sQ0Ap26R=uVJ-a7B=<RW%tu@
z+Ag!Z_{iR=kH(rC`E!^bi!>DgF|I%W9AHO}!^sA4$`KZvVYKQR#5xuh7&@KRewotP
zG%E*_q1T`@x{P&3v!cN31w}&-fXjLr=bYyKG=}TWDB27XwpPaRVdZypyG^+5GGVvh
zgo|X|#AgW)yG<PyAa!752C@ob6}z|yRlB$Wg1h(u0AB_ZEQSG3Z6ntZN&!kZ(l2M?
zSO#F>NW@V<cLA0B63lvPamCZts-)5VN*X<vkEan2aHL#iB*dFIKM0U0oOf|7!s)7;
zSR9zouU1#G{#z8|ZK<o9oFSDEs%P}R!6C9XGQJjd01}~<jIL0|!|?%`T0<`60kc+H
z%RO?n<*QU4p%^dcp9h~VFP|gRmVX5NY_(Yz_JqF?Z^An+^I(oVt?)Jp2PnpcX~O@6
zm&oVB{8GLoBC#D;+4&i_Hw9FJv|XTJgx_>*g_!mxA3bv$#rRG92UJ^FBcCg&>pqdw
z$Xw=@4;0cWq%;crby5|+l22`ns|srjCA+_LlZ2+pY!tWPlaNcyP*x)@hrEUy)ouai
zyb1c^PYCrai)P<5)_`w)eZhTv<%O&AXX-BNnFaIpJ@gNu3r?`}csm$k%{U+QihLFl
zpGEmo%GY*s1%Cx)agxp>ywmc%vzo>BkSr`HeX!SvA(?I9%aH8guhAE^PeM{q)?eZ>
B)xrP(

diff --git a/bin/thumbv7m-none-eabi.a b/bin/thumbv7m-none-eabi.a
index f1f686d00bb2d5ec30f2d57adc65bb1a99c991d3..ce4710dc185956e0e9c49412468e281bf76069e5 100644
GIT binary patch
delta 1818
zcmb_cU1(HS5T0{)ubbEych}ASC1h_%a6@bMCcCk$_+Yk(QK-?<R4NoVo82p^ZJIRM
z*80*FQIR4jj1Q%#NGYZENsahakcJleBo->@Qw95=pjDbeTd>t{?%tdI(Y}-pch1ar
zX3or<Gw0l6xeHrPW-FOY+NjdRN+OC8sgwU7NBW7L<$Qkfo!K(w^TiqdW93m^uhNNp
z-g>Vv`L30JyI3erSui@dWMkf|hP9Wod|LIZ%?sbFM@kLx<4BaRc^0#UQeoQMIXAP<
zDwgNXxew;c1J?AURVrB}vp6$Xwmuq|rqQuCjNI!+I+e+!hKQbk__pVZg}3xqSF8Jc
zKD0v}=D$Mw)n$Ia<0Z9;&vf)EgTL)as&T%D@dplslknMq@h%s_NzJSCC*id)U&PcY
zz7-zzW(L!PQskO%d^k-aeb^TL6sH*HBe8A1tq+&{hvu%Rsod{0q$aK|?Kp9DY39VC
zCI7M6QKHZTx?S&c@LzmB;{y@15;rwPN|CNf8c$F);;tsVwh0fa9<v9ZX_}t>DNU;j
zwMfs}x{<?9L|$cYiyuW^P{Y!PcG_Gs5^=zrZ0)msi267ejc5KtllbFkx-QCVdXle4
zhxxeP7LZcfocJQTS;ZdkUSE2>SJ1Mhl>{42xMpvu+IiX+<9}j))y_Z15<C|7s{kkB
ziArdBr6?W>lk`<~zXBY@>W&7iQ%?h4K?4ogM;jb0H3X@Jwl&~Z99Nn8O1S@%g?WoN
zs&&TlQ+WQ<Aifdr-Lem1G@Qs0k?qy;G}I=Cq=kw6A|tq8BBMn3Y}w^V*^U<Cv9>ht
z>>T0#RmL9MHSW0L7^R;YFy1t2@RzGCI4iP+sy6_5t6=<0#vS{cB2h=l!BZmJ`C8|J
z7x6U9spkEq8fTp!z%KvS3lF<uN`1(=;F^jQ;}UAK={QEWH8L>^exBc#j-U7lodTb=
zwdx=-ggytOAv6LO8qtXcA#se|B!5dujE&P3u)7E<rTNEDq;d&b{qot`a=R_=>cytj
z;|LX$Fb=tqe*$)OF--x;S-T{a2wevwZ)Lgeb4V;rLfy0)>?XbgT>{FUgf0NQQdR9y
zY{I`e(w@ZdCniT+0O=<F6?$#M6{4F+Jb_6`EIV=&%kM)1yOh<c&2q8$*#xIrKx_iH
zZUP307XrKS0`T+Hh4>2bI{EKJ@2c;h8DP2YT|8iP>c3#oZr*P6Mn6Tgp1Lwz^(moc
B3IG5A

delta 1269
zcmb_bT}YE*6h7~Mti<JJ+qcQ4F10p_Io*~&H{r@!L0C{h7ttye6`NZ+EV|h)BBUFQ
z16I&g?82Z6VS!x)K^I-+U4ldeT?G9g3F?Iq)N?++PxG#e4m|I3{@!!Gb6&o=latBm
z&O)p!7TlDpl|<wvQbYd_+6vJ&(&_6Xxjd!Qec93cSoTJGj2^t6<0%!l9EtH|Z&)SD
z%W6fbX8vUT(A1yJ437?vM2~0therpaec7@6!0kweQoR?0$@9TjOFU8jVOy_OANjNU
ztjcqn=awq*GtXhw%8Q;R<>U=dNcHf3Eu>!ZX`Fe!iF1h`Yaz>;jo)Yo5&j0(U3Pg>
zwphHYUA`mo#ExAM*%La2$%n-hS8FD7sh_K^VlGu&b?N#(=zYB5jaq7>JY|Vk52z@=
zvew!6;9>|<_*8-yeDS2zxi+4OOmwu2Q*<bs8HoPFczSpG4Ixh2Lj0)q0>7yE&NF@|
zPxzg#-J1!<X(cDm`x}&lANm_kxXA{;0xEzSST#FrJJs*7E9lS;dlyl2o_hmvei~?O
zml_raQI+ssBByXQky{vs&)|T;dVUpG)-`g_(S1};Lw`LD-_<N>u*1U0l|75yDU7Ll
z4EvODC10uT;I{f>Jnft<ry6Qi;ST&Vnki?X44MYmj7>n7r|1Smo?D56U=JY6lNAZy
z2h2NAsSGrVVu%^L2OISYTLs^tU@M$bQ2rmY;0$#05>#3QWdEj^u~|4wU1DDWS%N9@
zaUvyPdyoRrFEkFrDUI<iTaD+TOF{W4ksyrtrmCM36TCH8cjCANr+G(wX5%-|w;SW-
zFkv_P>y7d7TaA~XOJP$cVVpA!uxv);J@9wIekll_3?dtnJZb&~z>GPNE=#EAH*_v(
h0mm8~ML>ho%?p~}o=1K=FKbP{5~{2l$wEle<qz+Fu5|za

diff --git a/bin/thumbv8m.base-none-eabi.a b/bin/thumbv8m.base-none-eabi.a
index 7711268d815fa5497d960be0df8ccbc619fedcb6..95cac3e84cacb9fa6d05a6a576b363eeee39207b 100644
GIT binary patch
delta 351
zcmdnzaL-}Fblz7C3}SFR`5M>6$)=3nOy)+D`NTCCJvOgq{J_X)IC&29E#t(L#9aM=
zqWrAX<dS0jqSE3L-PGKq)RdIe6#eA<qLS1K-CPEDzfc9oU<D&RV`Du-hRrise)2PZ
zm^@j;pRr@|W07*k9h0L)wHfUvw~Hz>DokE2s?HcO`7)3^G5I%;?3k=9rq1+&W%34j
zH6{+$$t7ZHK>68X>Wnic9~SduGBW@>t75Xb_&P=tpsOS%{}Xp7%Vil7eXNX2CV!Xp
zXFM|5U9Oz*%jErX+Kf(<U&|>oW=!UnS7(%&Yz`!6OpXVVF_YVY<crDc<<*%um?qzl
XR|7iszr4D{92N$K+YAW62xS5Q8#-)+

delta 289
zcmccTu+L$_blzJG3}SFR`5D*5$)=3nOr~a&<-|1@EjF)a{J_YlGI<X3Exwfe+|0bp
zY<=hal+3*J$rD*b7)>^>WckU@_+av45r4*t$)82a8COis7S(1nm^@unnNeW!Zc%kc
zkI9dL<c`VQV(LIO#$xJBH&`ZLkXK{+!7{l;ObsZ%8Yt5-`LdWNlZgq~-i*oa;_DdI
zf!0b)=96&8Zgq!5A1mXO$>MVUj9VtB%at=enS5VPo6&eOx4bfA#AJPWbw-}a;Xtxu
qay^jrnY<iG-k5w|UY+R&<K!RmYCzY>E2vBKurM&(W<UT&C=&pQ%vN;(

diff --git a/bin/thumbv8m.main-none-eabi.a b/bin/thumbv8m.main-none-eabi.a
index ff78de28e6a516588437d9c86b7c1d86eb8fe531..2242a66bf64affac44427cc4c6346528371792ac 100644
GIT binary patch
delta 2013
zcmb_dUrbwN6hGf>3uWQYE%YyCw1sXhW3=Vo2Fi2}7b2J}frmX{oYF$C)<p(F9ry$x
zn($yU$kAj`q9a+%6616>S@xig;Y{$sL=)dM3&s~>RA60<Mom2D_Lh}q#y$Auo_o&k
zJKz1?^PTV9b3e(vdTuE(7grU3VI&U#Kmb7M`~SqX3Gg6k{TV<PhhcOi0q)E4?Jo{$
z=Tf6DY9lX<rN%NEjEopKtz-N%=)rfzhf=qKLsD1_<X(|>gy_Vf7B?=K*S)E9YCJkL
zHE~uO%T7n9UY^c&Xyc<=I<2KK;IW(4NGIf;xBO8jb};1_6pMJxF(YnZo3mY<z+GPh
zW}LFcZvwc2tAv)EvKYoyXGm<|mvmpmU1vzzGUHYCaE;XhFk}WeL<v;z2i0pCt^#-y
zMZ8s9#AR2%S&b=i4s>p<lGXrN;<^e$BY0pwU%xonzn!<uPxjB}ZMxk+cICi!US62G
zE;5hbgHDmWnIF7xGe2=*AurP!0Q)bnS-NKaU)H=u?=pdp?h-!YK7?9(cN{DdM_`JH
zKr}#CG#WL{L?j7>D7x06%!jcSpP+5DxFzVruiWZmLFS-Q)NH4w$2-n<N2Vc~nHbli
z4|5RM<x#4N96?NZp2psaYFjh0RWqeAn(@}rU2L{0Cn(pz-omH?#(o0<6!3k&wajnD
z_Zxkp7T<34;Q_BKZ1`QHZ_d8=JR2r(0w0wisUWE*4#z%h;cunHUjZHaa3%B@m?NnN
zD?GUmQ-uVx5KL2PkEW(Ie9n8+zgOiCu6n>_Z|f6hiAJKlyvDk=5S~P_ajGOIfXv!O
z<-ytwK$otY49(k-?D&(n1;aHmUaCnxt1oRdmQphLEF{8V*0i3hm2rZ#6`;?+1FWfS
zoHp<<Yl<Un;0)_pyi?bWx0+5K$!fFNNckQk`)3Q^cTODqTsY3t<HZ9Y6Hbv(d8iGJ
z*ULPUd!F|U4=H`TLHBp?CB@Z435Q;Njy6DFY>aG56L8z3J<|aJTqof-7KcKh1#Qg@
z$3Ld2Qif~^182U-uugU<!)XHb%;5O8%#$I{05_N8Uzc%TCT>nOM^{Hu<o=Ot=H|$G
zd_>?RH!H_oLhLDy-wE{U+`rOPY24ovcar9qyPl-TZKfwm84}bVCOOx~c)FC~Q7VWc
zgS~{oM(e0w@=@sHiljHk4I=WBa2Yn~&2fv~`4l(DiWQ;?2vh=nQddlG<g>UMxT-gq
zk%#NyU7p`WZX<ZnBranrJScACweXB|&xD^TPV8;73q3)YX_GCS@K~Xnx5=UjSKC6=
zo}W=&xJmd7?h@X@57dxkmGF-Luw{|9)1-It6<j_tV2Z~QdXV%>2sEI({gUX>e>mT?
z5B^uMCi>yzj(P5iTs*R75^EHz3#*lc*ra$}ct%MI89!CpMZf;@`Ad<-B-W@Qk)SYL
lcuJMUB?>hpW+_Y;t`OeQLzVSV#S;FlhAcNIv)f#3{{T$)fg=C_

delta 1093
zcmb_bO-NKx6uxI>o|I_KDC3)c)Mqo}9p}xT<IFTcLSkS+B@uzEnow~hbnJ%|Hz`y|
zNEu&5Eh+^eTNDiw)FNpJ41yK~EsQn_wFso2MNv@Dxl_jE%0&mhdpYNx``&lHbMBe`
zN9l>=>85Q_<F}<sg%GtuST_GZ=rckTqi&}V#qgJNg8wfrJ)c9C<}C3943CeJxhcyh
zA`gy*HsOx#vAZkN*W2HFG~Al$>h13dcV>>C>>djCiMD+Qjg|vOG}IK!-PFFXrv+Sd
zw$l*aI|pe7N2*MUARDj5WR;!l$W}?(h1a}31nH9V8hD+@eqCC=*)Xiv^YIji#_&vU
zvqobP)Os2!Cp8vG2rX9Fe8MGkw7WJ?C$g?ErafV+m%<pZRcmWGLo#a@?B3?!*3bzN
zPG|bM!>izrbsM9|hitjLH&1mH{2^kLFe-#5YX0#{gdbDViNjpoq3SKUC0RyTs%b@C
z!!3MpT)>1ePQzIAOUEg`s95b_D7%N*m`>->XiCR9_KVM6pggYA6^xpa#k+0F=IIp~
z!X|`|V@^gngI%$P@qnS|Mi|NrcAAv%j;HLYlV$5bV?cL2VYm3tKKzX9j(Lt2=Z;~N
zb6>5<O=E9Dcf8}MRfqxJ3O0|I0d6AUMxtID;*$ijZnrkW48NeosKkO^imz^;B^E1;
zSQ@)McWJp-ZL68Eq7HRvbXf_Bh?%7ON;Zs`DSC@V)1*S-FamZ`#Y!qu#bJPbRgk1T
zssQBKFDA{ySQnJqI1_$TAe;&|TKSO{*j~kKFh>ENte({{&0X|<rreK6-b$+9?W8(8
zNCIc$CMCHqZc3>>U@2}VrM;vHr8TxE?4<OS{E%2rzHvPvwGoz+pV1#VKPq;=0RJrj
A;s5{u

diff --git a/bin/thumbv8m.main-none-eabihf.a b/bin/thumbv8m.main-none-eabihf.a
index ff78de28e6a516588437d9c86b7c1d86eb8fe531..2242a66bf64affac44427cc4c6346528371792ac 100644
GIT binary patch
delta 2013
zcmb_dUrbwN6hGf>3uWQYE%YyCw1sXhW3=Vo2Fi2}7b2J}frmX{oYF$C)<p(F9ry$x
zn($yU$kAj`q9a+%6616>S@xig;Y{$sL=)dM3&s~>RA60<Mom2D_Lh}q#y$Auo_o&k
zJKz1?^PTV9b3e(vdTuE(7grU3VI&U#Kmb7M`~SqX3Gg6k{TV<PhhcOi0q)E4?Jo{$
z=Tf6DY9lX<rN%NEjEopKtz-N%=)rfzhf=qKLsD1_<X(|>gy_Vf7B?=K*S)E9YCJkL
zHE~uO%T7n9UY^c&Xyc<=I<2KK;IW(4NGIf;xBO8jb};1_6pMJxF(YnZo3mY<z+GPh
zW}LFcZvwc2tAv)EvKYoyXGm<|mvmpmU1vzzGUHYCaE;XhFk}WeL<v;z2i0pCt^#-y
zMZ8s9#AR2%S&b=i4s>p<lGXrN;<^e$BY0pwU%xonzn!<uPxjB}ZMxk+cICi!US62G
zE;5hbgHDmWnIF7xGe2=*AurP!0Q)bnS-NKaU)H=u?=pdp?h-!YK7?9(cN{DdM_`JH
zKr}#CG#WL{L?j7>D7x06%!jcSpP+5DxFzVruiWZmLFS-Q)NH4w$2-n<N2Vc~nHbli
z4|5RM<x#4N96?NZp2psaYFjh0RWqeAn(@}rU2L{0Cn(pz-omH?#(o0<6!3k&wajnD
z_Zxkp7T<34;Q_BKZ1`QHZ_d8=JR2r(0w0wisUWE*4#z%h;cunHUjZHaa3%B@m?NnN
zD?GUmQ-uVx5KL2PkEW(Ie9n8+zgOiCu6n>_Z|f6hiAJKlyvDk=5S~P_ajGOIfXv!O
z<-ytwK$otY49(k-?D&(n1;aHmUaCnxt1oRdmQphLEF{8V*0i3hm2rZ#6`;?+1FWfS
zoHp<<Yl<Un;0)_pyi?bWx0+5K$!fFNNckQk`)3Q^cTODqTsY3t<HZ9Y6Hbv(d8iGJ
z*ULPUd!F|U4=H`TLHBp?CB@Z435Q;Njy6DFY>aG56L8z3J<|aJTqof-7KcKh1#Qg@
z$3Ld2Qif~^182U-uugU<!)XHb%;5O8%#$I{05_N8Uzc%TCT>nOM^{Hu<o=Ot=H|$G
zd_>?RH!H_oLhLDy-wE{U+`rOPY24ovcar9qyPl-TZKfwm84}bVCOOx~c)FC~Q7VWc
zgS~{oM(e0w@=@sHiljHk4I=WBa2Yn~&2fv~`4l(DiWQ;?2vh=nQddlG<g>UMxT-gq
zk%#NyU7p`WZX<ZnBranrJScACweXB|&xD^TPV8;73q3)YX_GCS@K~Xnx5=UjSKC6=
zo}W=&xJmd7?h@X@57dxkmGF-Luw{|9)1-It6<j_tV2Z~QdXV%>2sEI({gUX>e>mT?
z5B^uMCi>yzj(P5iTs*R75^EHz3#*lc*ra$}ct%MI89!CpMZf;@`Ad<-B-W@Qk)SYL
lcuJMUB?>hpW+_Y;t`OeQLzVSV#S;FlhAcNIv)f#3{{T$)fg=C_

delta 1093
zcmb_bO-NKx6uxI>o|I_KDC3)c)Mqo}9p}xT<IFTcLSkS+B@uzEnow~hbnJ%|Hz`y|
zNEu&5Eh+^eTNDiw)FNpJ41yK~EsQn_wFso2MNv@Dxl_jE%0&mhdpYNx``&lHbMBe`
zN9l>=>85Q_<F}<sg%GtuST_GZ=rckTqi&}V#qgJNg8wfrJ)c9C<}C3943CeJxhcyh
zA`gy*HsOx#vAZkN*W2HFG~Al$>h13dcV>>C>>djCiMD+Qjg|vOG}IK!-PFFXrv+Sd
zw$l*aI|pe7N2*MUARDj5WR;!l$W}?(h1a}31nH9V8hD+@eqCC=*)Xiv^YIji#_&vU
zvqobP)Os2!Cp8vG2rX9Fe8MGkw7WJ?C$g?ErafV+m%<pZRcmWGLo#a@?B3?!*3bzN
zPG|bM!>izrbsM9|hitjLH&1mH{2^kLFe-#5YX0#{gdbDViNjpoq3SKUC0RyTs%b@C
z!!3MpT)>1ePQzIAOUEg`s95b_D7%N*m`>->XiCR9_KVM6pggYA6^xpa#k+0F=IIp~
z!X|`|V@^gngI%$P@qnS|Mi|NrcAAv%j;HLYlV$5bV?cL2VYm3tKKzX9j(Lt2=Z;~N
zb6>5<O=E9Dcf8}MRfqxJ3O0|I0d6AUMxtID;*$ijZnrkW48NeosKkO^imz^;B^E1;
zSQ@)McWJp-ZL68Eq7HRvbXf_Bh?%7ON;Zs`DSC@V)1*S-FamZ`#Y!qu#bJPbRgk1T
zssQBKFDA{ySQnJqI1_$TAe;&|TKSO{*j~kKFh>ENte({{&0X|<rreK6-b$+9?W8(8
zNCIc$CMCHqZc3>>U@2}VrM;vHr8TxE?4<OS{E%2rzHvPvwGoz+pV1#VKPq;=0RJrj
A;s5{u

diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index f829c6b2..b300d7af 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -330,11 +330,16 @@ impl SCB {
         // Invalidate I-Cache
         cbp.iciallu();
 
-        // Enable I-Cache
-        unsafe { self.ccr.modify(|r| r | SCB_CCR_IC_MASK) };
+        // Enable I-cache
+        extern "C" {
+            // see asm-v7m.s
+            fn __enable_icache();
+        }
 
-        crate::asm::dsb();
-        crate::asm::isb();
+        // NOTE(unsafe): The asm routine manages exclusive access to the SCB
+        // registers and applies the proper barriers; it is technically safe on
+        // its own, and is only `unsafe` here because it's `extern "C"`.
+        unsafe { __enable_icache(); }
     }
 
     /// Disables I-Cache if currently enabled
@@ -392,11 +397,16 @@ impl SCB {
         // Invalidate anything currently in the DCache
         self.invalidate_dcache(cpuid);
 
-        // Now turn on the DCache
-        unsafe { self.ccr.modify(|r| r | SCB_CCR_DC_MASK) };
+        // Now turn on the D-cache
+        extern "C" {
+            // see asm-v7m.s
+            fn __enable_dcache();
+        }
 
-        crate::asm::dsb();
-        crate::asm::isb();
+        // NOTE(unsafe): The asm routine manages exclusive access to the SCB
+        // registers and applies the proper barriers; it is technically safe on
+        // its own, and is only `unsafe` here because it's `extern "C"`.
+        unsafe { __enable_dcache(); }
     }
 
     /// Disables D-cache if currently enabled

From cb6a61adf3a9e20f2ce6e9740d239d49b5d5dd71 Mon Sep 17 00:00:00 2001
From: Hugues de Valon <hugues.devalon@arm.com>
Date: Wed, 15 Apr 2020 09:52:01 +0100
Subject: [PATCH 5/8] Add a function to get SHCSR enable bit positions

This removes the duplication of the look-up table and enforces some
safety checks with the match statement.

Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
---
 src/peripheral/scb.rs | 75 ++++++++++++++++---------------------------
 1 file changed, 28 insertions(+), 47 deletions(-)

diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs
index b300d7af..d710272d 100644
--- a/src/peripheral/scb.rs
+++ b/src/peripheral/scb.rs
@@ -1,8 +1,6 @@
 //! System Control Block
 
 use core::ptr;
-#[cfg(not(any(armv6m, armv8m_base)))]
-use crate::interrupt;
 
 use volatile_register::RW;
 
@@ -852,6 +850,20 @@ impl SCB {
         }
     }
 
+    /// Return the bit position of the exception enable bit in the SHCSR register
+    #[inline]
+    #[cfg(not(any(armv6m, armv8m_base)))]
+    fn shcsr_enable_shift(exception: Exception) -> Option<u32> {
+        match exception {
+            Exception::MemoryManagement => Some(16),
+            Exception::BusFault => Some(17),
+            Exception::UsageFault => Some(18),
+            #[cfg(armv8m_main)]
+            Exception::SecureFault => Some(19),
+            _ => None,
+        }
+    }
+
     /// Enable the exception
     ///
     /// If the exception is enabled, when the exception is triggered, the exception handler will be executed instead of the
@@ -866,24 +878,11 @@ impl SCB {
     #[inline]
     #[cfg(not(any(armv6m, armv8m_base)))]
     pub fn enable(&mut self, exception: Exception) {
-        if self.is_enabled(exception) {
-            return;
-        }
-
-        // Make sure that the read-modify-write sequence happens during a critical section to avoid
-        // modifying pending and active interrupts.
-        interrupt::free(|_| {
-            let shift = match exception {
-                Exception::MemoryManagement => 16,
-                Exception::BusFault => 17,
-                Exception::UsageFault => 18,
-                #[cfg(armv8m_main)]
-                Exception::SecureFault => 19,
-                _ => return,
-            };
-
+        if let Some(shift) = SCB::shcsr_enable_shift(exception) {
+            // The mutable reference to SCB makes sure that only this code is currently modifying
+            // the register.
             unsafe { self.shcsr.modify(|value| value | (1 << shift)) }
-        })
+        }
     }
 
     /// Disable the exception
@@ -900,24 +899,11 @@ impl SCB {
     #[inline]
     #[cfg(not(any(armv6m, armv8m_base)))]
     pub fn disable(&mut self, exception: Exception) {
-        if !self.is_enabled(exception) {
-            return;
-        }
-
-        // Make sure that the read-modify-write sequence happens during a critical section to avoid
-        // modifying pending and active interrupts.
-        interrupt::free(|_| {
-            let shift = match exception {
-                Exception::MemoryManagement => 16,
-                Exception::BusFault => 17,
-                Exception::UsageFault => 18,
-                #[cfg(armv8m_main)]
-                Exception::SecureFault => 19,
-                _ => return,
-            };
-
+        if let Some(shift) = SCB::shcsr_enable_shift(exception) {
+            // The mutable reference to SCB makes sure that only this code is currently modifying
+            // the register.
             unsafe { self.shcsr.modify(|value| value & !(1 << shift)) }
-        })
+        }
     }
 
     /// Check if an exception is enabled
@@ -931,16 +917,11 @@ impl SCB {
     /// Calling this function with any other exception will read `false`.
     #[inline]
     #[cfg(not(any(armv6m, armv8m_base)))]
-    pub fn is_enabled(&mut self, exception: Exception) -> bool {
-        let shift = match exception {
-            Exception::MemoryManagement => 16,
-            Exception::BusFault => 17,
-            Exception::UsageFault => 18,
-            #[cfg(armv8m_main)]
-            Exception::SecureFault => 19,
-            _ => return false,
-        };
-
-        (self.shcsr.read() & (1 << shift)) > 0
+    pub fn is_enabled(&self, exception: Exception) -> bool {
+        if let Some(shift) = SCB::shcsr_enable_shift(exception) {
+            (self.shcsr.read() & (1 << shift)) > 0
+        } else {
+            false
+        }
     }
 }

From b7ff5f7fe431776f9f8883b0f9dcba53c5b60620 Mon Sep 17 00:00:00 2001
From: Jonas Schievink <jonasschievink@gmail.com>
Date: Sun, 12 Jul 2020 02:43:14 +0200
Subject: [PATCH 6/8] Allow the taken flag to be optimized out

---
 src/peripheral/mod.rs | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/peripheral/mod.rs b/src/peripheral/mod.rs
index 8854830a..84f6b384 100644
--- a/src/peripheral/mod.rs
+++ b/src/peripheral/mod.rs
@@ -143,14 +143,17 @@ pub struct Peripherals {
 // NOTE `no_mangle` is used here to prevent linking different minor versions of this crate as that
 // would let you `take` the core peripherals more than once (one per minor version)
 #[no_mangle]
-static mut CORE_PERIPHERALS: bool = false;
+static CORE_PERIPHERALS: () = ();
+
+/// Set to `true` when `take` or `steal` was called to make `Peripherals` a singleton.
+static mut TAKEN: bool = false;
 
 impl Peripherals {
     /// Returns all the core peripherals *once*
     #[inline]
     pub fn take() -> Option<Self> {
         interrupt::free(|_| {
-            if unsafe { CORE_PERIPHERALS } {
+            if unsafe { TAKEN } {
                 None
             } else {
                 Some(unsafe { Peripherals::steal() })
@@ -161,7 +164,7 @@ impl Peripherals {
     /// Unchecked version of `Peripherals::take`
     #[inline]
     pub unsafe fn steal() -> Self {
-        CORE_PERIPHERALS = true;
+        TAKEN = true;
 
         Peripherals {
             CBP: CBP {

From 202cb2d885c6fe1fa6b8ebfcb81fc1308d378521 Mon Sep 17 00:00:00 2001
From: Adam Greig <adam@adamgreig.com>
Date: Thu, 16 Jul 2020 12:42:30 +0100
Subject: [PATCH 7/8] Always link pre-built asm, required for new cache
 management functions

---
 build.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build.rs b/build.rs
index eb0cd114..d53dea5c 100644
--- a/build.rs
+++ b/build.rs
@@ -6,7 +6,7 @@ fn main() {
     let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
     let name = env::var("CARGO_PKG_NAME").unwrap();
 
-    if target.starts_with("thumb") && env::var_os("CARGO_FEATURE_INLINE_ASM").is_none() {
+    if target.starts_with("thumb") {
         fs::copy(
             format!("bin/{}.a", target),
             out_dir.join(format!("lib{}.a", name)),

From 6717d4bc77d6f1d64183db17a7b473cff723371b Mon Sep 17 00:00:00 2001
From: Adam Greig <adam@adamgreig.com>
Date: Mon, 20 Jul 2020 02:29:43 +0100
Subject: [PATCH 8/8] Update CHANGELOG with 0.6.3 backports

---
 CHANGELOG.md | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 274eb801..65027c3a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -7,6 +7,23 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+## [v0.6.3] - 2020-07-20
+
+### Added
+
+- Initial Cortex-M Security Extension support for armv8m
+- `UDF` intrinsic
+- Methods to enable/disable exceptions in SCB
+
+### Fixed
+
+- Fix bug in `asm::delay` not updating status clobber flags
+- Swapped to `llvm_asm!` to support inline assembly on new nightlies
+- Our precompiled assembly routines have additional debug information
+- ITM `is_fifo_ready` improved to support armv8
+- Cache enabling moved to pre-built assembly routines to prevent possible
+  undefined behaviour
+
 ## [v0.6.2] - 2020-01-12
 
 ### Added
@@ -572,7 +589,8 @@ fn main() {
 - Functions to get the vector table
 - Wrappers over miscellaneous instructions like `bkpt`
 
-[Unreleased]: https://github.com/rust-embedded/cortex-m/compare/v0.6.2...HEAD
+[Unreleased]: https://github.com/rust-embedded/cortex-m/compare/v0.6.3...HEAD
+[v0.6.3]: https://github.com/rust-embedded/cortex-m/compare/v0.6.2...v0.6.3
 [v0.6.2]: https://github.com/rust-embedded/cortex-m/compare/v0.6.1...v0.6.2
 [v0.6.1]: https://github.com/rust-embedded/cortex-m/compare/v0.6.0...v0.6.1
 [v0.6.0]: https://github.com/rust-embedded/cortex-m/compare/v0.5.8...v0.6.0