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Merged
merged 2 commits into from
Nov 24, 2025
Merged

For talos dp dt #306

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3f3588a
FROMLIST: arm64: dts: qcom: talos: Add DisplayPort and QMP USB3-DP PHY
Nov 4, 2025
2ca638a
FROMLIST: arm64: dts: qcom: qcs615-ride: Enable DisplayPort
Nov 4, 2025
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30 changes: 30 additions & 0 deletions arch/arm64/boot/dts/qcom/qcs615-ride.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,20 @@
};
};

dp0-connector {
compatible = "dp-connector";
label = "DP0";
type = "mini";

hpd-gpios = <&io_expander 8 GPIO_ACTIVE_HIGH>;

port {
dp0_connector_in: endpoint {
remote-endpoint = <&mdss_dp0_out>;
};
};
};

dp-dsi0-connector {
compatible = "dp-connector";
label = "DSI0";
Expand Down Expand Up @@ -423,6 +437,15 @@
status = "okay";
};

&mdss_dp0 {
status = "okay";
};

&mdss_dp0_out {
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
remote-endpoint = <&dp0_connector_in>;
};

&mdss_dsi0 {
vdda-supply = <&vreg_l11a>;
status = "okay";
Expand Down Expand Up @@ -631,6 +654,13 @@
status = "okay";
};

&usb_qmpphy_2 {
vdda-phy-supply = <&vreg_l5a>;
vdda-pll-supply = <&vreg_l12a>;

status = "okay";
};

&usb_1 {
status = "okay";
};
Expand Down
115 changes: 113 additions & 2 deletions arch/arm64/boot/dts/qcom/talos.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,qcs615-rpmh.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/power/qcom,rpmhpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
Expand Down Expand Up @@ -3716,6 +3717,7 @@
reg = <0>;

dpu_intf0_out: endpoint {
remote-endpoint = <&mdss_dp0_in>;
};
};

Expand Down Expand Up @@ -3748,6 +3750,89 @@
};
};

mdss_dp0: displayport-controller@ae90000 {
compatible = "qcom,sm6150-dp", "qcom,sm8150-dp", "qcom,sm8350-dp";

reg = <0x0 0x0ae90000 0x0 0x200>,
<0x0 0x0ae90200 0x0 0x200>,
<0x0 0x0ae90400 0x0 0x600>,
<0x0 0x0ae90a00 0x0 0x600>,
<0x0 0x0ae91000 0x0 0x600>;

interrupt-parent = <&mdss>;
interrupts = <12>;

clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
<&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
"stream_pixel",
"stream_1_pixel";

assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
<&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>;
assigned-clock-parents = <&usb_qmpphy_2 QMP_USB43DP_DP_LINK_CLK>,
<&usb_qmpphy_2 QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_qmpphy_2 QMP_USB43DP_DP_VCO_DIV_CLK>;

phys = <&usb_qmpphy_2 QMP_USB43DP_DP_PHY>;
phy-names = "dp";

operating-points-v2 = <&dp_opp_table>;
power-domains = <&rpmhpd RPMHPD_CX>;

#sound-dai-cells = <0>;

status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;

mdss_dp0_in: endpoint {
remote-endpoint = <&dpu_intf0_out>;
};
};

port@1 {
reg = <1>;

mdss_dp0_out: endpoint {
data-lanes = <3 2 0 1>;
};
};
};

dp_opp_table: opp-table {
compatible = "operating-points-v2";

opp-160000000 {
opp-hz = /bits/ 64 <160000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};

opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
required-opps = <&rpmhpd_opp_svs>;
};

opp-540000000 {
opp-hz = /bits/ 64 <540000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
};
};

mdss_dsi0: dsi@ae94000 {
compatible = "qcom,sm6150-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x0 0x0ae94000 0x0 0x400>;
Expand Down Expand Up @@ -3843,8 +3928,8 @@
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<0>,
<0>,
<0>;
<&usb_qmpphy_2 QMP_USB43DP_DP_LINK_CLK>,
<&usb_qmpphy_2 QMP_USB43DP_DP_VCO_DIV_CLK>;

#clock-cells = <1>;
#reset-cells = <1>;
Expand Down Expand Up @@ -4213,6 +4298,32 @@
status = "disabled";
};

usb_qmpphy_2: phy@88e8000 {
compatible = "qcom,qcs615-qmp-usb3-dp-phy";
reg = <0x0 0x088e8000 0x0 0x2000>;

clocks = <&gcc GCC_USB2_SEC_PHY_AUX_CLK>,
<&gcc GCC_USB3_SEC_CLKREF_CLK>,
<&gcc GCC_AHB2PHY_WEST_CLK>,
<&gcc GCC_USB2_SEC_PHY_PIPE_CLK>;
clock-names = "aux",
"ref",
"cfg_ahb",
"pipe";

resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR >,
<&gcc GCC_USB3_DP_PHY_SEC_BCR>;
reset-names = "phy_phy",
"dp_phy";

#clock-cells = <1>;
#phy-cells = <1>;

qcom,tcsr-reg = <&tcsr 0xbff0 0xb24c>;

status = "disabled";
};

usb_1: usb@a6f8800 {
compatible = "qcom,qcs615-dwc3", "qcom,dwc3";
reg = <0x0 0x0a6f8800 0x0 0x400>;
Expand Down