From 5fea01d5c73f55805e9a46ea460a76d965ce5912 Mon Sep 17 00:00:00 2001
From: Chen Lai <chenlai@meta.com>
Date: Mon, 10 Feb 2025 18:13:24 -0800
Subject: [PATCH] Add SoC SXR1230P, SXR2230P, SSG2125P (#8148)

Summary:


As title, need to support SoC SXR2250P

Differential Revision: D69063201
---
 backends/qualcomm/serialization/qc_compiler_spec.fbs | 5 ++++-
 backends/qualcomm/serialization/qc_schema.py         | 6 ++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/backends/qualcomm/serialization/qc_compiler_spec.fbs b/backends/qualcomm/serialization/qc_compiler_spec.fbs
index 963a4b19fa4..0ce41736394 100644
--- a/backends/qualcomm/serialization/qc_compiler_spec.fbs
+++ b/backends/qualcomm/serialization/qc_compiler_spec.fbs
@@ -38,7 +38,10 @@ enum QcomChipset: int {
   SSG2115P = 46,
   SM8650 = 57,
   SA8295 = 39,
-  SM8750 = 69
+  SM8750 = 69,
+  SXR1230P = 45,
+  SXR2230P = 53,
+  SSG2125P = 58,
 }
 
 /// Indicate the information of the specified SoC.
diff --git a/backends/qualcomm/serialization/qc_schema.py b/backends/qualcomm/serialization/qc_schema.py
index 25672efccae..a1ce2b2f53c 100644
--- a/backends/qualcomm/serialization/qc_schema.py
+++ b/backends/qualcomm/serialization/qc_schema.py
@@ -44,6 +44,9 @@ class QcomChipset(IntEnum):
     SM8650 = 57  # v75
     SA8295 = 39  # v68
     SM8750 = 69  # v79
+    SXR1230P = 45
+    SXR2230P = 53
+    SSG2125P = 58
 
 
 @dataclass
@@ -60,6 +63,9 @@ class SocInfo:
     QcomChipset.SM8750: SocInfo(QcomChipset.SM8750, HtpInfo(HtpArch.V79, 8)),
     QcomChipset.SSG2115P: SocInfo(QcomChipset.SSG2115P, HtpInfo(HtpArch.V73, 2)),
     QcomChipset.SA8295: SocInfo(QcomChipset.SA8295, HtpInfo(HtpArch.V68, 8)),
+    QcomChipset.SXR1230P: SocInfo(QcomChipset.SXR1230P, HtpInfo(HtpArch.V73, 2)),
+    QcomChipset.SXR2230P: SocInfo(QcomChipset.SXR2230P, HtpInfo(HtpArch.V69, 8)),
+    QcomChipset.SSG2125P: SocInfo(QcomChipset.SSG2125P, HtpInfo(HtpArch.V73, 2)),
 }