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Merge pull request #1 from penzn/extended-load
Add extended load definitions to SIMD.md
2 parents f8b5081 + fd955ac commit 9bb4698

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proposals/simd/BinarySIMD.md

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@@ -166,5 +166,9 @@ The `v8x16.shuffle2_imm` instruction has 16 bytes after `simdop`.
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| `f32x4.convert_u/i32x4` | `0xb0`| - |
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| `f64x2.convert_s/i64x2` | `0xb1`| - |
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| `f64x2.convert_u/i64x2` | `0xb2`| - |
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| `i8x8.zxload` | `0xb3`| m:memarg |
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| `i8x8.sxload` | `0xb4`| m:memarg |
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| `i16x4.zxload` | `0xb5`| m:memarg |
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| `i16x4.sxload` | `0xb6`| m:memarg |
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| `v8x16.shuffle1` | `0xc0`| - |
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| `v8x16.shuffle2_imm` | `0xc1`| s:LaneIdx32[16] |
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| `v8x16.shuffle2_imm` | `0xc1`| s:LaneIdx32[16] |

proposals/simd/ImplementationStatus.md

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@@ -139,6 +139,10 @@
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| `f32x4.convert_u/i32x4` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| `f64x2.convert_s/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
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| `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
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| `i8x8.zxload` | | | | |
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| `i8x8.sxload` | | | | |
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| `i16x4.zxload` | | | | |
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| `i16x4.sxload` | | | | |
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| `v8x16.shuffle1` | | | :heavy_check_mark: | |
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| `v8x16.shuffle2_imm` | | | :heavy_check_mark: | :heavy_check_mark: |
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proposals/simd/SIMD.md

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@@ -666,6 +666,13 @@ natural alignment.
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Load a `v128` vector from the given heap address.
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Extended loads:
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* `i8x8.zxload(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane
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* `i8x8.sxload(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane
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* `i16x4.zxload(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane
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* `i16x4.sxload(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane
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### Store
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* `v128.store(memarg, data: v128)`

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