diff --git a/opal/mca/pmix/pmix112/pmix/Makefile.am b/opal/mca/pmix/pmix112/pmix/Makefile.am index 500240b5916..1bfdefb1ee6 100644 --- a/opal/mca/pmix/pmix112/pmix/Makefile.am +++ b/opal/mca/pmix/pmix112/pmix/Makefile.am @@ -11,7 +11,7 @@ # All rights reserved. # Copyright (c) 2006-2015 Cisco Systems, Inc. All rights reserved. # Copyright (c) 2012-2013 Los Alamos National Security, Inc. All rights reserved. -# Copyright (c) 2013-2016 Intel, Inc. All rights reserved +# Copyright (c) 2013-2017 Intel, Inc. All rights reserved. # $COPYRIGHT$ # # Additional copyrights may follow @@ -60,24 +60,39 @@ include src/server/Makefile.am include src/sec/Makefile.am include src/common/Makefile.am +include src/atomics/asm/Makefile.am +include src/atomics/sys/Makefile.include + if WANT_DSTORE include src/sm/Makefile.am include src/dstore/Makefile.am endif if PMIX_EMBEDDED_MODE -noinst_LTLIBRARIES = libpmix.la +noinst_LTLIBRARIES = libpmix.la libasm.la libpmix_la_SOURCES = $(headers) $(sources) libpmix_la_LDFLAGS = else -lib_LTLIBRARIES = libpmix.la +lib_LTLIBRARIES = libpmix.la libasm.la libpmix_la_SOURCES = $(headers) $(sources) libpmix_la_LDFLAGS = -version-info $(libpmix_so_version) -SUBDIRS = . test examples +SUBDIRS = . test examples src/atomics/asm +endif + +# ASM Start +if PMIX_HAVE_ASM_FILE +nodist_libasm_la_SOURCES = src/atomics/asm/atomic-asm.S +libasm_la_DEPENDENCIES = src/atomics/asm/generated/@PMIX_ASM_FILE@ +else +nodist_libasm_la_SOURCES = +libasm_la_DEPENDENCIES = endif +dist_libasm_la_SOURCES = src/atomics/asm/asm.c +# ASM End + if WANT_INSTALL_HEADERS pmixdir = $(pmixincludedir)/$(subdir) nobase_pmix_HEADERS = $(headers) @@ -99,9 +114,27 @@ EXTRA_DIST += README INSTALL VERSION LICENSE autogen.sh \ test/test_common.h test/cli_stages.h \ test/server_callbacks.h test/test_fence.h \ test/test_publish.h test/test_resolve_peers.h \ - test/test_spawn.h test/utils.h test/test_cd.h + test/test_spawn.h test/utils.h test/test_cd.h \ + src/atomics/asm/asm-data.txt \ + src/atomics/asm/generate-asm.pl \ + src/atomics/asm/generate-all-asm.pl \ + src/atomics/asm/base/aix.conf \ + src/atomics/asm/base/default.conf \ + src/atomics/asm/base/X86_64.asm \ + src/atomics/asm/base/ARM.asm \ + src/atomics/asm/base/IA32.asm \ + src/atomics/asm/base/IA64.asm \ + src/atomics/asm/base/MIPS.asm \ + src/atomics/asm/base/POWERPC32.asm \ + src/atomics/asm/base/POWERPC64.asm \ + src/atomics/asm/base/SPARCV9_32.asm \ + src/atomics/asm/base/SPARCV9_64.asm +# +# Copy over all the generated files +# dist-hook: + mkdir "${distdir}/src/atomics/asm/generated" + $(PERL) "$(top_srcdir)/src/atomics/asm/generate-all-asm.pl" "$(PERL)" "$(srcdir)/src/atomics/asm" "$(distdir)/src/atomics/asm" env LS_COLORS= sh "$(top_srcdir)/config/distscript.sh" "$(top_srcdir)" "$(distdir)" "$(PMIX_VERSION)" "$(PMIX_REPO_REV)" - diff --git a/opal/mca/pmix/pmix112/pmix/NEWS b/opal/mca/pmix/pmix112/pmix/NEWS index 1acf9297d0e..09944d32c85 100644 --- a/opal/mca/pmix/pmix112/pmix/NEWS +++ b/opal/mca/pmix/pmix112/pmix/NEWS @@ -1,4 +1,4 @@ -Copyright (c) 2015-2016 Intel, Inc. All rights reserved. +# Copyright (c) 2015-2017 Intel, Inc. All rights reserved. Copyright (c) 2016-2017 IBM Corporation. All rights reserved. $COPYRIGHT$ @@ -20,8 +20,20 @@ other, a single NEWS-worthy item might apply to different series. For example, a bug might be fixed in the master, and then moved to the current release as well as the "stable" bug fix release branch. -1.2.1 ------ +1.2.3 -- TBD +---------------------- + + +1.2.2 -- 21 March 2017 +---------------------- +- Compiler fix for Sun/Oracle CC (PR #322) +- Fix missing include (PR #326) +- Improve error checking around posix_fallocate (PR #329) +- Fix possible memory corruption (PR #331) + + +1.2.1 -- 21 Feb. 2017 +---------------------- - dstore: Fix data corruption bug in key overwrite cases - dstore: Performance and scalability fixes - sm: Use posix_fallocate() before mmap @@ -29,8 +41,8 @@ current release as well as the "stable" bug fix release branch. - dstore: Fix extension slot size allocation (Issue #280) -1.2.0 ------ +1.2.0 -- 14 Dec. 2016 +---------------------- - Add shared memory data storage (dstore) option. Default: enabled Configure option: --disable-dstore - PMIx_Commit performance improvements diff --git a/opal/mca/pmix/pmix112/pmix/VERSION b/opal/mca/pmix/pmix112/pmix/VERSION index 8f8cad68461..fdd264d94c4 100644 --- a/opal/mca/pmix/pmix112/pmix/VERSION +++ b/opal/mca/pmix/pmix112/pmix/VERSION @@ -16,7 +16,7 @@ major=1 minor=2 -release=1 +release=3 # greek is used for alpha or beta release tags. If it is non-empty, # it will be appended to the version number. It does not have to be @@ -31,7 +31,7 @@ greek= # command, or with the date (if "git describe" fails) in the form of # "date". -repo_rev=gitef61cf0a +repo_rev=git445f882 # If tarball_version is not empty, it is used as the version string in # the tarball filename, regardless of all other versions listed in @@ -45,7 +45,7 @@ tarball_version= # The date when this release was created -date="Feb 21, 2017" +date="Aug 10, 2017" # The shared library version of each of PMIx's public libraries. # These versions are maintained in accordance with the "Library diff --git a/opal/mca/pmix/pmix112/pmix/config/pmix.m4 b/opal/mca/pmix/pmix112/pmix/config/pmix.m4 index 4be5a53a5bf..a2205c81ee0 100644 --- a/opal/mca/pmix/pmix112/pmix/config/pmix.m4 +++ b/opal/mca/pmix/pmix112/pmix/config/pmix.m4 @@ -180,6 +180,8 @@ AC_DEFUN([PMIX_SETUP_CORE],[ AC_CHECK_TYPES(uint32_t) AC_CHECK_TYPES(int64_t) AC_CHECK_TYPES(uint64_t) + AC_CHECK_TYPES(__int128) + AC_CHECK_TYPES(uint128_t) AC_CHECK_TYPES(long long) AC_CHECK_TYPES(intptr_t) @@ -303,6 +305,17 @@ AC_DEFUN([PMIX_SETUP_CORE],[ PMIX_CHECK_ATTRIBUTES PMIX_CHECK_COMPILER_VERSION_ID + ################################## + # Assembler Configuration + ################################## + + pmix_show_subtitle "Assembler" + + AM_PROG_AS + AC_PATH_PROG(PERL, perl, perl) + PMIX_CONFIG_ASM + + ################################## # Header files ################################## @@ -555,6 +568,16 @@ AC_DEFUN([PMIX_SETUP_CORE],[ AC_C_BIGENDIAN PMIX_CHECK_BROKEN_QSORT + # + # What is the local equivalent of "ln -s" + # + + AC_PROG_LN_S + + AC_PROG_GREP + AC_PROG_EGREP + + ################################## # Visibility ################################## @@ -643,7 +666,10 @@ AC_DEFUN([PMIX_SETUP_CORE],[ pmix_show_subtitle "Final output" - AC_CONFIG_FILES(pmix_config_prefix[Makefile]) + AC_CONFIG_FILES( + pmix_config_prefix[Makefile] + pmix_config_prefix[src/atomics/asm/Makefile] + ) # Success $2 @@ -848,15 +874,15 @@ AC_DEFINE_UNQUOTED([PMIX_ENABLE_TIMING], [$WANT_TIMING], # Install backward compatibility support for PMI-1 and PMI-2 # AC_MSG_CHECKING([if want backward compatibility for PMI-1 and PMI-2]) -AC_ARG_ENABLE(pmix-backward-compatibility, - AC_HELP_STRING([--enable-pmix-backward-compatibility], +AC_ARG_ENABLE(pmi-backward-compatibility, + AC_HELP_STRING([--enable-pmi-backward-compatibility], [enable PMIx support for PMI-1 and PMI-2 (default: enabled)])) -if test "$enable_pmix_backward_compatibility" = "no"; then +if test "$enable_pmi_backward_compatibility" = "no"; then AC_MSG_RESULT([no]) - WANT_PMIX_BACKWARD=0 + WANT_PMI_BACKWARD=0 else AC_MSG_RESULT([yes]) - WANT_PMIX_BACKWARD=1 + WANT_PMI_BACKWARD=1 fi ])dnl @@ -875,7 +901,7 @@ AC_DEFUN([PMIX_DO_AM_CONDITIONALS],[ AM_CONDITIONAL([PMIX_WANT_MUNGE], [test "$pmix_munge_support" = "1"]) AM_CONDITIONAL([PMIX_WANT_SASL], [test "$pmix_sasl_support" = "1"]) AM_CONDITIONAL([WANT_DSTORE],[test "x$enable_dstore" != "xno"]) - AM_CONDITIONAL(WANT_PMIX_BACKWARD, test "$WANT_PMIX_BACKWARD" = 1) + AM_CONDITIONAL(WANT_PMI_BACKWARD, test "$WANT_PMI_BACKWARD" = 1) ]) pmix_did_am_conditionals=yes ])dnl diff --git a/opal/mca/pmix/pmix112/pmix/config/pmix_check_visibility.m4 b/opal/mca/pmix/pmix112/pmix/config/pmix_check_visibility.m4 index 1a4c45cc44f..d92d6211573 100644 --- a/opal/mca/pmix/pmix112/pmix/config/pmix_check_visibility.m4 +++ b/opal/mca/pmix/pmix112/pmix/config/pmix_check_visibility.m4 @@ -12,6 +12,7 @@ # All rights reserved. # Copyright (c) 2006-2015 Cisco Systems, Inc. All rights reserved. # Copyright (c) 2009-2011 Oracle and/or its affiliates. All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. # $COPYRIGHT$ # # Additional copyrights may follow @@ -86,7 +87,7 @@ AC_DEFUN([PMIX_CHECK_VISIBILITY],[ unset pmix_add fi - AC_DEFINE_UNQUOTED([PMIX_C_HAVE_VISIBILITY], [$WANT_VISIBILITY], + AC_DEFINE_UNQUOTED([PMIX_HAVE_VISIBILITY], [$WANT_VISIBILITY], [Whether C compiler supports symbol visibility or not]) AM_CONDITIONAL([WANT_HIDDEN],[test "$WANT_VISIBILITY" = "1"]) ]) diff --git a/opal/mca/pmix/pmix112/pmix/config/pmix_config_asm.m4 b/opal/mca/pmix/pmix112/pmix/config/pmix_config_asm.m4 new file mode 100644 index 00000000000..858e1e6309b --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/config/pmix_config_asm.m4 @@ -0,0 +1,1307 @@ +dnl +dnl Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +dnl University Research and Technology +dnl Corporation. All rights reserved. +dnl Copyright (c) 2004-2015 The University of Tennessee and The University +dnl of Tennessee Research Foundation. All rights +dnl reserved. +dnl Copyright (c) 2004-2006 High Performance Computing Center Stuttgart, +dnl University of Stuttgart. All rights reserved. +dnl Copyright (c) 2004-2005 The Regents of the University of California. +dnl All rights reserved. +dnl Copyright (c) 2008-2015 Cisco Systems, Inc. All rights reserved. +dnl Copyright (c) 2010 Oracle and/or its affiliates. All rights reserved. +dnl Copyright (c) 2015-2017 Research Organization for Information Science +dnl and Technology (RIST). All rights reserved. +dnl Copyright (c) 2014-2016 Los Alamos National Security, LLC. All rights +dnl reserved. +dnl Copyright (c) 2017 Amazon.com, Inc. or its affiliates. All Rights +dnl reserved. +dnl Copyright (c) 2017 Intel, Inc. All rights reserved. +dnl $COPYRIGHT$ +dnl +dnl Additional copyrights may follow +dnl +dnl $HEADER$ +dnl + + +AC_DEFUN([PMIX_CHECK_SYNC_BUILTIN_CSWAP_INT128], [ + + PMIX_VAR_SCOPE_PUSH([sync_bool_compare_and_swap_128_result CFLAGS_save]) + + AC_ARG_ENABLE([cross-cmpset128],[AC_HELP_STRING([--enable-cross-cmpset128], + [enable the use of the __sync builtin atomic compare-and-swap 128 when cross compiling])]) + + sync_bool_compare_and_swap_128_result=0 + + if test ! "$enable_cross_cmpset128" = "yes" ; then + AC_MSG_CHECKING([for processor support of __sync builtin atomic compare-and-swap on 128-bit values]) + + AC_RUN_IFELSE([AC_LANG_PROGRAM([], [__int128 x = 0; __sync_bool_compare_and_swap (&x, 0, 1);])], + [AC_MSG_RESULT([yes]) + sync_bool_compare_and_swap_128_result=1], + [AC_MSG_RESULT([no])], + [AC_MSG_RESULT([no (cross compiling)])]) + + if test $sync_bool_compare_and_swap_128_result = 0 ; then + CFLAGS_save=$CFLAGS + CFLAGS="$CFLAGS -mcx16" + + AC_MSG_CHECKING([for __sync builtin atomic compare-and-swap on 128-bit values with -mcx16 flag]) + AC_RUN_IFELSE([AC_LANG_PROGRAM([], [__int128 x = 0; __sync_bool_compare_and_swap (&x, 0, 1);])], + [AC_MSG_RESULT([yes]) + sync_bool_compare_and_swap_128_result=1 + CFLAGS_save="$CFLAGS"], + [AC_MSG_RESULT([no])], + [AC_MSG_RESULT([no (cross compiling)])]) + + CFLAGS=$CFLAGS_save + fi + else + AC_MSG_CHECKING([for compiler support of __sync builtin atomic compare-and-swap on 128-bit values]) + + # Check if the compiler supports the __sync builtin + AC_TRY_LINK([], [__int128 x = 0; __sync_bool_compare_and_swap (&x, 0, 1);], + [AC_MSG_RESULT([yes]) + sync_bool_compare_and_swap_128_result=1], + [AC_MSG_RESULT([no])]) + + if test $sync_bool_compare_and_swap_128_result = 0 ; then + CFLAGS_save=$CFLAGS + CFLAGS="$CFLAGS -mcx16" + + AC_MSG_CHECKING([for __sync builtin atomic compare-and-swap on 128-bit values with -mcx16 flag]) + AC_TRY_LINK([], [__int128 x = 0; __sync_bool_compare_and_swap (&x, 0, 1);], + [AC_MSG_RESULT([yes]) + sync_bool_compare_and_swap_128_result=1 + CFLAGS_save="$CFLAGS"], + [AC_MSG_RESULT([no])]) + + CFLAGS=$CFLAGS_save + fi + fi + + AC_DEFINE_UNQUOTED([PMIX_HAVE_SYNC_BUILTIN_CSWAP_INT128], [$sync_bool_compare_and_swap_128_result], + [Whether the __sync builtin atomic compare and swap supports 128-bit values]) + + PMIX_VAR_SCOPE_POP +]) + +AC_DEFUN([PMIX_CHECK_SYNC_BUILTINS], [ + AC_MSG_CHECKING([for __sync builtin atomics]) + + AC_TRY_LINK([long tmp;], [__sync_synchronize(); +__sync_bool_compare_and_swap(&tmp, 0, 1); +__sync_add_and_fetch(&tmp, 1);], + [AC_MSG_RESULT([yes]) + $1], + [AC_MSG_RESULT([no]) + $2]) + + AC_MSG_CHECKING([for 64-bit __sync builtin atomics]) + + AC_TRY_LINK([ +#include +uint64_t tmp;], [ +__sync_bool_compare_and_swap(&tmp, 0, 1); +__sync_add_and_fetch(&tmp, 1);], + [AC_MSG_RESULT([yes]) + pmix_asm_sync_have_64bit=1], + [AC_MSG_RESULT([no]) + pmix_asm_sync_have_64bit=0]) + + AC_DEFINE_UNQUOTED([PMIX_ASM_SYNC_HAVE_64BIT],[$pmix_asm_sync_have_64bit], + [Whether 64-bit is supported by the __sync builtin atomics]) + + # Check for 128-bit support + PMIX_CHECK_SYNC_BUILTIN_CSWAP_INT128 +]) + + +AC_DEFUN([PMIX_CHECK_GCC_BUILTIN_CSWAP_INT128], [ + + PMIX_VAR_SCOPE_PUSH([atomic_compare_exchange_n_128_result CFLAGS_save]) + + AC_ARG_ENABLE([cross-cmpset128],[AC_HELP_STRING([--enable-cross-cmpset128], + [enable the use of the __sync builtin atomic compare-and-swap 128 when cross compiling])]) + + atomic_compare_exchange_n_128_result=0 + + if test ! "$enable_cross_cmpset128" = "yes" ; then + AC_MSG_CHECKING([for processor support of __atomic builtin atomic compare-and-swap on 128-bit values]) + + AC_RUN_IFELSE([AC_LANG_PROGRAM([], [__int128 x = 0, y = 0; __atomic_compare_exchange_n (&x, &y, 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);])], + [AC_MSG_RESULT([yes]) + atomic_compare_exchange_n_128_result=1], + [AC_MSG_RESULT([no])], + [AC_MSG_RESULT([no (cross compiling)])]) + + if test $atomic_compare_exchange_n_128_result = 0 ; then + CFLAGS_save=$CFLAGS + CFLAGS="$CFLAGS -mcx16" + + AC_MSG_CHECKING([for __atomic builtin atomic compare-and-swap on 128-bit values with -mcx16 flag]) + AC_RUN_IFELSE([AC_LANG_PROGRAM([], [__int128 x = 0, y = 0; __atomic_compare_exchange_n (&x, &y, 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);])], + [AC_MSG_RESULT([yes]) + atomic_compare_exchange_n_128_result=1 + CFLAGS_save="$CFLAGS"], + [AC_MSG_RESULT([no])], + [AC_MSG_RESULT([no (cross compiling)])]) + + CFLAGS=$CFLAGS_save + fi + + if test $atomic_compare_exchange_n_128_result = 1 ; then + AC_MSG_CHECKING([if __int128 atomic compare-and-swap is always lock-free]) + AC_RUN_IFELSE([AC_LANG_PROGRAM([], [if (!__atomic_always_lock_free(16, 0)) { return 1; }])], + [AC_MSG_RESULT([yes])], + [AC_MSG_RESULT([no]) + PMIX_CHECK_SYNC_BUILTIN_CSWAP_INT128 + atomic_compare_exchange_n_128_result=0], + [AC_MSG_RESULT([no (cross compiling)])]) + fi + else + AC_MSG_CHECKING([for compiler support of __atomic builtin atomic compare-and-swap on 128-bit values]) + + # Check if the compiler supports the __atomic builtin + AC_TRY_LINK([], [__int128 x = 0, y = 0; __atomic_compare_exchange_n (&x, &y, 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);], + [AC_MSG_RESULT([yes]) + atomic_compare_exchange_n_128_result=1], + [AC_MSG_RESULT([no])]) + + if test $atomic_compare_exchange_n_128_result = 0 ; then + CFLAGS_save=$CFLAGS + CFLAGS="$CFLAGS -mcx16" + + AC_MSG_CHECKING([for __atomic builtin atomic compare-and-swap on 128-bit values with -mcx16 flag]) + AC_TRY_LINK([], [__int128 x = 0, y = 0; __atomic_compare_exchange_n (&x, &y, 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED);], + [AC_MSG_RESULT([yes]) + atomic_compare_exchange_n_128_result=1 + CFLAGS_save="$CFLAGS"], + [AC_MSG_RESULT([no])]) + + CFLAGS=$CFLAGS_save + fi + fi + + AC_DEFINE_UNQUOTED([PMIX_HAVE_GCC_BUILTIN_CSWAP_INT128], [$atomic_compare_exchange_n_128_result], + [Whether the __atomic builtin atomic compare and swap is lock-free on 128-bit values]) + + PMIX_VAR_SCOPE_POP +]) + +AC_DEFUN([PMIX_CHECK_GCC_ATOMIC_BUILTINS], [ + AC_MSG_CHECKING([for __atomic builtin atomics]) + + AC_TRY_LINK([long tmp, old = 0;], [__atomic_thread_fence(__ATOMIC_SEQ_CST); +__atomic_compare_exchange_n(&tmp, &old, 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED); +__atomic_add_fetch(&tmp, 1, __ATOMIC_RELAXED);], + [AC_MSG_RESULT([yes]) + $1], + [AC_MSG_RESULT([no]) + $2]) + + # Check for 128-bit support + PMIX_CHECK_GCC_BUILTIN_CSWAP_INT128 +]) + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_TEXT +dnl +dnl Determine how to set current mode as text. +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_TEXT],[ + AC_MSG_CHECKING([directive for setting text section]) + pmix_cv_asm_text="" + if test "$pmix_cv_c_compiler_vendor" = "microsoft" ; then + # text section will be brought in with the rest of + # header for MS - leave blank for now + pmix_cv_asm_text="" + else + case $host in + *-aix*) + pmix_cv_asm_text=[".csect .text[PR]"] + ;; + *) + pmix_cv_asm_text=".text" + ;; + esac + fi + AC_MSG_RESULT([$pmix_cv_asm_text]) + AC_DEFINE_UNQUOTED([PMIX_ASM_TEXT], ["$pmix_cv_asm_text"], + [Assembly directive for setting text section]) + PMIX_ASM_TEXT="$pmix_cv_asm_text" + AC_SUBST(PMIX_ASM_TEXT) +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_GLOBAL +dnl +dnl Sets PMIX_ASM_GLOBAL to the value to prefix global values +dnl +dnl I'm sure if I don't have a test for this, there will be some +dnl dumb platform that uses something else +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_GLOBAL],[ + AC_MSG_CHECKING([directive for exporting symbols]) + pmix_cv_asm_global="" + if test "$pmix_cv_c_compiler_vendor" = "microsoft" ; then + pmix_cv_asm_global="PUBLIC" + else + case $host in + *) + pmix_cv_asm_global=".globl" + ;; + esac + fi + AC_MSG_RESULT([$pmix_cv_asm_global]) + AC_DEFINE_UNQUOTED([PMIX_ASM_GLOBAL], ["$pmix_cv_asm_global"], + [Assembly directive for exporting symbols]) + PMIX_ASM_GLOBAL="$pmix_cv_asm_global" + AC_SUBST(PMIX_AS_GLOBAL) +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_LSYM +dnl +dnl Sets PMIX_ASM_LSYM to the prefix value on a symbol to make it +dnl an internal label (jump target and whatnot) +dnl +dnl We look for L .L $ L$ (in that order) for something that both +dnl assembles and does not leave a label in the output of nm. Fall +dnl back to L if nothing else seems to work :/ +dnl +dnl ################################################################# + +# _PMIX_CHECK_ASM_LSYM([variable-to-set]) +# --------------------------------------- +AC_DEFUN([_PMIX_CHECK_ASM_LSYM],[ + AC_REQUIRE([AC_PROG_GREP]) + + $1="L" + + for sym in L .L $ L$ ; do + asm_result=0 + echo "configure: trying $sym" >&AC_FD_CC + PMIX_TRY_ASSEMBLE([foobar$pmix_cv_asm_label_suffix +${sym}mytestlabel$pmix_cv_asm_label_suffix], + [# ok, we succeeded at assembling. see if we can nm, + # throwing the results in a file + if $NM conftest.$OBJEXT > conftest.out 2>&AC_FD_CC ; then + if test "`$GREP mytestlabel conftest.out`" = "" ; then + # there was no symbol... looks promising to me + $1="$sym" + asm_result=1 + elif test ["`$GREP ' [Nt] .*mytestlabel' conftest.out`"] = "" ; then + # see if we have a non-global-ish symbol + # but we should see if we can do better. + $1="$sym" + fi + else + # not so much on the NM goodness :/ + echo "$NM failed. Output from NM was:" >&AC_FD_CC + cat conftest.out >&AC_FD_CC + AC_MSG_WARN([$NM could not read object file]) + fi + ]) + if test "$asm_result" = "1" ; then + break + fi + done + rm -f conftest.out + unset asm_result sym +]) + +# PMIX_CHECK_ASM_LSYM() +# --------------------- +AC_DEFUN([PMIX_CHECK_ASM_LSYM],[ + AC_REQUIRE([AC_PROG_NM]) + + AC_CACHE_CHECK([prefix for lsym labels], + [pmix_cv_asm_lsym], + [_PMIX_CHECK_ASM_LSYM([pmix_cv_asm_lsym])]) + AC_DEFINE_UNQUOTED([PMIX_ASM_LSYM], ["$pmix_cv_asm_lsym"], + [Assembly prefix for lsym labels]) + PMIX_ASM_LSYM="$pmix_cv_asm_lsym" + AC_SUBST(PMIX_ASM_LSYM) +])dnl + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_PROC +dnl +dnl Sets a cv-flag, if the compiler needs a proc/endp-definition to +dnl link with C. +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_PROC],[ + AC_CACHE_CHECK([if .proc/endp is needed], + [pmix_cv_asm_need_proc], + [pmix_cv_asm_need_proc="no" + PMIX_TRY_ASSEMBLE([ + .proc mysym +mysym: + .endp mysym], + [pmix_cv_asm_need_proc="yes"]) + rm -f conftest.out]) + + if test "$pmix_cv_asm_need_proc" = "yes" ; then + pmix_cv_asm_proc=".proc" + pmix_cv_asm_endproc=".endp" + else + pmix_cv_asm_proc="#" + pmix_cv_asm_endproc="#" + fi +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_GSYM +dnl +dnl Sets PMIX_ASM_GSYM to the prefix value on a symbol to make it +dnl a global linkable from C. Basically, an _ or not. +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_GSYM],[ + AC_CACHE_CHECK([prefix for global symbol labels], + [pmix_cv_asm_gsym], + [_PMIX_CHECK_ASM_GSYM]) + + if test "$pmix_cv_asm_gsym" = "none" ; then + AC_MSG_ERROR([Could not determine global symbol label prefix]) + fi + + AC_DEFINE_UNQUOTED([PMIX_ASM_GSYM], ["$pmix_cv_asm_gsym"], + [Assembly prefix for gsym labels]) + PMIX_ASM_GSYM="$pmix_cv_asm_gsym" + AC_SUBST(PMIX_ASM_GSYM) + +]) + +AC_DEFUN([_PMIX_CHECK_ASM_GSYM],[ + pmix_cv_asm_gsym="none" + + for sym in "_" "" "." ; do + asm_result=0 + echo "configure: trying $sym" >&AC_FD_CC +cat > conftest_c.c <&AC_FD_CC + pmix_link="$CC $CFLAGS conftest_c.$OBJEXT conftest.$OBJEXT -o conftest $LDFLAGS $LIBS > conftest.link 2>&1" + if AC_TRY_EVAL(pmix_link) ; then + # save the warnings + cat conftest.link >&AC_FD_CC + asm_result=1 + else + cat conftest.link >&AC_FD_CC + echo "configure: failed C program was: " >&AC_FD_CC + cat conftest_c.c >&AC_FD_CC + echo "configure: failed ASM program was: " >&AC_FD_CC + cat conftest.s >&AC_FD_CC + asm_result=0 + fi + else + # save output and failed program + cat conftest.cmpl >&AC_FD_CC + echo "configure: failed C program was: " >&AC_FD_CC + cat conftest.c >&AC_FD_CC + asm_result=0 + fi], + [asm_result=0]) + if test "$asm_result" = "1" ; then + pmix_cv_asm_gsym="$sym" + break + fi + done + rm -rf conftest.* +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_LABEL_SUFFIX +dnl +dnl Sets PMIX_ASM_LABEL_SUFFIX to the value to suffix for labels +dnl +dnl I'm sure if I don't have a test for this, there will be some +dnl dumb platform that uses something else +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_LABEL_SUFFIX],[ + AC_MSG_CHECKING([suffix for labels]) + pmix_cv_asm_label_suffix="" + case $host in + *) + pmix_cv_asm_label_suffix=":" + ;; + esac + AC_MSG_RESULT([$pmix_cv_asm_label_suffix]) + AC_DEFINE_UNQUOTED([PMIX_ASM_LABEL_SUFFIX], ["$pmix_cv_asm_label_suffix"], + [Assembly suffix for labels]) + PMIX_ASM_LABEL_SUFFIX="$pmix_cv_asm_label_suffix" + AC_SUBST(PMIX_AS_LABEL_SUFFIX) +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_ALIGN_LOG +dnl +dnl Sets PMIX_ASM_ALIGN_LOG to 1 if align is specified +dnl logarithmically, 0 otherwise +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_ALIGN_LOG],[ + AC_REQUIRE([AC_PROG_NM]) + AC_REQUIRE([AC_PROG_GREP]) + + AC_CACHE_CHECK([if .align directive takes logarithmic value], + [pmix_cv_asm_align_log], + [ PMIX_TRY_ASSEMBLE([ $pmix_cv_asm_text + .align 4 + $pmix_cv_asm_global foo + .byte 1 + .align 4 +foo$pmix_cv_asm_label_suffix + .byte 2], + [pmix_asm_addr=[`$NM conftest.$OBJEXT | $GREP foo | sed -e 's/.*\([0-9a-fA-F][0-9a-fA-F]\).*foo.*/\1/'`]], + [pmix_asm_addr=""]) + # test for both 16 and 10 (decimal and hex notations) + echo "configure: .align test address offset is $pmix_asm_addr" >&AC_FD_CC + if test "$pmix_asm_addr" = "16" || test "$pmix_asm_addr" = "10" ; then + pmix_cv_asm_align_log="yes" + else + pmix_cv_asm_align_log="no" + fi]) + + if test "$pmix_cv_asm_align_log" = "yes" || test "$pmix_cv_asm_align_log" = "1" ; then + pmix_asm_align_log_result=1 + else + pmix_asm_align_log_result=0 + fi + + AC_DEFINE_UNQUOTED([PMIX_ASM_ALIGN_LOG], + [$asm_align_log_result], + [Assembly align directive expects logarithmic value]) + + unset omp_asm_addr asm_result +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_TYPE +dnl +dnl Sets PMIX_ASM_TYPE to the prefix for the function type to +dnl set a symbol's type as function (needed on ELF for shared +dnl libaries). If no .type directive is needed, sets PMIX_ASM_TYPE +dnl to an empty string +dnl +dnl We look for @ \# % +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_TYPE],[ + AC_CACHE_CHECK([prefix for function in .type], + [pmix_cv_asm_type], + [_PMIX_CHECK_ASM_TYPE]) + + AC_DEFINE_UNQUOTED([PMIX_ASM_TYPE], ["$pmix_cv_asm_type"], + [How to set function type in .type directive]) + PMIX_ASM_TYPE="$pmix_cv_asm_type" + AC_SUBST(PMIX_ASM_TYPE) +]) + +AC_DEFUN([_PMIX_CHECK_ASM_TYPE],[ + pmix_cv_asm_type="" + + case "${host}" in + *-sun-solaris*) + # GCC on solaris seems to accept just about anything, not + # that what it defines actually works... So just hardwire + # to the right answer + pmix_cv_asm_type="#" + ;; + *) + for type in @ \# % ; do + asm_result=0 + echo "configure: trying $type" >&AC_FD_CC + PMIX_TRY_ASSEMBLE([ .type mysym, ${type}function +mysym:], + [pmix_cv_asm_type="${type}" + asm_result=1]) + if test "$asm_result" = "1" ; then + break + fi + done + ;; + esac + rm -f conftest.out + + unset asm_result type +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_ASM_SIZE +dnl +dnl Sets PMIX_ASM_SIZE to 1 if we should set .size directives for +dnl each function, 0 otherwise. +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_ASM_SIZE],[ + AC_CACHE_CHECK([if .size is needed], + [pmix_cv_asm_need_size], + [pmix_cv_asm_need_size="no" + PMIX_TRY_ASSEMBLE([ .size mysym, 1], + [pmix_cv_asm_need_size="yes"]) + rm -f conftest.out]) + + if test "$pmix_cv_asm_need_size" = "yes" ; then + pmix_asm_size=1 + else + pmix_asm_size=0 + fi + + AC_DEFINE_UNQUOTED([PMIX_ASM_SIZE], ["$pmix_asm_size"], + [Do we need to give a .size directive]) + PMIX_ASM_SIZE="$pmix_asm_size" + AC_SUBST(PMIX_ASM_TYPE) + unset asm_result +])dnl + + +# PMIX_CHECK_ASM_GNU_STACKEXEC(var) +# ---------------------------------- +# sets shell variable var to the things necessary to +# disable execable stacks with GAS +AC_DEFUN([PMIX_CHECK_ASM_GNU_STACKEXEC], [ + AC_REQUIRE([AC_PROG_GREP]) + + AC_CHECK_PROG([OBJDUMP], [objdump], [objdump]) + AC_CACHE_CHECK([if .note.GNU-stack is needed], + [pmix_cv_asm_gnu_stack_result], + [AS_IF([test "$OBJDUMP" != ""], + [ # first, see if a simple C program has it set + cat >conftest.c < /dev/null && pmix_cv_asm_gnu_stack_result=yes], + [PMIX_LOG_MSG([the failed program was:], 1) + PMIX_LOG_FILE([conftest.c]) + pmix_cv_asm_gnu_stack_result=no]) + if test "$pmix_cv_asm_gnu_stack_result" != "yes" ; then + pmix_cv_asm_gnu_stack_result="no" + fi + rm -rf conftest.*], + [pmix_cv_asm_gnu_stack_result="no"])]) + if test "$pmix_cv_asm_gnu_stack_result" = "yes" ; then + pmix_cv_asm_gnu_stack=1 + else + pmix_cv_asm_gnu_stack=0 + fi +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_POWERPC_REG +dnl +dnl See if the notation for specifying registers is X (most everyone) +dnl or rX (OS X) +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_POWERPC_REG],[ + AC_MSG_CHECKING([if PowerPC registers have r prefix]) + PMIX_TRY_ASSEMBLE([$pmix_cv_asm_text + addi 1,1,0], + [pmix_cv_asm_powerpc_r_reg=0], + [PMIX_TRY_ASSEMBLE([$pmix_cv_asm_text + addi r1,r1,0], + [pmix_cv_asm_powerpc_r_reg=1], + [AC_MSG_ERROR([Can not determine how to use PPC registers])])]) + if test "$pmix_cv_asm_powerpc_r_reg" = "1" ; then + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([no]) + fi + + AC_DEFINE_UNQUOTED([PMIX_POWERPC_R_REGISTERS], + [$pmix_cv_asm_powerpc_r_reg], + [Whether r notation is used for ppc registers]) +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_POWERPC_64BIT +dnl +dnl On some powerpc chips (the PPC970 or G5), the OS usually runs in +dnl 32 bit mode, even though the hardware can do 64bit things. If +dnl the compiler will let us, emit code for 64bit test and set type +dnl operations (on a long long). +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_POWERPC_64BIT],[ + if test "$ac_cv_sizeof_long" != "4" ; then + # this function should only be called in the 32 bit case + AC_MSG_ERROR([CHECK_POWERPC_64BIT called on 64 bit platform. Internal error.]) + fi + AC_MSG_CHECKING([for 64-bit PowerPC assembly support]) + case $host in + *-darwin*) + ppc64_result=0 + if test "$pmix_cv_asm_powerpc_r_reg" = "1" ; then + ldarx_asm=" ldarx r1,r1,r1"; + else + ldarx_asm=" ldarx 1,1,1"; + fi + PMIX_TRY_ASSEMBLE([$pmix_cv_asm_text + $ldarx_asm], + [ppc64_result=1], + [ppc64_result=0]) + ;; + *) + ppc64_result=0 + ;; + esac + + if test "$ppc64_result" = "1" ; then + AC_MSG_RESULT([yes]) + ifelse([$1],,:,[$1]) + else + AC_MSG_RESULT([no]) + ifelse([$2],,:,[$2]) + fi + + unset ppc64_result ldarx_asm +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_SPARCV8PLUS +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_SPARCV8PLUS],[ + AC_MSG_CHECKING([if have Sparc v8+/v9 support]) + sparc_result=0 + PMIX_TRY_ASSEMBLE([$pmix_cv_asm_text + casa [%o0] 0x80, %o1, %o2], + [sparc_result=1], + [sparc_result=0]) + if test "$sparc_result" = "1" ; then + AC_MSG_RESULT([yes]) + ifelse([$1],,:,[$1]) + else + AC_MSG_RESULT([no]) + ifelse([$2],,:,[$2]) + fi + + unset sparc_result +])dnl + +dnl ################################################################# +dnl +dnl PMIX_CHECK_CMPXCHG16B +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_CMPXCHG16B],[ + PMIX_VAR_SCOPE_PUSH([cmpxchg16b_result]) + + AC_ARG_ENABLE([cross-cmpxchg16b],[AC_HELP_STRING([--enable-cross-cmpxchg16b], + [enable the use of the cmpxchg16b instruction when cross compiling])]) + + if test ! "$enable_cross_cmpxchg16b" = "yes" ; then + AC_MSG_CHECKING([if processor supports x86_64 16-byte compare-and-exchange]) + AC_RUN_IFELSE([AC_LANG_PROGRAM([[unsigned char tmp[16];]],[[ + __asm__ __volatile__ ("lock cmpxchg16b (%%rsi)" : : "S" (tmp) : "memory", "cc");]])], + [AC_MSG_RESULT([yes]) + cmpxchg16b_result=1], + [AC_MSG_RESULT([no]) + cmpxchg16b_result=0], + [AC_MSG_RESULT([no (cross-compiling)]) + cmpxchg16b_result=0]) + else + AC_MSG_CHECKING([if assembler supports x86_64 16-byte compare-and-exchange]) + + PMIX_TRY_ASSEMBLE([$pmix_cv_asm_text + cmpxchg16b 0], + [AC_MSG_RESULT([yes]) + cmpxchg16b_result=1], + [AC_MSG_RESULT([no]) + cmpxchg16b_result=0]) + fi + if test "$cmpxchg16b_result" = 1; then + AC_MSG_CHECKING([if compiler correctly handles volatile 128bits]) + AC_RUN_IFELSE([AC_LANG_PROGRAM([#include +#include + +union pmix_counted_pointer_t { + struct { + uint64_t counter; + uint64_t item; + } data; +#if defined(HAVE___INT128) && HAVE___INT128 + __int128 value; +#elif defined(HAVE_INT128_T) && HAVE_INT128_T + int128_t value; +#endif +}; +typedef union pmix_counted_pointer_t pmix_counted_pointer_t;], + [volatile pmix_counted_pointer_t a; + pmix_counted_pointer_t b; + + a.data.counter = 0; + a.data.item = 0x1234567890ABCDEF; + + b.data.counter = a.data.counter; + b.data.item = a.data.item; + + /* bozo checks */ + assert(16 == sizeof(pmix_counted_pointer_t)); + assert(a.data.counter == b.data.counter); + assert(a.data.item == b.data.item); + /* + * the following test fails on buggy compilers + * so far, with icc -o conftest conftest.c + * - intel icc 14.0.0.080 (aka 2013sp1) + * - intel icc 14.0.1.106 (aka 2013sp1u1) + * older and more recents compilers work fine + * buggy compilers work also fine but only with -O0 + */ +#if (defined(HAVE___INT128) && HAVE___INT128) || (defined(HAVE_INT128_T) && HAVE_INT128_T) + return (a.value != b.value); +#else + return 0; +#endif])], + [AC_MSG_RESULT([yes])], + [AC_MSG_RESULT([no]) + cmpxchg16b_result=0], + [AC_MSG_RESULT([untested, assuming ok])]) + fi + AC_DEFINE_UNQUOTED([PMIX_HAVE_CMPXCHG16B], [$cmpxchg16b_result], + [Whether the processor supports the cmpxchg16b instruction]) + PMIX_VAR_SCOPE_POP +])dnl + +dnl ################################################################# +dnl +dnl PMIX_CHECK_INLINE_GCC +dnl +dnl Check if the compiler is capable of doing GCC-style inline +dnl assembly. Some compilers emit a warning and ignore the inline +dnl assembly (xlc on OS X) and compile without error. Therefore, +dnl the test attempts to run the emited code to check that the +dnl assembly is actually run. To run this test, one argument to +dnl the macro must be an assembly instruction in gcc format to move +dnl the value 0 into the register containing the variable ret. +dnl For PowerPC, this would be: +dnl +dnl "li %0,0" : "=&r"(ret) +dnl +dnl For testing ia32 assembly, the assembly instruction xaddl is +dnl tested. The xaddl instruction is used by some of the atomic +dnl implementations so it makes sense to test for it. In addition, +dnl some compilers (i.e. earlier versions of Sun Studio 12) do not +dnl necessarily handle xaddl properly, so that needs to be detected +dnl during configure time. +dnl +dnl DEFINE PMIX_GCC_INLINE_ASSEMBLY to 0 or 1 depending on GCC +dnl support +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_INLINE_C_GCC],[ + assembly="$1" + asm_result="unknown" + + AC_MSG_CHECKING([if $CC supports GCC inline assembly]) + + if test ! "$assembly" = "" ; then + AC_RUN_IFELSE([AC_LANG_PROGRAM([AC_INCLUDES_DEFAULT],[[ +int ret = 1; +int negone = -1; +__asm__ __volatile__ ($assembly); +return ret; + ]])], + [asm_result="yes"], [asm_result="no"], + [asm_result="unknown"]) + else + assembly="test skipped - assuming no" + fi + + # if we're cross compiling, just try to compile and figure good enough + if test "$asm_result" = "unknown" ; then + AC_LINK_IFELSE([AC_LANG_PROGRAM([AC_INCLUDES_DEFAULT],[[ +int ret = 1; +int negone = -1; +__asm__ __volatile__ ($assembly); +return ret; + ]])], + [asm_result="yes"], [asm_result="no"]) + fi + + AC_MSG_RESULT([$asm_result]) + + if test "$asm_result" = "yes" ; then + PMIX_C_GCC_INLINE_ASSEMBLY=1 + else + PMIX_C_GCC_INLINE_ASSEMBLY=0 + fi + + AC_DEFINE_UNQUOTED([PMIX_C_GCC_INLINE_ASSEMBLY], + [$PMIX_C_GCC_INLINE_ASSEMBLY], + [Whether C compiler supports GCC style inline assembly]) + + unset PMIX_C_GCC_INLINE_ASSEMBLY assembly asm_result +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_INLINE_DEC +dnl +dnl DEFINE PMIX_DEC to 0 or 1 depending on DEC +dnl support +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_INLINE_C_DEC],[ + + AC_MSG_CHECKING([if $CC supports DEC inline assembly]) + + AC_LINK_IFELSE([AC_LANG_PROGRAM([ +AC_INCLUDES_DEFAULT +#include ], +[[asm(""); +return 0;]])], + [asm_result="yes"], [asm_result="no"]) + + AC_MSG_RESULT([$asm_result]) + + if test "$asm_result" = "yes" ; then + PMIX_C_DEC_INLINE_ASSEMBLY=1 + else + PMIX_C_DEC_INLINE_ASSEMBLY=0 + fi + + AC_DEFINE_UNQUOTED([PMIX_C_DEC_INLINE_ASSEMBLY], + [$PMIX_C_DEC_INLINE_ASSEMBLY], + [Whether C compiler supports DEC style inline assembly]) + + unset PMIX_C_DEC_INLINE_ASSEMBLY asm_result +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CHECK_INLINE_XLC +dnl +dnl DEFINE PMIX_XLC to 0 or 1 depending on XLC +dnl support +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CHECK_INLINE_C_XLC],[ + + AC_MSG_CHECKING([if $CC supports XLC inline assembly]) + + PMIX_C_XLC_INLINE_ASSEMBLY=0 + asm_result="no" + if test "$CC" = "xlc" ; then + PMIX_XLC_INLINE_ASSEMBLY=1 + asm_result="yes" + fi + + AC_MSG_RESULT([$asm_result]) + AC_DEFINE_UNQUOTED([PMIX_C_XLC_INLINE_ASSEMBLY], + [$PMIX_C_XLC_INLINE_ASSEMBLY], + [Whether C compiler supports XLC style inline assembly]) + + unset PMIX_C_XLC_INLINE_ASSEMBLY +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_CONFIG_ASM +dnl +dnl DEFINE PMIX_ASSEMBLY_ARCH to something in sys/architecture.h +dnl DEFINE PMIX_ASSEMBLY_FORMAT to string containing correct +dnl format for assembly (not user friendly) +dnl SUBST PMIX_ASSEMBLY_FORMAT to string containing correct +dnl format for assembly (not user friendly) +dnl +dnl ################################################################# +AC_DEFUN([PMIX_CONFIG_ASM],[ + AC_REQUIRE([PMIX_SETUP_CC]) + AC_REQUIRE([AM_PROG_AS]) + + AC_ARG_ENABLE([builtin-atomics], + [AC_HELP_STRING([--enable-builtin-atomics], + [Enable use of __sync builtin atomics (default: enabled)])], + [], [enable_builtin_atomics="yes"]) + + pmix_cv_asm_builtin="BUILTIN_NO" + if test "$pmix_cv_asm_builtin" = "BUILTIN_NO" && test "$enable_builtin_atomics" = "yes" ; then + PMIX_CHECK_GCC_ATOMIC_BUILTINS([pmix_cv_asm_builtin="BUILTIN_GCC"], []) + fi + if test "$pmix_cv_asm_builtin" = "BUILTIN_NO" && test "$enable_builtin_atomics" = "yes" ; then + PMIX_CHECK_SYNC_BUILTINS([pmix_cv_asm_builtin="BUILTIN_SYNC"], []) + fi + + PMIX_CHECK_ASM_PROC + PMIX_CHECK_ASM_TEXT + PMIX_CHECK_ASM_GLOBAL + PMIX_CHECK_ASM_GNU_STACKEXEC + PMIX_CHECK_ASM_LABEL_SUFFIX + PMIX_CHECK_ASM_GSYM + PMIX_CHECK_ASM_LSYM + PMIX_CHECK_ASM_TYPE + PMIX_CHECK_ASM_SIZE + PMIX_CHECK_ASM_ALIGN_LOG + + # find our architecture for purposes of assembly stuff + pmix_cv_asm_arch="UNSUPPORTED" + PMIX_GCC_INLINE_ASSIGN="" + PMIX_ASM_SUPPORT_64BIT=0 + case "${host}" in + x86_64-*x32) + pmix_cv_asm_arch="X86_64" + PMIX_ASM_SUPPORT_64BIT=1 + PMIX_GCC_INLINE_ASSIGN='"xaddl %1,%0" : "=m"(ret), "+r"(negone) : "m"(ret)' + ;; + i?86-*|x86_64*|amd64*) + if test "$ac_cv_sizeof_long" = "4" ; then + pmix_cv_asm_arch="IA32" + else + pmix_cv_asm_arch="X86_64" + fi + PMIX_ASM_SUPPORT_64BIT=1 + PMIX_GCC_INLINE_ASSIGN='"xaddl %1,%0" : "=m"(ret), "+r"(negone) : "m"(ret)' + PMIX_CHECK_CMPXCHG16B + ;; + + ia64-*) + pmix_cv_asm_arch="IA64" + PMIX_ASM_SUPPORT_64BIT=1 + PMIX_GCC_INLINE_ASSIGN='"mov %0=r0\n;;\n" : "=&r"(ret)' + ;; + aarch64*) + pmix_cv_asm_arch="ARM64" + PMIX_ASM_SUPPORT_64BIT=1 + PMIX_ASM_ARM_VERSION=8 + AC_DEFINE_UNQUOTED([PMIX_ASM_ARM_VERSION], [$PMIX_ASM_ARM_VERSION], + [What ARM assembly version to use]) + PMIX_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)' + ;; + + armv7*|arm-*-linux-gnueabihf) + pmix_cv_asm_arch="ARM" + PMIX_ASM_SUPPORT_64BIT=1 + PMIX_ASM_ARM_VERSION=7 + AC_DEFINE_UNQUOTED([PMIX_ASM_ARM_VERSION], [$PMIX_ASM_ARM_VERSION], + [What ARM assembly version to use]) + PMIX_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)' + ;; + + armv6*) + pmix_cv_asm_arch="ARM" + PMIX_ASM_SUPPORT_64BIT=0 + PMIX_ASM_ARM_VERSION=6 + CCASFLAGS="$CCASFLAGS -march=armv7-a" + AC_DEFINE_UNQUOTED([PMIX_ASM_ARM_VERSION], [$PMIX_ASM_ARM_VERSION], + [What ARM assembly version to use]) + PMIX_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)' + ;; + + armv5*linux*|armv4*linux*|arm-*-linux-gnueabi) + # uses Linux kernel helpers for some atomic operations + pmix_cv_asm_arch="ARM" + PMIX_ASM_SUPPORT_64BIT=0 + PMIX_ASM_ARM_VERSION=5 + CCASFLAGS="$CCASFLAGS -march=armv7-a" + AC_DEFINE_UNQUOTED([PMIX_ASM_ARM_VERSION], [$PMIX_ASM_ARM_VERSION], + [What ARM assembly version to use]) + PMIX_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)' + ;; + + mips-*|mips64*) + # Should really find some way to make sure that we are on + # a MIPS III machine (r4000 and later) + pmix_cv_asm_arch="MIPS" + PMIX_ASM_SUPPORT_64BIT=1 + PMIX_GCC_INLINE_ASSIGN='"or %0,[$]0,[$]0" : "=&r"(ret)' + ;; + + powerpc-*|powerpc64-*|powerpcle-*|powerpc64le-*|rs6000-*|ppc-*) + PMIX_CHECK_POWERPC_REG + if test "$ac_cv_sizeof_long" = "4" ; then + pmix_cv_asm_arch="POWERPC32" + + # Note that on some platforms (Apple G5), even if we are + # compiling in 32 bit mode (and therefore should assume + # sizeof(long) == 4), we can use the 64 bit test and set + # operations. + PMIX_CHECK_POWERPC_64BIT(PMIX_ASM_SUPPORT_64BIT=1) + elif test "$ac_cv_sizeof_long" = "8" ; then + PMIX_ASM_SUPPORT_64BIT=1 + pmix_cv_asm_arch="POWERPC64" + else + AC_MSG_ERROR([Could not determine PowerPC word size: $ac_cv_sizeof_long]) + fi + PMIX_GCC_INLINE_ASSIGN='"1: li %0,0" : "=&r"(ret)' + ;; + + # There is no current difference between s390 and s390x + # But use two different defines in case some come later + # as s390 is 31bits while s390x is 64bits + s390-*) + pmix_cv_asm_arch="S390" + ;; + s390x-*) + pmix_cv_asm_arch="S390X" + ;; + + sparc*-*) + # SPARC v9 (and above) are the only ones with 64bit support + # if compiling 32 bit, see if we are v9 (aka v8plus) or + # earlier (casa is v8+/v9). + if test "$ac_cv_sizeof_long" = "4" ; then + have_v8plus=0 + PMIX_CHECK_SPARCV8PLUS([have_v8plus=1]) + if test "$have_v8plus" = "0" ; then + PMIX_ASM_SUPPORT_64BIT=0 + pmix_cv_asm_arch="SPARC" +AC_MSG_WARN([Sparc v8 target is not supported in this release of Open MPI.]) +AC_MSG_WARN([You must specify the target architecture v8plus to compile]) +AC_MSG_WARN([Open MPI in 32 bit mode on Sparc processors (see the README).]) +AC_MSG_ERROR([Can not continue.]) + else + PMIX_ASM_SUPPORT_64BIT=1 + pmix_cv_asm_arch="SPARCV9_32" + fi + + elif test "$ac_cv_sizeof_long" = "8" ; then + PMIX_ASM_SUPPORT_64BIT=1 + pmix_cv_asm_arch="SPARCV9_64" + else + AC_MSG_ERROR([Could not determine Sparc word size: $ac_cv_sizeof_long]) + fi + PMIX_GCC_INLINE_ASSIGN='"mov 0,%0" : "=&r"(ret)' + ;; + + *) + PMIX_CHECK_SYNC_BUILTINS([pmix_cv_asm_builtin="BUILTIN_SYNC"], + [AC_MSG_ERROR([No atomic primitives available for $host])]) + ;; + esac + + if test "x$PMIX_ASM_SUPPORT_64BIT" = "x1" && test "$pmix_cv_asm_builtin" = "BUILTIN_SYNC" && + test "$pmix_asm_sync_have_64bit" = "0" ; then + # __sync builtins exist but do not implement 64-bit support. Fall back on inline asm. + pmix_cv_asm_builtin="BUILTIN_NO" + fi + + if test "$pmix_cv_asm_builtin" = "BUILTIN_SYNC" || test "$pmix_cv_asm_builtin" = "BUILTIN_GCC" ; then + AC_DEFINE([PMIX_C_GCC_INLINE_ASSEMBLY], [1], + [Whether C compiler supports GCC style inline assembly]) + else + AC_DEFINE_UNQUOTED([PMIX_ASM_SUPPORT_64BIT], + [$PMIX_ASM_SUPPORT_64BIT], + [Whether we can do 64bit assembly operations or not. Should not be used outside of the assembly header files]) + AC_SUBST([PMIX_ASM_SUPPORT_64BIT]) + + # + # figure out if we need any special function start / stop code + # + case $host_os in + aix*) + pmix_asm_arch_config="aix" + ;; + *) + pmix_asm_arch_config="default" + ;; + esac + + # now that we know our architecture, try to inline assemble + PMIX_CHECK_INLINE_C_GCC([$PMIX_GCC_INLINE_ASSIGN]) + PMIX_CHECK_INLINE_C_DEC + PMIX_CHECK_INLINE_C_XLC + + # format: + # config_file-text-global-label_suffix-gsym-lsym-type-size-align_log-ppc_r_reg-64_bit-gnu_stack + asm_format="${pmix_asm_arch_config}" + asm_format="${asm_format}-${pmix_cv_asm_text}-${pmix_cv_asm_global}" + asm_format="${asm_format}-${pmix_cv_asm_label_suffix}-${pmix_cv_asm_gsym}" + asm_format="${asm_format}-${pmix_cv_asm_lsym}" + asm_format="${asm_format}-${pmix_cv_asm_type}-${pmix_asm_size}" + asm_format="${asm_format}-${pmix_asm_align_log_result}" + if test "$pmix_cv_asm_arch" = "POWERPC32" || test "$pmix_cv_asm_arch" = "POWERPC64" ; then + asm_format="${asm_format}-${pmix_cv_asm_powerpc_r_reg}" + else + asm_format="${asm_format}-1" + fi + asm_format="${asm_format}-${PMIX_ASM_SUPPORT_64BIT}" + pmix_cv_asm_format="${asm_format}-${pmix_cv_asm_gnu_stack}" + # For the Makefile, need to escape the $ as $$. Don't display + # this version, but make sure the Makefile gives the right thing + # when regenerating the files because the base has been touched. + PMIX_ASSEMBLY_FORMAT=`echo "$pmix_cv_asm_format" | sed -e 's/\\\$/\\\$\\\$/'` + + AC_MSG_CHECKING([for assembly format]) + AC_MSG_RESULT([$pmix_cv_asm_format]) + AC_DEFINE_UNQUOTED([PMIX_ASSEMBLY_FORMAT], ["$PMIX_ASSEMBLY_FORMAT"], + [Format of assembly file]) + AC_SUBST([PMIX_ASSEMBLY_FORMAT]) + fi # if pmix_cv_asm_builtin = BUILTIN_SYNC + + result="PMIX_$pmix_cv_asm_arch" + PMIX_ASSEMBLY_ARCH="$pmix_cv_asm_arch" + AC_MSG_CHECKING([for assembly architecture]) + AC_MSG_RESULT([$pmix_cv_asm_arch]) + AC_DEFINE_UNQUOTED([PMIX_ASSEMBLY_ARCH], [$result], + [Architecture type of assembly to use for atomic operations and CMA]) + AC_SUBST([PMIX_ASSEMBLY_ARCH]) + + # Check for RDTSCP support + result=0 + AS_IF([test "$pmix_cv_asm_arch" = "PMIX_X86_64" || test "$pmix_cv_asm_arch" = "PMIX_IA32"], + [AC_MSG_CHECKING([for RDTSCP assembly support]) + AC_LANG_PUSH([C]) + AC_TRY_RUN([[ +int main(int argc, char* argv[]) +{ + unsigned int rax, rdx; + __asm__ __volatile__ ("rdtscp\n": "=a" (rax), "=d" (rdx):: "%rax", "%rdx"); + return 0; +} + ]], + [result=1 + AC_MSG_RESULT([yes])], + [AC_MSG_RESULT([no])], + [#cross compile not supported + AC_MSG_RESULT(["no (cross compiling)"])]) + AC_LANG_POP([C])]) + AC_DEFINE_UNQUOTED([PMIX_ASSEMBLY_SUPPORTS_RDTSCP], [$result], + [Whether we have support for RDTSCP instruction]) + + result="PMIX_$pmix_cv_asm_builtin" + PMIX_ASSEMBLY_BUILTIN="$pmix_cv_asm_builtin" + AC_MSG_CHECKING([for builtin atomics]) + AC_MSG_RESULT([$pmix_cv_asm_builtin]) + AC_DEFINE_UNQUOTED([PMIX_ASSEMBLY_BUILTIN], [$result], + [Whether to use builtin atomics]) + AC_SUBST([PMIX_ASSEMBLY_BUILTIN]) + + PMIX_ASM_FIND_FILE + + unset result asm_format +])dnl + + +dnl ################################################################# +dnl +dnl PMIX_ASM_FIND_FILE +dnl +dnl +dnl do all the evil mojo to provide a working assembly file +dnl +dnl ################################################################# +AC_DEFUN([PMIX_ASM_FIND_FILE], [ + AC_REQUIRE([AC_PROG_GREP]) + AC_REQUIRE([AC_PROG_FGREP]) + +if test "$pmix_cv_asm_arch" != "WINDOWS" && test "$pmix_cv_asm_builtin" != "BUILTIN_SYNC" && test "$pmix_cv_asm_builtin" != "BUILTIN_GCC" && test "$pmix_cv_asm_builtin" != "BUILTIN_OSX" ; then + # see if we have a pre-built one already + AC_MSG_CHECKING([for pre-built assembly file]) + pmix_cv_asm_file="" + if $GREP "$pmix_cv_asm_arch" "${PMIX_TOP_SRCDIR}/src/atomics/asm/asm-data.txt" | $FGREP "$pmix_cv_asm_format" >conftest.out 2>&1 ; then + pmix_cv_asm_file="`cut -f3 conftest.out`" + if test ! "$pmix_cv_asm_file" = "" ; then + pmix_cv_asm_file="atomic-${pmix_cv_asm_file}.s" + if test -f "${PMIX_TOP_SRCDIR}/src/atomics/asm/generated/${pmix_cv_asm_file}" ; then + AC_MSG_RESULT([yes ($pmix_cv_asm_file)]) + else + AC_MSG_RESULT([no ($pmix_cv_asm_file not found)]) + pmix_cv_asm_file="" + fi + fi + else + AC_MSG_RESULT([no (not in asm-data)]) + fi + rm -rf conftest.* + + if test "$pmix_cv_asm_file" = "" ; then + # Can we generate a file? + AC_MSG_CHECKING([whether possible to generate assembly file]) + mkdir -p pmix/asm/generated + pmix_cv_asm_file="atomic-local.s" + pmix_try='$PERL $PMIX_TOP_SRCDIR/src/atomics/asm/generate-asm.pl $pmix_cv_asm_arch "$pmix_cv_asm_format" $PMIX_TOP_SRCDIR/src/atomics/asm/base $PMIX_TOP_BUILDDIR/src/atomics/asm/generated/$pmix_cv_asm_file >conftest.out 2>&1' + if AC_TRY_EVAL(pmix_try) ; then + # save the warnings + cat conftest.out >&AC_FD_CC + AC_MSG_RESULT([yes]) + else + # save output + cat conftest.out >&AC_FD_CC + pmix_cv_asm_file="" + AC_MSG_RESULT([failed]) + AC_MSG_WARN([Could not build atomic operations assembly file.]) + AC_MSG_WARN([There will be no atomic operations for this build.]) + fi + fi + rm -rf conftest.* +else + # On windows with VC++, atomics are done with compiler primitives + pmix_cv_asm_file="" +fi + + AC_MSG_CHECKING([for atomic assembly filename]) + if test "$pmix_cv_asm_file" = "" ; then + AC_MSG_RESULT([none]) + result=0 + else + AC_MSG_RESULT([$pmix_cv_asm_file]) + result=1 + fi + + AC_DEFINE_UNQUOTED([PMIX_HAVE_ASM_FILE], [$result], + [Whether there is an atomic assembly file available]) + AM_CONDITIONAL([PMIX_HAVE_ASM_FILE], [test "$result" = "1"]) + + PMIX_ASM_FILE=$pmix_cv_asm_file + AC_SUBST(PMIX_ASM_FILE) +])dnl diff --git a/opal/mca/pmix/pmix112/pmix/config/pmix_try_assemble.m4 b/opal/mca/pmix/pmix112/pmix/config/pmix_try_assemble.m4 new file mode 100644 index 00000000000..eba8dfd629a --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/config/pmix_try_assemble.m4 @@ -0,0 +1,52 @@ +dnl +dnl Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +dnl University Research and Technology +dnl Corporation. All rights reserved. +dnl Copyright (c) 2004-2005 The University of Tennessee and The University +dnl of Tennessee Research Foundation. All rights +dnl reserved. +dnl Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +dnl University of Stuttgart. All rights reserved. +dnl Copyright (c) 2004-2005 The Regents of the University of California. +dnl All rights reserved. +dnl Copyright (c) 2014-2017 Intel, Inc. All rights reserved. +dnl $COPYRIGHT$ +dnl +dnl Additional copyrights may follow +dnl +dnl $HEADER$ +dnl + +dnl PMIX_TRY_ASSEMBLE(asm-code, [action-if-success], [action-if-fail]) +dnl +dnl Attempt to assemble asm-code. If success, run action-if-success. +dnl Otherwise, run action-if-fail. Neither action-if-success nor +dnl action-if-fail are required. +dnl +dnl No preprocessing is guaranteed to be done on asm-code. Some +dnl compilers do not run the preprocessor on assembly files. +dnl +dnl On failure, asm-test.s will be included in config.out +AC_DEFUN([PMIX_TRY_ASSEMBLE], +[cat >conftest.s <&AC_FD_CC + ifelse([$2],,:,[$2]) +else + # save compiler output and failed program + cat conftest.out >&AC_FD_CC + echo "configure: failed program was:" >&AC_FD_CC + cat conftest.s >&AC_FD_CC + ifelse([$3],,:,[$3]) +fi +rm -rf conftest* +unset pmix_assemble +])dnl diff --git a/opal/mca/pmix/pmix112/pmix/include/Makefile.am b/opal/mca/pmix/pmix112/pmix/include/Makefile.am index 6086b95ae53..f50f893ca85 100644 --- a/opal/mca/pmix/pmix112/pmix/include/Makefile.am +++ b/opal/mca/pmix/pmix112/pmix/include/Makefile.am @@ -18,7 +18,7 @@ include_HEADERS = \ include/pmix_server.h \ include/pmix_version.h.in -if WANT_PMIX_BACKWARD +if WANT_PMI_BACKWARD include_HEADERS += \ include/pmi.h \ include/pmi2.h diff --git a/opal/mca/pmix/pmix112/pmix/include/pmi.h b/opal/mca/pmix/pmix112/pmix/include/pmi.h index bc09ca1ed99..dda46feca77 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmi.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmi.h @@ -48,6 +48,12 @@ #ifndef PMI_H #define PMI_H +#ifdef PMIX_HAVE_VISIBILITY +#define PMIX_EXPORT __attribute__((__visibility__("default"))) +#else +#define PMIX_EXPORT +#endif + /* prototypes for the PMI interface in MPICH2 */ #if defined(__cplusplus) @@ -119,7 +125,7 @@ this process was created by 'PMI_Spawn_multiple'. 'spawned' will be 'PMI_TRUE' this process group has a parent and 'PMI_FALSE' if it does not. @*/ -int PMI_Init( int *spawned ); +PMIX_EXPORT int PMI_Init( int *spawned ); /*@ PMI_Initialized - check if PMI has been initialized @@ -139,7 +145,7 @@ On successful output, initialized will either be 'PMI_TRUE' or 'PMI_FALSE'. - PMI_FALSE - initialize has not been called or previously failed. @*/ -int PMI_Initialized( PMI_BOOL *initialized ); +PMIX_EXPORT int PMI_Initialized( PMI_BOOL *initialized ); /*@ PMI_Finalize - finalize the Process Manager Interface @@ -152,7 +158,7 @@ Return values: Finalize PMI for this process group. @*/ -int PMI_Finalize( void ); +PMIX_EXPORT int PMI_Finalize( void ); /*@ PMI_Get_size - obtain the size of the process group @@ -170,7 +176,7 @@ This function returns the size of the process group to which the local process belongs. @*/ -int PMI_Get_size( int *size ); +PMIX_EXPORT int PMI_Get_size( int *size ); /*@ PMI_Get_rank - obtain the rank of the local process in the process group @@ -187,7 +193,7 @@ Return values: This function returns the rank of the local process in its process group. @*/ -int PMI_Get_rank( int *rank ); +PMIX_EXPORT int PMI_Get_rank( int *rank ); /*@ PMI_Get_universe_size - obtain the universe size @@ -202,7 +208,7 @@ Return values: @*/ -int PMI_Get_universe_size( int *size ); +PMIX_EXPORT int PMI_Get_universe_size( int *size ); /*@ PMI_Get_appnum - obtain the application number @@ -217,10 +223,10 @@ Return values: @*/ -int PMI_Get_appnum( int *appnum ); +PMIX_EXPORT int PMI_Get_appnum( int *appnum ); /*@ -PMI_Publish_name - publish a name +PMI_Publish_name - publish a name Input parameters: . service_name - string representing the service being published @@ -233,7 +239,7 @@ Return values: @*/ -int PMI_Publish_name( const char service_name[], const char port[] ); +PMIX_EXPORT int PMI_Publish_name( const char service_name[], const char port[] ); /*@ PMI_Unpublish_name - unpublish a name @@ -248,7 +254,7 @@ Return values: @*/ -int PMI_Unpublish_name( const char service_name[] ); +PMIX_EXPORT int PMI_Unpublish_name( const char service_name[] ); /*@ PMI_Lookup_name - lookup a service by name @@ -266,7 +272,7 @@ Return values: @*/ -int PMI_Lookup_name( const char service_name[], char port[] ); +PMIX_EXPORT int PMI_Lookup_name( const char service_name[], char port[] ); /*@ PMI_Get_id - obtain the id of the process group @@ -289,7 +295,7 @@ that the local process belongs to. The string passed in must be at least as long as the number returned by 'PMI_Get_id_length_max()'. @*/ -int PMI_Get_id( char id_str[], int length ); +PMIX_EXPORT int PMI_Get_id( char id_str[], int length ); /*@ PMI_Get_kvs_domain_id - obtain the id of the PMI domain @@ -312,7 +318,7 @@ where keyval spaces can be shared. The string passed in must be at least as long as the number returned by 'PMI_Get_id_length_max()'. @*/ -int PMI_Get_kvs_domain_id( char id_str[], int length ); +PMIX_EXPORT int PMI_Get_kvs_domain_id( char id_str[], int length ); /*@ PMI_Get_id_length_max - obtain the maximum length of an id string @@ -329,7 +335,7 @@ Return values: This function returns the maximum length of a process group id string. @*/ -int PMI_Get_id_length_max( int *length ); +PMIX_EXPORT int PMI_Get_id_length_max( int *length ); /*@ PMI_Barrier - barrier across the process group @@ -344,7 +350,7 @@ the local process belongs to. It will not return until all the processes have called 'PMI_Barrier()'. @*/ -int PMI_Barrier( void ); +PMIX_EXPORT int PMI_Barrier( void ); /*@ PMI_Get_clique_size - obtain the number of processes on the local node @@ -364,7 +370,7 @@ function to distinguish between processes that can communicate through IPC mechanisms (e.g., shared memory) and other network mechanisms. @*/ -int PMI_Get_clique_size( int *size ); +PMIX_EXPORT int PMI_Get_clique_size( int *size ); /*@ PMI_Get_clique_ranks - get the ranks of the local processes in the process group @@ -389,7 +395,7 @@ communicate through IPC mechanisms (e.g., shared memory) and other network mechanisms. @*/ -int PMI_Get_clique_ranks( int ranks[], int length); +PMIX_EXPORT int PMI_Get_clique_ranks( int ranks[], int length); /*@ PMI_Abort - abort the process group associated with this process @@ -401,7 +407,7 @@ Input Parameters: Return values: . none - this function should not return @*/ -int PMI_Abort(int exit_code, const char error_msg[]); +PMIX_EXPORT int PMI_Abort(int exit_code, const char error_msg[]); /* PMI Keymap functions */ /*@ @@ -426,7 +432,7 @@ kvsname, must be at least as long as the value returned by 'PMI_KVS_Get_name_length_max()'. @*/ -int PMI_KVS_Get_my_name( char kvsname[], int length ); +PMIX_EXPORT int PMI_KVS_Get_my_name( char kvsname[], int length ); /*@ PMI_KVS_Get_name_length_max - obtain the length necessary to store a kvsname @@ -444,11 +450,11 @@ This function returns the string length required to store a keyval space name. A routine is used rather than setting a maximum value in 'pmi.h' to allow different implementations of PMI to be used with the same executable. These -different implementations may allow different maximum lengths; by using a +different implementations may allow different maximum lengths; by using a routine here, we can interface with a variety of implementations of PMI. @*/ -int PMI_KVS_Get_name_length_max( int *length ); +PMIX_EXPORT int PMI_KVS_Get_name_length_max( int *length ); /*@ PMI_KVS_Get_key_length_max - obtain the length necessary to store a key @@ -465,7 +471,7 @@ Return values: This function returns the string length required to store a key. @*/ -int PMI_KVS_Get_key_length_max( int *length ); +PMIX_EXPORT int PMI_KVS_Get_key_length_max( int *length ); /*@ PMI_KVS_Get_value_length_max - obtain the length necessary to store a value @@ -483,7 +489,7 @@ This function returns the string length required to store a value from a keyval space. @*/ -int PMI_KVS_Get_value_length_max( int *length ); +PMIX_EXPORT int PMI_KVS_Get_value_length_max( int *length ); /*@ PMI_KVS_Create - create a new keyval space @@ -508,7 +514,7 @@ parameter, kvsname, must be at least as long as the value returned by 'PMI_KVS_Get_name_length_max()'. @*/ -int PMI_KVS_Create( char kvsname[], int length ); +PMIX_EXPORT int PMI_KVS_Create( char kvsname[], int length ); /*@ PMI_KVS_Destroy - destroy keyval space @@ -525,7 +531,7 @@ Return values: This function destroys a keyval space created by 'PMI_KVS_Create()'. @*/ -int PMI_KVS_Destroy( const char kvsname[] ); +PMIX_EXPORT int PMI_KVS_Destroy( const char kvsname[] ); /*@ PMI_KVS_Put - put a key/value pair in a keyval space @@ -544,14 +550,14 @@ Return values: Notes: This function puts the key/value pair in the specified keyval space. The -value is not visible to other processes until 'PMI_KVS_Commit()' is called. +value is not visible to other processes until 'PMI_KVS_Commit()' is called. The function may complete locally. After 'PMI_KVS_Commit()' is called, the value may be retrieved by calling 'PMI_KVS_Get()'. All keys put to a keyval space must be unique to the keyval space. You may not put more than once with the same key. @*/ -int PMI_KVS_Put( const char kvsname[], const char key[], const char value[]); +PMIX_EXPORT int PMI_KVS_Put( const char kvsname[], const char key[], const char value[]); /*@ PMI_KVS_Commit - commit all previous puts to the keyval space @@ -569,7 +575,7 @@ This function commits all previous puts since the last 'PMI_KVS_Commit()' into the specified keyval space. It is a process local operation. @*/ -int PMI_KVS_Commit( const char kvsname[] ); +PMIX_EXPORT int PMI_KVS_Commit( const char kvsname[] ); /*@ PMI_KVS_Get - get a key/value pair from a keyval space @@ -594,7 +600,7 @@ Return values: This function gets the value of the specified key in the keyval space. @*/ -int PMI_KVS_Get( const char kvsname[], const char key[], char value[], int length); +PMIX_EXPORT int PMI_KVS_Get( const char kvsname[], const char key[], char value[], int length); /*@ PMI_KVS_Iter_first - initialize the iterator and get the first value @@ -625,7 +631,7 @@ the values returned by 'PMI_KVS_Get_key_length_max()' and 'PMI_KVS_Get_value_length_max()'. @*/ -int PMI_KVS_Iter_first(const char kvsname[], char key[], int key_len, char val[], int val_len); +PMIX_EXPORT int PMI_KVS_Iter_first(const char kvsname[], char key[], int key_len, char val[], int val_len); /*@ PMI_KVS_Iter_next - get the next keyval pair from the keyval space @@ -649,14 +655,14 @@ Return values: - PMI_FAIL - failed to get the next keyval pair Notes: -This function retrieves the next keyval pair from the specified keyval space. +This function retrieves the next keyval pair from the specified keyval space. 'PMI_KVS_Iter_first()' must have been previously called. The end of the keyval space is specified by returning an empty key string. The output parameters, key and val, must be at least as long as the values returned by 'PMI_KVS_Get_key_length_max()' and 'PMI_KVS_Get_value_length_max()'. @*/ -int PMI_KVS_Iter_next(const char kvsname[], char key[], int key_len, char val[], int val_len); +PMIX_EXPORT int PMI_KVS_Iter_next(const char kvsname[], char key[], int key_len, char val[], int val_len); /* PMI Process Creation functions */ @@ -682,7 +688,7 @@ Input Parameters: . cmds - array of command strings . argvs - array of argv arrays for each command string . maxprocs - array of maximum processes to spawn for each command string -. info_keyval_sizes - array giving the number of elements in each of the +. info_keyval_sizes - array giving the number of elements in each of the 'info_keyval_vectors' . info_keyval_vectors - array of keyval vector arrays . preput_keyval_size - Number of elements in 'preput_keyval_vector' @@ -703,22 +709,22 @@ field refers to the size of the array parameters - 'cmd', 'argvs', 'maxprocs', to the size of the 'preput_keyval_vector' array. The 'preput_keyval_vector' contains keyval pairs that will be put in the keyval space of the newly created process group before the processes are started. The 'maxprocs' array -specifies the desired number of processes to create for each 'cmd' string. +specifies the desired number of processes to create for each 'cmd' string. The actual number of processes may be less than the numbers specified in maxprocs. The acceptable number of processes spawned may be controlled by ``soft'' keyvals in the info arrays. The ``soft'' option is specified by mpiexec in the MPI-2 standard. Environment variables may be passed to the spawned processes through PMI implementation specific 'info_keyval' parameters. @*/ -int PMI_Spawn_multiple(int count, - const char * cmds[], - const char ** argvs[], - const int maxprocs[], - const int info_keyval_sizesp[], - const PMI_keyval_t * info_keyval_vectors[], - int preput_keyval_size, - const PMI_keyval_t preput_keyval_vector[], - int errors[]); +PMIX_EXPORT int PMI_Spawn_multiple(int count, + const char * cmds[], + const char ** argvs[], + const int maxprocs[], + const int info_keyval_sizesp[], + const PMI_keyval_t * info_keyval_vectors[], + int preput_keyval_size, + const PMI_keyval_t preput_keyval_vector[], + int errors[]); /*@ @@ -752,7 +758,7 @@ arguments in the args array, this function may parse more than one argument as l as the options are contiguous in the args array. @*/ -int PMI_Parse_option(int num_args, char *args[], int *num_parsed, PMI_keyval_t **keyvalp, int *size); +PMIX_EXPORT int PMI_Parse_option(int num_args, char *args[], int *num_parsed, PMI_keyval_t **keyvalp, int *size); /*@ PMI_Args_to_keyval - create keyval structures from command line arguments @@ -774,12 +780,12 @@ Return values: This function removes PMI specific arguments from the command line and creates the corresponding 'PMI_keyval_t' structures for them. It returns an array and size to the caller that can then be passed to 'PMI_Spawn_multiple()'. -The array can be freed by 'PMI_Free_keyvals()'. The routine 'free()' should +The array can be freed by 'PMI_Free_keyvals()'. The routine 'free()' should not be used to free this array as there is no requirement that the array be allocated with 'malloc()'. @*/ -int PMI_Args_to_keyval(int *argcp, char *((*argvp)[]), PMI_keyval_t **keyvalp, int *size); +PMIX_EXPORT int PMI_Args_to_keyval(int *argcp, char *((*argvp)[]), PMI_keyval_t **keyvalp, int *size); /*@ PMI_Free_keyvals - free the keyval structures created by PMI_Args_to_keyval @@ -795,10 +801,10 @@ Return values: Notes: This function frees the data returned by 'PMI_Args_to_keyval' and 'PMI_Parse_option'. - Using this routine instead of 'free' allows the PMI package to track + Using this routine instead of 'free' allows the PMI package to track allocation of storage or to use interal storage as it sees fit. @*/ -int PMI_Free_keyvals(PMI_keyval_t keyvalp[], int size); +PMIX_EXPORT int PMI_Free_keyvals(PMI_keyval_t keyvalp[], int size); /*@ PMI_Get_options - get a string of command line argument descriptions that may be printed to the user @@ -820,7 +826,7 @@ Return values: Notes: This function returns the command line options specific to the pmi implementation @*/ -int PMI_Get_options(char *str, int *length); +PMIX_EXPORT int PMI_Get_options(char *str, int *length); #if defined(__cplusplus) } diff --git a/opal/mca/pmix/pmix112/pmix/include/pmi2.h b/opal/mca/pmix/pmix112/pmix/include/pmi2.h index 77052916040..c217ff71367 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmi2.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmi2.h @@ -12,6 +12,13 @@ #define PMI2_MAX_ATTRVALUE 1024 #define PMI2_ID_NULL -1 +#ifdef PMIX_HAVE_VISIBILITY +#define PMIX_EXPORT __attribute__((__visibility__("default"))) +#else +#define PMIX_EXPORT +#endif + + #if defined(__cplusplus) extern "C" { #endif @@ -117,7 +124,7 @@ typedef struct PMI2_Connect_comm { iff this process group has a parent. @*/ -int PMI2_Init(int *spawned, int *size, int *rank, int *appnum); +PMIX_EXPORT int PMI2_Init(int *spawned, int *size, int *rank, int *appnum); /*@ PMI2_Finalize - finalize the Process Manager Interface @@ -129,7 +136,7 @@ int PMI2_Init(int *spawned, int *size, int *rank, int *appnum); Finalize PMI for this job. @*/ -int PMI2_Finalize(void); +PMIX_EXPORT int PMI2_Finalize(void); /*@ PMI2_Initialized - check if PMI has been initialized @@ -138,7 +145,7 @@ int PMI2_Finalize(void); Non-zero if PMI2_Initialize has been called successfully, zero otherwise. @*/ -int PMI2_Initialized(void); +PMIX_EXPORT int PMI2_Initialized(void); /*@ PMI2_Abort - abort the process group associated with this process @@ -152,7 +159,7 @@ int PMI2_Initialized(void); error code otherwise. @*/ -int PMI2_Abort(int flag, const char msg[]); +PMIX_EXPORT int PMI2_Abort(int flag, const char msg[]); /*@ PMI2_Spawn - spawn a new set of processes @@ -191,15 +198,15 @@ int PMI2_Abort(int flag, const char msg[]); mpiexec in the MPI-2 standard. Environment variables may be passed to the spawned processes through PMI implementation specific 'info_keyval' parameters. @*/ -int PMI2_Job_Spawn(int count, const char * cmds[], - int argcs[], const char ** argvs[], - const int maxprocs[], - const int info_keyval_sizes[], - const PMI_keyval_t *info_keyval_vectors[], - int preput_keyval_size, - const PMI_keyval_t *preput_keyval_vector[], - char jobId[], int jobIdSize, - int errors[]); +PMIX_EXPORT int PMI2_Job_Spawn(int count, const char * cmds[], + int argcs[], const char ** argvs[], + const int maxprocs[], + const int info_keyval_sizes[], + const PMI_keyval_t *info_keyval_vectors[], + int preput_keyval_size, + const PMI_keyval_t *preput_keyval_vector[], + char jobId[], int jobIdSize, + int errors[]); /*@ PMI2_Job_GetId - get job id of this job @@ -214,7 +221,7 @@ int PMI2_Job_Spawn(int count, const char * cmds[], Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Job_GetId(char jobid[], int jobid_size); +PMIX_EXPORT int PMI2_Job_GetId(char jobid[], int jobid_size); /*@ PMI2_Job_GetRank - get rank of this job @@ -223,7 +230,7 @@ int PMI2_Job_GetId(char jobid[], int jobid_size); Return values: Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Job_GetRank(int* rank); +PMIX_EXPORT int PMI2_Job_GetRank(int* rank); /*@ PMI2_Info_GetSize - get the number of processes on the node @@ -232,7 +239,7 @@ int PMI2_Job_GetRank(int* rank); Return values: Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Info_GetSize(int* size); +PMIX_EXPORT int PMI2_Info_GetSize(int* size); /*@ PMI2_Job_Connect - connect to the parallel job with ID jobid @@ -256,7 +263,7 @@ int PMI2_Info_GetSize(int* size); side. Processes that are already connected may call this routine. @*/ -int PMI2_Job_Connect(const char jobid[], PMI2_Connect_comm_t *conn); +PMIX_EXPORT int PMI2_Job_Connect(const char jobid[], PMI2_Connect_comm_t *conn); /*@ PMI2_Job_Disconnect - disconnects from the job with ID jobid @@ -268,7 +275,7 @@ int PMI2_Job_Connect(const char jobid[], PMI2_Connect_comm_t *conn); Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Job_Disconnect(const char jobid[]); +PMIX_EXPORT int PMI2_Job_Disconnect(const char jobid[]); /*@ PMI2_KVS_Put - put a key/value pair in the keyval space for this job @@ -287,7 +294,7 @@ int PMI2_Job_Disconnect(const char jobid[]); is not defined. @*/ -int PMI2_KVS_Put(const char key[], const char value[]); +PMIX_EXPORT int PMI2_KVS_Put(const char key[], const char value[]); /*@ PMI2_KVS_Fence - commit all PMI2_KVS_Put calls made before this fence @@ -307,7 +314,7 @@ int PMI2_KVS_Put(const char key[], const char value[]); implementations. @*/ -int PMI2_KVS_Fence(void); +PMIX_EXPORT int PMI2_KVS_Fence(void); /*@ PMI2_KVS_Get - returns the value associated with key in the key-value @@ -331,7 +338,7 @@ int PMI2_KVS_Fence(void); Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_KVS_Get(const char *jobid, int src_pmi_id, const char key[], char value [], int maxvalue, int *vallen); +PMIX_EXPORT int PMI2_KVS_Get(const char *jobid, int src_pmi_id, const char key[], char value [], int maxvalue, int *vallen); /*@ PMI2_Info_GetNodeAttr - returns the value of the attribute associated @@ -371,7 +378,7 @@ int PMI2_KVS_Get(const char *jobid, int src_pmi_id, const char key[], char value file. Returned as a string. @*/ -int PMI2_Info_GetNodeAttr(const char name[], char value[], int valuelen, int *found, int waitfor); +PMIX_EXPORT int PMI2_Info_GetNodeAttr(const char name[], char value[], int valuelen, int *found, int waitfor); /*@ PMI2_Info_GetNodeAttrIntArray - returns the value of the attribute associated @@ -405,7 +412,7 @@ int PMI2_Info_GetNodeAttr(const char name[], char value[], int valuelen, int *fo cartesian. @*/ -int PMI2_Info_GetNodeAttrIntArray(const char name[], int array[], int arraylen, int *outlen, int *found); +PMIX_EXPORT int PMI2_Info_GetNodeAttrIntArray(const char name[], int array[], int arraylen, int *outlen, int *found); /*@ PMI2_Info_PutNodeAttr - stores the value of the named attribute @@ -423,7 +430,7 @@ int PMI2_Info_GetNodeAttrIntArray(const char name[], int array[], int arraylen, processes on the same SMP node. @*/ -int PMI2_Info_PutNodeAttr(const char name[], const char value[]); +PMIX_EXPORT int PMI2_Info_PutNodeAttr(const char name[], const char value[]); /*@ PMI2_Info_GetJobAttr - returns the value of the attribute associated @@ -441,7 +448,7 @@ int PMI2_Info_PutNodeAttr(const char name[], const char value[]); Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Info_GetJobAttr(const char name[], char value[], int valuelen, int *found); +PMIX_EXPORT int PMI2_Info_GetJobAttr(const char name[], char value[], int valuelen, int *found); /*@ PMI2_Info_GetJobAttrIntArray - returns the value of the attribute associated @@ -506,7 +513,7 @@ int PMI2_Info_GetJobAttr(const char name[], char value[], int valuelen, int *fou underlying data models. @*/ -int PMI2_Info_GetJobAttrIntArray(const char name[], int array[], int arraylen, int *outlen, int *found); +PMIX_EXPORT int PMI2_Info_GetJobAttrIntArray(const char name[], int array[], int arraylen, int *outlen, int *found); /*@ PMI2_Nameserv_publish - publish a name @@ -520,7 +527,7 @@ int PMI2_Info_GetJobAttrIntArray(const char name[], int array[], int arraylen, i Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Nameserv_publish(const char service_name[], const PMI_keyval_t *info_ptr, const char port[]); +PMIX_EXPORT int PMI2_Nameserv_publish(const char service_name[], const PMI_keyval_t *info_ptr, const char port[]); /*@ PMI2_Nameserv_lookup - lookup a service by name @@ -537,8 +544,8 @@ int PMI2_Nameserv_publish(const char service_name[], const PMI_keyval_t *info_pt Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Nameserv_lookup(const char service_name[], const PMI_keyval_t *info_ptr, - char port[], int portLen); +PMIX_EXPORT int PMI2_Nameserv_lookup(const char service_name[], const PMI_keyval_t *info_ptr, + char port[], int portLen); /*@ PMI2_Nameserv_unpublish - unpublish a name @@ -550,8 +557,8 @@ int PMI2_Nameserv_lookup(const char service_name[], const PMI_keyval_t *info_ptr Returns 'PMI2_SUCCESS' on success and an PMI error code on failure. @*/ -int PMI2_Nameserv_unpublish(const char service_name[], - const PMI_keyval_t *info_ptr); +PMIX_EXPORT int PMI2_Nameserv_unpublish(const char service_name[], + const PMI_keyval_t *info_ptr); diff --git a/opal/mca/pmix/pmix112/pmix/include/pmix.h b/opal/mca/pmix/pmix112/pmix/include/pmix.h index 8a1da23ce27..40a8a6b5fda 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmix.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmix.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016 Intel, Inc. All rights reserved + * Copyright (c) 2013-2017 Intel, Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are @@ -74,18 +74,18 @@ extern "C" { * Note that the PMIx client library is referenced counted, and so multiple * calls to PMIx_Init are allowed. Thus, one way to obtain the namespace and * rank of the process is to simply call PMIx_Init with a non-NULL parameter. */ -pmix_status_t PMIx_Init(pmix_proc_t *proc); +PMIX_EXPORT pmix_status_t PMIx_Init(pmix_proc_t *proc); /* Finalize the PMIx client, closing the connection to the local server. * An error code will be returned if, for some reason, the connection * cannot be closed. */ -pmix_status_t PMIx_Finalize(void); +PMIX_EXPORT pmix_status_t PMIx_Finalize(void); /* Returns _true_ if the PMIx client has been successfully initialized, * returns _false_ otherwise. Note that the function only reports the * internal state of the PMIx client - it does not verify an active * connection with the server, nor that the server is functional. */ -int PMIx_Initialized(void); +PMIX_EXPORT int PMIx_Initialized(void); /* Request that the provided array of procs be aborted, returning the @@ -105,22 +105,22 @@ int PMIx_Initialized(void); * caused by multiple processes calling PMIx_Abort are left to the * server implementation to resolve with regard to which status is * returned and what messages (if any) are printed. */ -pmix_status_t PMIx_Abort(int status, const char msg[], - pmix_proc_t procs[], size_t nprocs); +PMIX_EXPORT pmix_status_t PMIx_Abort(int status, const char msg[], + pmix_proc_t procs[], size_t nprocs); /* Push a value into the client's namespace. The client library will cache * the information locally until _PMIx_Commit_ is called. The provided scope * value is passed to the local PMIx server, which will distribute the data * as directed. */ -pmix_status_t PMIx_Put(pmix_scope_t scope, const char key[], pmix_value_t *val); +PMIX_EXPORT pmix_status_t PMIx_Put(pmix_scope_t scope, const char key[], pmix_value_t *val); /* Push all previously _PMIx_Put_ values to the local PMIx server. * This is an asynchronous operation - the library will immediately * return to the caller while the data is transmitted to the local * server in the background */ -pmix_status_t PMIx_Commit(void); +PMIX_EXPORT pmix_status_t PMIx_Commit(void); /* Execute a blocking barrier across the processes identified in the @@ -158,14 +158,14 @@ pmix_status_t PMIx_Commit(void); * the timeout parameter can help avoid "hangs" due to programming errors * that prevent one or more procs from reaching the "fence". */ -pmix_status_t PMIx_Fence(const pmix_proc_t procs[], size_t nprocs, - const pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_Fence(const pmix_proc_t procs[], size_t nprocs, + const pmix_info_t info[], size_t ninfo); /* Non-blocking version of PMIx_Fence. Note that the function will return * an error if a _NULL_ callback function is given. */ -pmix_status_t PMIx_Fence_nb(const pmix_proc_t procs[], size_t nprocs, - const pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Fence_nb(const pmix_proc_t procs[], size_t nprocs, + const pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Retrieve information for the specified _key_ as published by the process @@ -184,17 +184,17 @@ pmix_status_t PMIx_Fence_nb(const pmix_proc_t procs[], size_t nprocs, * an error. The timeout parameter can help avoid "hangs" due to programming * errors that prevent the target proc from ever exposing its data. */ -pmix_status_t PMIx_Get(const pmix_proc_t *proc, const char key[], - const pmix_info_t info[], size_t ninfo, - pmix_value_t **val); +PMIX_EXPORT pmix_status_t PMIx_Get(const pmix_proc_t *proc, const char key[], + const pmix_info_t info[], size_t ninfo, + pmix_value_t **val); /* A non-blocking operation version of PMIx_Get - the callback function will * be executed once the specified data has been _PMIx_Put_ * by the identified process and retrieved by the local server. The info * array is used as described above for the blocking form of this call. */ -pmix_status_t PMIx_Get_nb(const pmix_proc_t *proc, const char key[], - const pmix_info_t info[], size_t ninfo, - pmix_value_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Get_nb(const pmix_proc_t *proc, const char key[], + const pmix_info_t info[], size_t ninfo, + pmix_value_cbfunc_t cbfunc, void *cbdata); /* Publish the data in the info array for lookup. By default, @@ -216,9 +216,9 @@ pmix_status_t PMIx_Get_nb(const pmix_proc_t *proc, const char key[], * return immediately, executing the callback when the server confirms * availability of the data. */ -pmix_status_t PMIx_Publish(const pmix_info_t info[], size_t ninfo); -pmix_status_t PMIx_Publish_nb(const pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Publish(const pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_Publish_nb(const pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Lookup information published by this or another process. By default, @@ -257,8 +257,8 @@ pmix_status_t PMIx_Publish_nb(const pmix_info_t info[], size_t ninfo, * (b) PMIX_TIMEOUT - max time to wait for data to become available. * */ -pmix_status_t PMIx_Lookup(pmix_pdata_t data[], size_t ndata, - const pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_Lookup(pmix_pdata_t data[], size_t ndata, + const pmix_info_t info[], size_t ninfo); /* Non-blocking form of the _PMIx_Lookup_ function. Data for * the provided NULL-terminated keys array will be returned @@ -266,8 +266,8 @@ pmix_status_t PMIx_Lookup(pmix_pdata_t data[], size_t ndata, * behavior is to _not_ wait for data to be published. The * info keys can be used to modify the behavior as previously * described */ -pmix_status_t PMIx_Lookup_nb(char **keys, const pmix_info_t info[], size_t ninfo, - pmix_lookup_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Lookup_nb(char **keys, const pmix_info_t info[], size_t ninfo, + pmix_lookup_cbfunc_t cbfunc, void *cbdata); /* Unpublish data posted by this process using the given keys. @@ -278,15 +278,15 @@ pmix_status_t PMIx_Lookup_nb(char **keys, const pmix_info_t info[], size_t ninfo * By default, the range is assumed to be PMIX_SESSION. Changes * to the range, and any additional directives, can be provided * in the pmix_info_t array */ -pmix_status_t PMIx_Unpublish(char **keys, - const pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_Unpublish(char **keys, + const pmix_info_t info[], size_t ninfo); /* Non-blocking form of the _PMIx_Unpublish_ function. The * callback function will be executed once the server confirms * removal of the specified data. */ -pmix_status_t PMIx_Unpublish_nb(char **keys, - const pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Unpublish_nb(char **keys, + const pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Spawn a new job. The assigned namespace of the spawned applications @@ -319,17 +319,17 @@ pmix_status_t PMIx_Unpublish_nb(char **keys, * (c) PMIX_NOTIFY_COMPLETION - notify the parent process when the * child job terminates, either normally or with error */ -pmix_status_t PMIx_Spawn(const pmix_info_t job_info[], size_t ninfo, - const pmix_app_t apps[], size_t napps, - char nspace[]); +PMIX_EXPORT pmix_status_t PMIx_Spawn(const pmix_info_t job_info[], size_t ninfo, + const pmix_app_t apps[], size_t napps, + char nspace[]); /* Non-blocking form of the _PMIx_Spawn_ function. The callback * will be executed upon launch of the specified applications, * or upon failure to launch any of them. */ -pmix_status_t PMIx_Spawn_nb(const pmix_info_t job_info[], size_t ninfo, - const pmix_app_t apps[], size_t napps, - pmix_spawn_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Spawn_nb(const pmix_info_t job_info[], size_t ninfo, + const pmix_app_t apps[], size_t napps, + pmix_spawn_cbfunc_t cbfunc, void *cbdata); /* Record the specified processes as "connected". Both blocking and non-blocking * versions are provided. This means that the resource manager should treat the @@ -351,12 +351,12 @@ pmix_status_t PMIx_Spawn_nb(const pmix_info_t job_info[], size_t ninfo, * user-level directives regarding the algorithm to be used for the collective * operation involved in the "connect", timeout constraints, and other options * available from the host RM */ -pmix_status_t PMIx_Connect(const pmix_proc_t procs[], size_t nprocs, - const pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_Connect(const pmix_proc_t procs[], size_t nprocs, + const pmix_info_t info[], size_t ninfo); -pmix_status_t PMIx_Connect_nb(const pmix_proc_t procs[], size_t nprocs, - const pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Connect_nb(const pmix_proc_t procs[], size_t nprocs, + const pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Disconnect a previously connected set of processes. An error will be returned * if the specified set of procs was not previously "connected". As above, a process @@ -364,12 +364,12 @@ pmix_status_t PMIx_Connect_nb(const pmix_proc_t procs[], size_t nprocs, * is not allowed to reconnect to a set of procs that has not fully completed * disconnect - i.e., you have to fully disconnect before you can reconnect to the * _same_ group of processes. The info array is used as above. */ -pmix_status_t PMIx_Disconnect(const pmix_proc_t procs[], size_t nprocs, - const pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_Disconnect(const pmix_proc_t procs[], size_t nprocs, + const pmix_info_t info[], size_t ninfo); -pmix_status_t PMIx_Disconnect_nb(const pmix_proc_t ranges[], size_t nprocs, - const pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Disconnect_nb(const pmix_proc_t ranges[], size_t nprocs, + const pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Given a node name, return an array of processes within the specified nspace * on that node. If the nspace is NULL, then all processes on the node will @@ -378,15 +378,15 @@ pmix_status_t PMIx_Disconnect_nb(const pmix_proc_t ranges[], size_t nprocs, * for releasing the array when done with it - the PMIX_PROC_FREE macro is * provided for this purpose. */ -pmix_status_t PMIx_Resolve_peers(const char *nodename, const char *nspace, - pmix_proc_t **procs, size_t *nprocs); +PMIX_EXPORT pmix_status_t PMIx_Resolve_peers(const char *nodename, const char *nspace, + pmix_proc_t **procs, size_t *nprocs); /* Given an nspace, return the list of nodes hosting processes within * that nspace. The returned string will contain a comma-delimited list * of nodenames. The caller is responsible for releasing the string * when done with it */ -pmix_status_t PMIx_Resolve_nodes(const char *nspace, char **nodelist); +PMIX_EXPORT pmix_status_t PMIx_Resolve_nodes(const char *nspace, char **nodelist); #if defined(c_plusplus) || defined(__cplusplus) } diff --git a/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_config_bottom.h b/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_config_bottom.h index e64ebdd4364..2b5c8ac3266 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_config_bottom.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_config_bottom.h @@ -325,12 +325,6 @@ # define __pmix_attribute_unused__ #endif -#if PMIX_HAVE_ATTRIBUTE_VISIBILITY -# define __pmix_attribute_visibility__(a) __attribute__((__visibility__(a))) -#else -# define __pmix_attribute_visibility__(a) -#endif - #if PMIX_HAVE_ATTRIBUTE_WARN_UNUSED_RESULT # define __pmix_attribute_warn_unused_result__ __attribute__((__warn_unused_result__)) #else @@ -343,16 +337,6 @@ # define __pmix_attribute_destructor__ #endif -#ifdef PMIX_C_HAVE_VISIBILITY -# if PMIX_C_HAVE_VISIBILITY -# define PMIX_EXPORT __pmix_attribute_visibility__("default") -# else -# define PMIX_EXPORT -# endif -#else -# define PMIX_EXPORT -#endif - /* * Do we have ? */ diff --git a/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_stdint.h b/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_stdint.h index f873381f0c4..fa52b79c04f 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_stdint.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmix/autogen/pmix_stdint.h @@ -1,3 +1,4 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* * Copyright (c) 2004-2007 The Trustees of Indiana University and Indiana * University Research and Technology @@ -10,6 +11,11 @@ * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2015 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2016 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -34,105 +40,36 @@ #include #endif -/* 8-bit */ - -#if SIZEOF_CHAR == 1 - -#ifndef HAVE_INT8_T -typedef signed char int8_t; -#endif - -#ifndef HAVE_UINT8_T -typedef unsigned char uint8_t; -#endif - -#else - -#error Failed to define 8-bit types - -#endif - -/* 16-bit */ - -#if SIZEOF_SHORT == 2 - -#ifndef HAVE_INT16_T -typedef signed short int16_t; -#endif - -#ifndef HAVE_UINT16_T -typedef unsigned short uint16_t; -#endif - -#else - -#error Failed to define 16-bit types - -#endif - -/* 32-bit */ - -#if SIZEOF_INT == 4 +/* 128-bit */ -#ifndef HAVE_INT32_T -typedef signed int int32_t; -#endif +#ifdef HAVE_INT128_T -#ifndef HAVE_UINT32_T -typedef unsigned int uint32_t; -#endif +typedef int128_t pmix_int128_t; +typedef uint128_t pmix_uint128_t; -#elif SIZEOF_LONG == 4 +#define HAVE_PMIX_INT128_T 1 -#ifndef HAVE_INT32_T -typedef signed long int32_t; -#endif - -#ifndef HAVE_UINT32_T -typedef unsigned long uint32_t; -#endif +#elif defined(HAVE___INT128) +/* suppress warning about __int128 type */ +#pragma GCC diagnostic push +/* Clang won't quietly accept "-pedantic", but GCC versions older than ~4.8 + * won't quietly accept "-Wpedanic". The whole "#pragma GCC diagnostic ..." + * facility only was added to GCC as of version 4.6. */ +#if defined(__clang__) || (defined(__GNUC__) && __GNUC__ >= 6) +#pragma GCC diagnostic ignored "-Wpedantic" #else - -#error Failed to define 32-bit types - -#endif - -/* 64-bit */ - -#if SIZEOF_INT == 8 - -#ifndef HAVE_INT64_T -typedef signed int int64_t; -#endif - -#ifndef HAVE_UINT64_T -typedef unsigned int uint64_t; -#endif - -#elif SIZEOF_LONG == 8 - -#ifndef HAVE_INT64_T -typedef signed long int64_t; -#endif - -#ifndef HAVE_UINT64_T -typedef unsigned long uint64_t; -#endif - -#elif HAVE_LONG_LONG && SIZEOF_LONG_LONG == 8 - -#ifndef HAVE_INT64_T -typedef signed long long int64_t; +#pragma GCC diagnostic ignored "-pedantic" #endif +typedef __int128 pmix_int128_t; +typedef unsigned __int128 pmix_uint128_t; +#pragma GCC diagnostic pop -#ifndef HAVE_UINT64_T -typedef unsigned long long uint64_t; -#endif +#define HAVE_PMIX_INT128_T 1 #else -#error Failed to define 64-bit types +#define HAVE_PMIX_INT128_T 0 #endif @@ -173,143 +110,8 @@ typedef unsigned long long uintptr_t; #endif -/* fix up some constants that may be missing */ -#ifndef SIZE_MAX -# if SIZEOF_VOID_P == SIZEOF_INT -# define SIZE_MAX UINT_MAX -# elif SIZEOF_VOID_P == SIZEOF_LONG -# define SIZE_MAX ULONG_MAX -# else -# error Failed to find value for SIZE_MAX -# endif -#endif /* ifndef SIZE_MAX */ - - /* inttypes.h printf specifiers */ -#ifdef HAVE_INTTYPES_H # include -#else - -# if SIZEOF_LONG == 8 -# define __PRI64_PREFIX "l" -# define __PRIPTR_PREFIX "l" -# else -# define __PRI64_PREFIX "ll" -# define __PRIPTR_PREFIX -# endif - -/* Decimal notation. */ -# define PRId8 "d" -# define PRId16 "d" -# define PRId32 "d" -# define PRId64 __PRI64_PREFIX "d" - -# define PRIdLEAST8 "d" -# define PRIdLEAST16 "d" -# define PRIdLEAST32 "d" -# define PRIdLEAST64 __PRI64_PREFIX "d" - -# define PRIdFAST8 "d" -# define PRIdFAST16 __PRIPTR_PREFIX "d" -# define PRIdFAST32 __PRIPTR_PREFIX "d" -# define PRIdFAST64 __PRI64_PREFIX "d" - -# define PRIi8 "i" -# define PRIi16 "i" -# define PRIi32 "i" -# define PRIi64 __PRI64_PREFIX "i" - -# define PRIiLEAST8 "i" -# define PRIiLEAST16 "i" -# define PRIiLEAST32 "i" -# define PRIiLEAST64 __PRI64_PREFIX "i" - -# define PRIiFAST8 "i" -# define PRIiFAST16 __PRIPTR_PREFIX "i" -# define PRIiFAST32 __PRIPTR_PREFIX "i" -# define PRIiFAST64 __PRI64_PREFIX "i" - -/* Octal notation. */ -# define PRIo8 "o" -# define PRIo16 "o" -# define PRIo32 "o" -# define PRIo64 __PRI64_PREFIX "o" - -# define PRIoLEAST8 "o" -# define PRIoLEAST16 "o" -# define PRIoLEAST32 "o" -# define PRIoLEAST64 __PRI64_PREFIX "o" - -# define PRIoFAST8 "o" -# define PRIoFAST16 __PRIPTR_PREFIX "o" -# define PRIoFAST32 __PRIPTR_PREFIX "o" -# define PRIoFAST64 __PRI64_PREFIX "o" - -/* Unsigned integers. */ -# define PRIu8 "u" -# define PRIu16 "u" -# define PRIu32 "u" -# define PRIu64 __PRI64_PREFIX "u" - -# define PRIuLEAST8 "u" -# define PRIuLEAST16 "u" -# define PRIuLEAST32 "u" -# define PRIuLEAST64 __PRI64_PREFIX "u" - -# define PRIuFAST8 "u" -# define PRIuFAST16 __PRIPTR_PREFIX "u" -# define PRIuFAST32 __PRIPTR_PREFIX "u" -# define PRIuFAST64 __PRI64_PREFIX "u" - -/* lowercase hexadecimal notation. */ -# define PRIx8 "x" -# define PRIx16 "x" -# define PRIx32 "x" -# define PRIx64 __PRI64_PREFIX "x" - -# define PRIxLEAST8 "x" -# define PRIxLEAST16 "x" -# define PRIxLEAST32 "x" -# define PRIxLEAST64 __PRI64_PREFIX "x" - -# define PRIxFAST8 "x" -# define PRIxFAST16 __PRIPTR_PREFIX "x" -# define PRIxFAST32 __PRIPTR_PREFIX "x" -# define PRIxFAST64 __PRI64_PREFIX "x" - -/* UPPERCASE hexadecimal notation. */ -# define PRIX8 "X" -# define PRIX16 "X" -# define PRIX32 "X" -# define PRIX64 __PRI64_PREFIX "X" - -# define PRIXLEAST8 "X" -# define PRIXLEAST16 "X" -# define PRIXLEAST32 "X" -# define PRIXLEAST64 __PRI64_PREFIX "X" - -# define PRIXFAST8 "X" -# define PRIXFAST16 __PRIPTR_PREFIX "X" -# define PRIXFAST32 __PRIPTR_PREFIX "X" -# define PRIXFAST64 __PRI64_PREFIX "X" - -/* Macros for printing `intmax_t' and `uintmax_t'. */ -# define PRIdMAX __PRI64_PREFIX "d" -# define PRIiMAX __PRI64_PREFIX "i" -# define PRIoMAX __PRI64_PREFIX "o" -# define PRIuMAX __PRI64_PREFIX "u" -# define PRIxMAX __PRI64_PREFIX "x" -# define PRIXMAX __PRI64_PREFIX "X" - -/* Macros for printing `intptr_t' and `uintptr_t'. */ -# define PRIdPTR __PRIPTR_PREFIX "d" -# define PRIiPTR __PRIPTR_PREFIX "i" -# define PRIoPTR __PRIPTR_PREFIX "o" -# define PRIuPTR __PRIPTR_PREFIX "u" -# define PRIxPTR __PRIPTR_PREFIX "x" -# define PRIXPTR __PRIPTR_PREFIX "X" - -#endif #ifndef PRIsize_t # if defined(ACCEPT_C99) @@ -324,4 +126,3 @@ typedef unsigned long long uintptr_t; #endif #endif /* PMIX_STDINT_H */ - diff --git a/opal/mca/pmix/pmix112/pmix/include/pmix/pmix_common.h b/opal/mca/pmix/pmix112/pmix/include/pmix/pmix_common.h index 1208c91a6ca..98162cddaaa 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmix/pmix_common.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmix/pmix_common.h @@ -52,6 +52,12 @@ #include #include /* for struct timeval */ +#ifdef PMIX_HAVE_VISIBILITY +#define PMIX_EXPORT __attribute__((__visibility__("default"))) +#else +#define PMIX_EXPORT +#endif + #include #if defined(c_plusplus) || defined(__cplusplus) @@ -854,17 +860,17 @@ typedef void (*pmix_value_cbfunc_t)(pmix_status_t status, * using a new set of info values. * * See pmix_common.h for a description of the notification function */ -void PMIx_Register_errhandler(pmix_info_t info[], size_t ninfo, - pmix_notification_fn_t errhandler, - pmix_errhandler_reg_cbfunc_t cbfunc, - void *cbdata); +PMIX_EXPORT void PMIx_Register_errhandler(pmix_info_t info[], size_t ninfo, + pmix_notification_fn_t errhandler, + pmix_errhandler_reg_cbfunc_t cbfunc, + void *cbdata); /* deregister the errhandler * errhandler_ref is the reference returned by PMIx for the errhandler * to pmix_errhandler_reg_cbfunc_t */ -void PMIx_Deregister_errhandler(int errhandler_ref, - pmix_op_cbfunc_t cbfunc, - void *cbdata); +PMIX_EXPORT void PMIx_Deregister_errhandler(int errhandler_ref, + pmix_op_cbfunc_t cbfunc, + void *cbdata); /* Report an error to a process for notification via any * registered errhandler. The errhandler registration can be * called by both the server and the client application. On the @@ -901,26 +907,26 @@ void PMIx_Deregister_errhandler(int errhandler_ref, * time. Note that the caller is required to maintain the input * data until the callback function has been executed! */ -pmix_status_t PMIx_Notify_error(pmix_status_t status, - pmix_proc_t procs[], size_t nprocs, - pmix_proc_t error_procs[], size_t error_nprocs, - pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_Notify_error(pmix_status_t status, + pmix_proc_t procs[], size_t nprocs, + pmix_proc_t error_procs[], size_t error_nprocs, + pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Provide a string representation of a pmix_status_t value. Note * that the provided string is statically defined and must NOT be * free'd */ -const char* PMIx_Error_string(pmix_status_t status); +PMIX_EXPORT const char* PMIx_Error_string(pmix_status_t status); /* Get the PMIx version string. Note that the provided string is * statically defined and must NOT be free'd */ -const char* PMIx_Get_version(void); +PMIX_EXPORT const char* PMIx_Get_version(void); /* Store some data locally for retrieval by other areas of the * proc. This is data that has only internal scope - it will * never be "pushed" externally */ -pmix_status_t PMIx_Store_internal(const pmix_proc_t *proc, - const char *key, pmix_value_t *val); +PMIX_EXPORT pmix_status_t PMIx_Store_internal(const pmix_proc_t *proc, + const char *key, pmix_value_t *val); /* Key-Value pair management macros */ diff --git a/opal/mca/pmix/pmix112/pmix/include/pmix/rename.h b/opal/mca/pmix/pmix112/pmix/include/pmix/rename.h deleted file mode 100644 index 7143865813d..00000000000 --- a/opal/mca/pmix/pmix112/pmix/include/pmix/rename.h +++ /dev/null @@ -1,424 +0,0 @@ -/* - * Copyright 2015 Intel, Inc. All rights reserved - */ - -#ifndef PMIX_RENAME_H -#define PMIX_RENAME_H - -#include - - -BEGIN_C_DECLS - - -/* Only enact these defines if we're actually renaming the symbols - (i.e., avoid trying to have no-op defines if we're *not* - renaming). - - Note that we don't symbol shift if we aren't in embedded mode - as that wouldn't make any sense. If we are in embedded mode, - then we aren't building the PMI-1/2 APIs as that also doesn't - make any sense -*/ - -#if PMIX_SYM_TRANSFORM - -/* Use a preprocessor two-step in order to get the prefixing right. - Make 2 macros: PMIX_NAME and PMIX_NAME_CAPS for renaming - things. */ - -#define PMIX_MUNGE_NAME(a, b) PMIX_MUNGE_NAME2(a, b) -#define PMIX_MUNGE_NAME2(a, b) a ## b -#define PMIX_NAME(name) PMIX_MUNGE_NAME(PMIX_SYM_PREFIX, pmix_ ## name) -#define PMIX_NAME_CAPS(name) PMIX_MUNGE_NAME(PMIX_SYM_PREFIX_CAPS, PMIx_ ## name) - -/* Now define all the "real" names to be the prefixed names. This - allows us to use the real names throughout the code base (i.e., - "pmix_"); the preprocessor will adjust to have the prefixed - name under the covers. */ - -/* PMIx APIs */ -#define PMI2_Abort PMIX_NAME_CAPS(PMI2_Abort) -#define PMI2_Finalize PMIX_NAME_CAPS(PMI2_Finalize) -#define PMI2_Info_GetJobAttr PMIX_NAME_CAPS(PMI2_Info_GetJobAttr) -#define PMI2_Info_GetJobAttrIntArray PMIX_NAME_CAPS(PMI2_Info_GetJobAttrIntArray) -#define PMI2_Info_GetNodeAttr PMIX_NAME_CAPS(PMI2_Info_GetNodeAttr) -#define PMI2_Info_GetSize PMIX_NAME_CAPS(PMI2_Info_GetSize) -#define PMI2_Info_PutNodeAttr PMIX_NAME_CAPS(PMI2_Info_PutNodeAttr) -#define PMI2_Init PMIX_NAME_CAPS(PMI2_Init) -#define PMI2_Initialized PMIX_NAME_CAPS(PMI2_Initialized) -#define PMI2_Job_Connect PMIX_NAME_CAPS(PMI2_Job_Connect) -#define PMI2_Job_Disconnect PMIX_NAME_CAPS(PMI2_Job_Disconnect) -#define PMI2_Job_GetId PMIX_NAME_CAPS(PMI2_Job_GetId) -#define PMI2_Job_GetRank PMIX_NAME_CAPS(PMI2_Job_GetRank) -#define PMI2_Job_Spawn PMIX_NAME_CAPS(PMI2_Job_Spawn) -#define PMI2_KVS_Fence PMIX_NAME_CAPS(PMI2_KVS_Fence) -#define PMI2_KVS_Get PMIX_NAME_CAPS(PMI2_KVS_Get) -#define PMI2_KVS_Put PMIX_NAME_CAPS(PMI2_KVS_Put) -#define PMI2_Nameserv_lookup PMIX_NAME_CAPS(PMI2_Nameserv_lookup) -#define PMI2_Nameserv_publish PMIX_NAME_CAPS(PMI2_Nameserv_publish) -#define PMI2_Nameserv_unpublish PMIX_NAME_CAPS(PMI2_Nameserv_unpublish) -#define PMI_Abort PMIX_NAME_CAPS(PMI_Abort) -#define PMI_Args_to_keyval PMIX_NAME_CAPS(PMI_Args_to_keyval) -#define PMI_Barrier PMIX_NAME_CAPS(PMI_Barrier) -#define PMI_Finalize PMIX_NAME_CAPS(PMI_Finalize) -#define PMI_Free_keyvals PMIX_NAME_CAPS(PMI_Free_keyvals) -#define PMI_Get_appnum PMIX_NAME_CAPS(PMI_Get_appnum) -#define PMI_Get_clique_ranks PMIX_NAME_CAPS(PMI_Get_clique_ranks) -#define PMI_Get_clique_size PMIX_NAME_CAPS(PMI_Get_clique_size) -#define PMI_Get_id PMIX_NAME_CAPS(PMI_Get_id) -#define PMI_Get_id_length_max PMIX_NAME_CAPS(PMI_Get_id_length_max) -#define PMI_Get_kvs_domain_id PMIX_NAME_CAPS(PMI_Get_kvs_domain_id) -#define PMI_Get_options PMIX_NAME_CAPS(PMI_Get_options) -#define PMI_Get_rank PMIX_NAME_CAPS(PMI_Get_rank) -#define PMI_Get_size PMIX_NAME_CAPS(PMI_Get_size) -#define PMI_Get_universe_size PMIX_NAME_CAPS(PMI_Get_universe_size) -#define PMI_Init PMIX_NAME_CAPS(PMI_Init) -#define PMI_Initialized PMIX_NAME_CAPS(PMI_Initialized) -#define PMI_KVS_Commit PMIX_NAME_CAPS(PMI_KVS_Commit) -#define PMI_KVS_Create PMIX_NAME_CAPS(PMI_KVS_Create) -#define PMI_KVS_Destroy PMIX_NAME_CAPS(PMI_KVS_Destroy) -#define PMI_KVS_Get PMIX_NAME_CAPS(PMI_KVS_Get) -#define PMI_KVS_Get_key_length_max PMIX_NAME_CAPS(PMI_KVS_Get_key_length_max) -#define PMI_KVS_Get_my_name PMIX_NAME_CAPS(PMI_KVS_Get_my_name) -#define PMI_KVS_Get_name_length_max PMIX_NAME_CAPS(PMI_KVS_Get_name_length_max) -#define PMI_KVS_Get_value_length_max PMIX_NAME_CAPS(PMI_KVS_Get_value_length_max) -#define PMI_KVS_Iter_first PMIX_NAME_CAPS(PMI_KVS_Iter_first) -#define PMI_KVS_Iter_next PMIX_NAME_CAPS(PMI_KVS_Iter_next) -#define PMI_KVS_Put PMIX_NAME_CAPS(PMI_KVS_Put) -#define PMI_Lookup_name PMIX_NAME_CAPS(PMI_Lookup_name) -#define PMI_Parse_option PMIX_NAME_CAPS(PMI_Parse_option) -#define PMI_Publish_name PMIX_NAME_CAPS(PMI_Publish_name) -#define PMI_Spawn_multiple PMIX_NAME_CAPS(PMI_Spawn_multiple) -#define PMI_Unpublish_name PMIX_NAME_CAPS(PMI_Unpublish_name) -#define PMIx_Abort PMIX_NAME_CAPS(Abort) -#define PMIx_Commit PMIX_NAME_CAPS(Commit) -#define PMIx_Connect PMIX_NAME_CAPS(Connect) -#define PMIx_Connect_nb PMIX_NAME_CAPS(Connect_nb) -#define PMIx_Deregister_errhandler PMIX_NAME_CAPS(Deregister_errhandler) -#define PMIx_Disconnect PMIX_NAME_CAPS(Disconnect) -#define PMIx_Disconnect_nb PMIX_NAME_CAPS(Disconnect_nb) -#define PMIx_Error_string PMIX_NAME_CAPS(Error_string) -#define PMIx_Fence PMIX_NAME_CAPS(Fence) -#define PMIx_Fence_nb PMIX_NAME_CAPS(Fence_nb) -#define PMIx_Finalize PMIX_NAME_CAPS(Finalize) -#define PMIx_Get PMIX_NAME_CAPS(Get) -#define PMIx_Get_nb PMIX_NAME_CAPS(Get_nb) -#define PMIx_Get_version PMIX_NAME_CAPS(Get_version) -#define PMIx_Init PMIX_NAME_CAPS(Init) -#define PMIx_Initialized PMIX_NAME_CAPS(Initialized) -#define PMIx_Lookup PMIX_NAME_CAPS(Lookup) -#define PMIx_Lookup_nb PMIX_NAME_CAPS(Lookup_nb) -#define PMIx_Notify_error PMIX_NAME_CAPS(Notify_error) -#define PMIx_Publish PMIX_NAME_CAPS(Publish) -#define PMIx_Publish_nb PMIX_NAME_CAPS(Publish_nb) -#define PMIx_Put PMIX_NAME_CAPS(Put) -#define PMIx_Register_errhandler PMIX_NAME_CAPS(Register_errhandler) -#define PMIx_Resolve_nodes PMIX_NAME_CAPS(Resolve_nodes) -#define PMIx_Resolve_peers PMIX_NAME_CAPS(Resolve_peers) -#define PMIx_Spawn PMIX_NAME_CAPS(Spawn) -#define PMIx_Spawn_nb PMIX_NAME_CAPS(Spawn_nb) -#define PMIx_Store_internal PMIX_NAME_CAPS(Store_internal) -#define PMIx_Unpublish PMIX_NAME_CAPS(Unpublish) -#define PMIx_Unpublish_nb PMIX_NAME_CAPS(Unpublish_nb) -#define PMIx_generate_ppn PMIX_NAME_CAPS(generate_ppn) -#define PMIx_generate_regex PMIX_NAME_CAPS(generate_regex) -#define PMIx_server_deregister_client PMIX_NAME_CAPS(server_deregister_client) -#define PMIx_server_deregister_nspace PMIX_NAME_CAPS(server_deregister_nspace) -#define PMIx_server_dmodex_request PMIX_NAME_CAPS(server_dmodex_request) -#define PMIx_server_finalize PMIX_NAME_CAPS(server_finalize) -#define PMIx_server_init PMIX_NAME_CAPS(server_init) -#define PMIx_server_register_client PMIX_NAME_CAPS(server_register_client) -#define PMIx_server_register_nspace PMIX_NAME_CAPS(server_register_nspace) -#define PMIx_server_setup_fork PMIX_NAME_CAPS(server_setup_fork) - -/* internal functions */ -#define pmix_argv_append PMIX_NAME(argv_append) -#define pmix_argv_append_nosize PMIX_NAME(argv_append_nosize) -#define pmix_argv_append_unique_nosize PMIX_NAME(argv_append_unique_nosize) -#define pmix_argv_copy PMIX_NAME(argv_copy) -#define pmix_argv_count PMIX_NAME(argv_count) -#define pmix_argv_delete PMIX_NAME(argv_delete) -#define pmix_argv_free PMIX_NAME(argv_free) -#define pmix_argv_insert PMIX_NAME(argv_insert) -#define pmix_argv_insert_element PMIX_NAME(argv_insert_element) -#define pmix_argv_join PMIX_NAME(argv_join) -#define pmix_argv_join_range PMIX_NAME(argv_join_range) -#define pmix_argv_len PMIX_NAME(argv_len) -#define pmix_argv_prepend_nosize PMIX_NAME(argv_prepend_nosize) -#define pmix_argv_split PMIX_NAME(argv_split) -#define pmix_argv_split_with_empty PMIX_NAME(argv_split_with_empty) -#define pmix_asprintf PMIX_NAME(asprintf) -#define pmix_basename PMIX_NAME(basename) -#define pmix_bcopy_csum_partial PMIX_NAME(bcopy_csum_partial) -#define pmix_bcopy_uicrc_partial PMIX_NAME(bcopy_uicrc_partial) -#define pmix_bcopy_uicsum_partial PMIX_NAME(bcopy_uicsum_partial) -#define pmix_bfrop PMIX_NAME(bfrop) -#define pmix_bfrop_buffer_extend PMIX_NAME(bfrop_buffer_extend) -#define pmix_bfrop_close PMIX_NAME(bfrop_close) -#define pmix_bfrop_copy PMIX_NAME(bfrop_copy) -#define pmix_bfrop_copy_app PMIX_NAME(bfrop_copy_app) -#define pmix_bfrop_copy_array PMIX_NAME(bfrop_copy_array) -#define pmix_bfrop_copy_bo PMIX_NAME(bfrop_copy_bo) -#define pmix_bfrop_copy_buf PMIX_NAME(bfrop_copy_buf) -#define pmix_bfrop_copy_info PMIX_NAME(bfrop_copy_info) -#define pmix_bfrop_copy_kval PMIX_NAME(bfrop_copy_kval) -#define pmix_bfrop_copy_modex PMIX_NAME(bfrop_copy_modex) -#define pmix_bfrop_copy_payload PMIX_NAME(bfrop_copy_payload) -#define pmix_bfrop_copy_pdata PMIX_NAME(bfrop_copy_pdata) -#define pmix_bfrop_copy_persist PMIX_NAME(bfrop_copy_persist) -#define pmix_bfrop_copy_proc PMIX_NAME(bfrop_copy_proc) -#define pmix_bfrop_copy_string PMIX_NAME(bfrop_copy_string) -#define pmix_bfrop_copy_topo PMIX_NAME(bfrop_copy_topo) -#define pmix_bfrop_copy_value PMIX_NAME(bfrop_copy_value) -#define pmix_bfrop_get_data_type PMIX_NAME(bfrop_get_data_type) -#define pmix_bfrop_initial_size PMIX_NAME(pmix_bfrop_initial_size) -#define pmix_bfrop_initialized PMIX_NAME(bfrop_initialized) -#define pmix_bfrop_num_reg_types PMIX_NAME(pmix_bfrop_num_reg_types) -#define pmix_bfrop_open PMIX_NAME(bfrop_open) -#define pmix_bfrop_pack PMIX_NAME(bfrop_pack) -#define pmix_bfrop_pack_app PMIX_NAME(bfrop_pack_app) -#define pmix_bfrop_pack_array PMIX_NAME(bfrop_pack_array) -#define pmix_bfrop_pack_bo PMIX_NAME(bfrop_pack_bo) -#define pmix_bfrop_pack_bool PMIX_NAME(bfrop_pack_bool) -#define pmix_bfrop_pack_buf PMIX_NAME(bfrop_pack_buf) -#define pmix_bfrop_pack_buffer PMIX_NAME(bfrop_pack_buffer) -#define pmix_bfrop_pack_byte PMIX_NAME(bfrop_pack_byte) -#define pmix_bfrop_pack_datatype PMIX_NAME(bfrop_pack_datatype) -#define pmix_bfrop_pack_double PMIX_NAME(bfrop_pack_double) -#define pmix_bfrop_pack_float PMIX_NAME(bfrop_pack_float) -#define pmix_bfrop_pack_info PMIX_NAME(bfrop_pack_info) -#define pmix_bfrop_pack_int PMIX_NAME(bfrop_pack_int) -#define pmix_bfrop_pack_int16 PMIX_NAME(bfrop_pack_int16) -#define pmix_bfrop_pack_int32 PMIX_NAME(bfrop_pack_int32) -#define pmix_bfrop_pack_int64 PMIX_NAME(bfrop_pack_int64) -#define pmix_bfrop_pack_kval PMIX_NAME(bfrop_pack_kval) -#define pmix_bfrop_pack_modex PMIX_NAME(bfrop_pack_modex) -#define pmix_bfrop_pack_pdata PMIX_NAME(bfrop_pack_pdata) -#define pmix_bfrop_pack_persist PMIX_NAME(bfrop_pack_persist) -#define pmix_bfrop_pack_pid PMIX_NAME(bfrop_pack_pid) -#define pmix_bfrop_pack_proc PMIX_NAME(bfrop_pack_proc) -#define pmix_bfrop_pack_sizet PMIX_NAME(bfrop_pack_sizet) -#define pmix_bfrop_pack_string PMIX_NAME(bfrop_pack_string) -#define pmix_bfrop_pack_time PMIX_NAME(bfrop_pack_time) -#define pmix_bfrop_pack_timeval PMIX_NAME(bfrop_pack_timeval) -#define pmix_bfrop_pack_topo PMIX_NAME(bfrop_pack_topo) -#define pmix_bfrop_pack_value PMIX_NAME(bfrop_pack_value) -#define pmix_bfrop_print PMIX_NAME(bfrop_print) -#define pmix_bfrop_print_app PMIX_NAME(bfrop_print_app) -#define pmix_bfrop_print_array PMIX_NAME(bfrop_print_array) -#define pmix_bfrop_print_bo PMIX_NAME(bfrop_print_bo) -#define pmix_bfrop_print_bool PMIX_NAME(bfrop_print_bool) -#define pmix_bfrop_print_buf PMIX_NAME(bfrop_print_buf) -#define pmix_bfrop_print_byte PMIX_NAME(bfrop_print_byte) -#define pmix_bfrop_print_double PMIX_NAME(bfrop_print_double) -#define pmix_bfrop_print_float PMIX_NAME(bfrop_print_float) -#define pmix_bfrop_print_info PMIX_NAME(bfrop_print_info) -#define pmix_bfrop_print_int PMIX_NAME(bfrop_print_int) -#define pmix_bfrop_print_int16 PMIX_NAME(bfrop_print_int16) -#define pmix_bfrop_print_int32 PMIX_NAME(bfrop_print_int32) -#define pmix_bfrop_print_int64 PMIX_NAME(bfrop_print_int64) -#define pmix_bfrop_print_int8 PMIX_NAME(bfrop_print_int8) -#define pmix_bfrop_print_kval PMIX_NAME(bfrop_print_kval) -#define pmix_bfrop_print_modex PMIX_NAME(bfrop_print_modex) -#define pmix_bfrop_print_pdata PMIX_NAME(bfrop_print_pdata) -#define pmix_bfrop_print_persist PMIX_NAME(bfrop_print_persist) -#define pmix_bfrop_print_pid PMIX_NAME(bfrop_print_pid) -#define pmix_bfrop_print_proc PMIX_NAME(bfrop_print_proc) -#define pmix_bfrop_print_size PMIX_NAME(bfrop_print_size) -#define pmix_bfrop_print_string PMIX_NAME(bfrop_print_string) -#define pmix_bfrop_print_time PMIX_NAME(bfrop_print_time) -#define pmix_bfrop_print_timeval PMIX_NAME(bfrop_print_timeval) -#define pmix_bfrop_print_topo PMIX_NAME(bfrop_print_topo) -#define pmix_bfrop_print_uint PMIX_NAME(bfrop_print_uint) -#define pmix_bfrop_print_uint16 PMIX_NAME(bfrop_print_uint16) -#define pmix_bfrop_print_uint32 PMIX_NAME(bfrop_print_uint32) -#define pmix_bfrop_print_uint64 PMIX_NAME(bfrop_print_uint64) -#define pmix_bfrop_print_uint8 PMIX_NAME(bfrop_print_uint8) -#define pmix_bfrop_print_value PMIX_NAME(bfrop_print_value) -#define pmix_bfrop_std_copy PMIX_NAME(bfrop_std_copy) -#define pmix_bfrop_store_data_type PMIX_NAME(bfrop_store_data_type) -#define pmix_bfrop_threshold_size PMIX_NAME(pmix_bfrop_threshold_size) -#define pmix_bfrop_too_small PMIX_NAME(bfrop_too_small) -#define pmix_bfrop_types PMIX_NAME(bfrop_types) -#define pmix_bfrop_type_info_t_class PMIX_NAME(bfrop_type_info_t_class) -#define pmix_bfrop_unpack PMIX_NAME(bfrop_unpack) -#define pmix_bfrop_unpack_app PMIX_NAME(bfrop_unpack_app) -#define pmix_bfrop_unpack_array PMIX_NAME(bfrop_unpack_array) -#define pmix_bfrop_unpack_bo PMIX_NAME(bfrop_unpack_bo) -#define pmix_bfrop_unpack_bool PMIX_NAME(bfrop_unpack_bool) -#define pmix_bfrop_unpack_buf PMIX_NAME(bfrop_unpack_buf) -#define pmix_bfrop_unpack_buffer PMIX_NAME(bfrop_unpack_buffer) -#define pmix_bfrop_unpack_byte PMIX_NAME(bfrop_unpack_byte) -#define pmix_bfrop_unpack_datatype PMIX_NAME(bfrop_unpack_datatype) -#define pmix_bfrop_unpack_double PMIX_NAME(bfrop_unpack_double) -#define pmix_bfrop_unpack_float PMIX_NAME(bfrop_unpack_float) -#define pmix_bfrop_unpack_info PMIX_NAME(bfrop_unpack_info) -#define pmix_bfrop_unpack_int PMIX_NAME(bfrop_unpack_int) -#define pmix_bfrop_unpack_int16 PMIX_NAME(bfrop_unpack_int16) -#define pmix_bfrop_unpack_int32 PMIX_NAME(bfrop_unpack_int32) -#define pmix_bfrop_unpack_int64 PMIX_NAME(bfrop_unpack_int64) -#define pmix_bfrop_unpack_kval PMIX_NAME(bfrop_unpack_kval) -#define pmix_bfrop_unpack_modex PMIX_NAME(bfrop_unpack_modex) -#define pmix_bfrop_unpack_pdata PMIX_NAME(bfrop_unpack_pdata) -#define pmix_bfrop_unpack_persist PMIX_NAME(bfrop_unpack_persist) -#define pmix_bfrop_unpack_pid PMIX_NAME(bfrop_unpack_pid) -#define pmix_bfrop_unpack_proc PMIX_NAME(bfrop_unpack_proc) -#define pmix_bfrop_unpack_sizet PMIX_NAME(bfrop_unpack_sizet) -#define pmix_bfrop_unpack_string PMIX_NAME(bfrop_unpack_string) -#define pmix_bfrop_unpack_time PMIX_NAME(bfrop_unpack_time) -#define pmix_bfrop_unpack_timeval PMIX_NAME(bfrop_unpack_timeval) -#define pmix_bfrop_unpack_topo PMIX_NAME(bfrop_unpack_topo) -#define pmix_bfrop_unpack_value PMIX_NAME(bfrop_unpack_value) -#define pmix_buffer_t_class PMIX_NAME(buffer_t_class) -#define pmix_cb_t_class PMIX_NAME(cb_t_class) -#define pmix_class_finalize PMIX_NAME(class_finalize) -#define pmix_class_initialize PMIX_NAME(class_initialize) -#define pmix_client_globals PMIX_NAME(pmix_client_globals) -#define pmix_client_process_nspace_blob PMIX_NAME(client_process_nspace_blob) -#define pmix_csum_partial PMIX_NAME(csum_partial) -#define pmix_dirname PMIX_NAME(dirname) -#define pmix_dmdx_local_t_class PMIX_NAME(dmdx_local_t_class) -#define pmix_dmdx_remote_t_class PMIX_NAME(dmdx_remote_t_class) -#define pmix_dmdx_reply_caddy_t_class PMIX_NAME(dmdx_reply_caddy_t_class) -#define pmix_dmdx_request_t_class PMIX_NAME(dmdx_request_t_class) -#define pmix_environ_merge PMIX_NAME(environ_merge) -#define pmix_errhandler_invoke PMIX_NAME(errhandler_invoke) -#define pmix_fd_read PMIX_NAME(fd_read) -#define pmix_fd_set_cloexec PMIX_NAME(fd_set_cloexec) -#define pmix_fd_write PMIX_NAME(fd_write) -#define pmix_globals PMIX_NAME(globals) -#define pmix_globals_finalize PMIX_NAME(globals_finalize) -#define pmix_globals_init PMIX_NAME(globals_init) -#define pmix_hash_fetch PMIX_NAME(hash_fetch) -#define pmix_hash_remove_data PMIX_NAME(hash_remove_data) -#define pmix_hash_store PMIX_NAME(hash_store) -#define pmix_hash_table_get_first_key_uint32 PMIX_NAME(hash_table_get_first_key_uint32) -#define pmix_hash_table_get_first_key_uint64 PMIX_NAME(hash_table_get_first_key_uint64) -#define pmix_hash_table_get_next_key_uint32 PMIX_NAME(hash_table_get_next_key_uint32) -#define pmix_hash_table_get_next_key_uint64 PMIX_NAME(hash_table_get_next_key_uint64) -#define pmix_hash_table_get_value_ptr PMIX_NAME(hash_table_get_value_ptr) -#define pmix_hash_table_get_value_uint32 PMIX_NAME(hash_table_get_value_uint32) -#define pmix_hash_table_get_value_uint64 PMIX_NAME(hash_table_get_value_uint64) -#define pmix_hash_table_init PMIX_NAME(hash_table_init) -#define pmix_hash_table_remove_all PMIX_NAME(hash_table_remove_all) -#define pmix_hash_table_remove_value_ptr PMIX_NAME(hash_table_remove_value_ptr) -#define pmix_hash_table_remove_value_uint32 PMIX_NAME(hash_table_remove_value_uint32) -#define pmix_hash_table_remove_value_uint64 PMIX_NAME(hash_table_remove_value_uint64) -#define pmix_hash_table_set_value_ptr PMIX_NAME(hash_table_set_value_ptr) -#define pmix_hash_table_set_value_uint32 PMIX_NAME(hash_table_set_value_uint32) -#define pmix_hash_table_set_value_uint64 PMIX_NAME(hash_table_set_value_uint64) -#define pmix_hash_table_t_class PMIX_NAME(hash_table_t_class) -#define pmix_home_directory PMIX_NAME(home_directory) -#define pmix_host_server PMIX_NAME(pmix_host_server) -#define pmix_initialize_crc_table PMIX_NAME(initialize_crc_table) -#define pmix_kval_t_class PMIX_NAME(kval_t_class) -#define pmix_list_insert PMIX_NAME(list_insert) -#define pmix_list_item_t_class PMIX_NAME(list_item_t_class) -#define pmix_list_join PMIX_NAME(list_join) -#define pmix_list_sort PMIX_NAME(list_sort) -#define pmix_list_splice PMIX_NAME(list_splice) -#define pmix_list_t_class PMIX_NAME(list_t_class) -#define pmix_munge_module PMIX_NAME(munge_module) -#define pmix_native_module PMIX_NAME(native_module) -#define pmix_notify_caddy_t_class PMIX_NAME(notify_caddy_t_class) -#define pmix_nrec_t_class PMIX_NAME(nrec_t_class) -#define pmix_nspace_t_class PMIX_NAME(nspace_t_class) -#define pmix_object_t_class PMIX_NAME(object_t_class) -#define pmix_os_path PMIX_NAME(os_path) -#define pmix_output PMIX_NAME(output) -#define pmix_output_close PMIX_NAME(output_close) -#define pmix_output_finalize PMIX_NAME(output_finalize) -#define pmix_output_get_verbosity PMIX_NAME(output_get_verbosity) -#define pmix_output_init PMIX_NAME(output_init) -#define pmix_output_open PMIX_NAME(output_open) -#define pmix_output_redirected_syslog_pri PMIX_NAME(pmix_output_redirected_syslog_pri) -#define pmix_output_redirected_to_syslog PMIX_NAME(output_redirected_to_syslog) -#define pmix_output_reopen PMIX_NAME(output_reopen) -#define pmix_output_reopen_all PMIX_NAME(output_reopen_all) -#define pmix_output_set_output_file_info PMIX_NAME(output_set_output_file_info) -#define pmix_output_set_verbosity PMIX_NAME(output_set_verbosity) -#define pmix_output_stream_t_class PMIX_NAME(output_stream_t_class) -#define pmix_output_string PMIX_NAME(output_string) -#define pmix_output_switch PMIX_NAME(output_switch) -#define pmix_output_verbose PMIX_NAME(output_verbose) -#define pmix_output_vstring PMIX_NAME(output_vstring) -#define pmix_output_vverbose PMIX_NAME(output_vverbose) -#define pmix_pack_proc_map PMIX_NAME(pack_proc_map) -#define pmix_peer_t_class PMIX_NAME(peer_t_class) -#define pmix_pending_connection_t_class PMIX_NAME(pending_connection_t_class) -#define pmix_pending_nspace_requests PMIX_NAME(pending_nspace_requests) -#define pmix_pending_resolve PMIX_NAME(pending_resolve) -#define pmix_pointer_array_add PMIX_NAME(pointer_array_add) -#define pmix_pointer_array_init PMIX_NAME(pointer_array_init) -#define pmix_pointer_array_set_item PMIX_NAME(pointer_array_set_item) -#define pmix_pointer_array_set_size PMIX_NAME(pointer_array_set_size) -#define pmix_pointer_array_t_class PMIX_NAME(pointer_array_t_class) -#define pmix_pointer_array_test_and_set_item PMIX_NAME(pointer_array_test_and_set_item) -#define pmix_rank_info_t_class PMIX_NAME(rank_info_t_class) -#define pmix_regex_parse_nodes PMIX_NAME(regex_parse_nodes) -#define pmix_regex_parse_procs PMIX_NAME(regex_parse_procs) -#define pmix_regex_range_t_class PMIX_NAME(regex_range_t_class) -#define pmix_regex_value_t_class PMIX_NAME(regex_value_t_class) -#define pmix_sec PMIX_NAME(pmix_sec) -#define pmix_sec_finalize PMIX_NAME(sec_finalize) -#define pmix_sec_init PMIX_NAME(sec_init) -#define pmix_server_abort PMIX_NAME(server_abort) -#define pmix_server_caddy_t_class PMIX_NAME(server_caddy_t_class) -#define pmix_server_commit PMIX_NAME(server_commit) -#define pmix_server_connect PMIX_NAME(server_connect) -#define pmix_server_deregister_errhandler PMIX_NAME(server_deregister_errhandler) -#define pmix_server_fence PMIX_NAME(server_fence) -#define pmix_server_get PMIX_NAME(server_get) -#define pmix_server_globals PMIX_NAME(pmix_server_globals) -#define pmix_server_lookup PMIX_NAME(server_lookup) -#define pmix_server_notify_error PMIX_NAME(server_notify_error) -#define pmix_server_nspace_t_class PMIX_NAME(server_nspace_t_class) -#define pmix_server_publish PMIX_NAME(server_publish) -#define pmix_server_register_errhandler PMIX_NAME(server_register_errhandler) -#define pmix_server_spawn PMIX_NAME(server_spawn) -#define pmix_server_trkr_t_class PMIX_NAME(server_trkr_t_class) -#define pmix_server_unpublish PMIX_NAME(server_unpublish) -#define pmix_setenv PMIX_NAME(setenv) -#define pmix_setup_caddy_t_class PMIX_NAME(setup_caddy_t_class) -#define pmix_shift_caddy_t_class PMIX_NAME(shift_caddy_t_class) -#define pmix_snd_caddy_t_class PMIX_NAME(snd_caddy_t_class) -#define pmix_snprintf PMIX_NAME(snprintf) -#define pmix_start_listening PMIX_NAME(start_listening) -#define pmix_start_progress_thread PMIX_NAME(start_progress_thread) -#define pmix_stop_listening PMIX_NAME(stop_listening) -#define pmix_stop_progress_thread PMIX_NAME(stop_progress_thread) -#define pmix_timer_t_class PMIX_NAME(timer_t_class) -#define pmix_tmp_directory PMIX_NAME(tmp_directory) -#define pmix_trkr_caddy_t_class PMIX_NAME(trkr_caddy_t_class) -#define pmix_uicrc_partial PMIX_NAME(uicrc_partial) -#define pmix_uicsum_partial PMIX_NAME(uicsum_partial) -#define pmix_unsetenv PMIX_NAME(unsetenv) -#define pmix_usock_finalize PMIX_NAME(usock_finalize) -#define pmix_usock_globals PMIX_NAME(pmix_usock_globals) -#define pmix_usock_init PMIX_NAME(usock_init) -#define pmix_usock_posted_recv_t_class PMIX_NAME(usock_posted_recv_t_class) -#define pmix_usock_process_msg PMIX_NAME(usock_process_msg) -#define pmix_usock_queue_t_class PMIX_NAME(usock_queue_t_class) -#define pmix_usock_recv_blocking PMIX_NAME(usock_recv_blocking) -#define pmix_usock_recv_handler PMIX_NAME(usock_recv_handler) -#define pmix_usock_recv_t_class PMIX_NAME(usock_recv_t_class) -#define pmix_usock_send_blocking PMIX_NAME(usock_send_blocking) -#define pmix_usock_send_handler PMIX_NAME(usock_send_handler) -#define pmix_usock_send_recv PMIX_NAME(usock_send_recv) -#define pmix_usock_send_t_class PMIX_NAME(usock_send_t_class) -#define pmix_usock_set_blocking PMIX_NAME(usock_set_blocking) -#define pmix_usock_set_nonblocking PMIX_NAME(usock_set_nonblocking) -#define pmix_usock_sr_t_class PMIX_NAME(usock_sr_t_class) -#define pmix_value_load PMIX_NAME(value_load) -#define pmix_value_unload PMIX_NAME(value_unload) -#define pmix_value_xfer PMIX_NAME(value_xfer) -#define pmix_vasprintf PMIX_NAME(vasprintf) -#define pmix_vsnprintf PMIX_NAME(vsnprintf) - - -#endif /* PMIX_SYM_TRANSFORM */ - -END_C_DECLS - -#endif /* PMIX_RENAME_H */ diff --git a/opal/mca/pmix/pmix112/pmix/include/pmix_server.h b/opal/mca/pmix/pmix112/pmix/include/pmix_server.h index 4d6a358340e..90a43b9e5b3 100644 --- a/opal/mca/pmix/pmix112/pmix/include/pmix_server.h +++ b/opal/mca/pmix/pmix112/pmix/include/pmix_server.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016 Intel, Inc. All rights reserved + * Copyright (c) 2013-2017 Intel, Inc. All rights reserved. * Copyright (c) 2015 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2015 Research Organization for Information Science @@ -291,13 +291,13 @@ typedef struct pmix_server_module_1_0_0_t { * additional info that may be required by the server * when initializing - e.g., a user/group ID to set * on the rendezvous file for the Unix Domain Socket */ -pmix_status_t PMIx_server_init(pmix_server_module_t *module, - pmix_info_t info[], size_t ninfo); +PMIX_EXPORT pmix_status_t PMIx_server_init(pmix_server_module_t *module, + pmix_info_t info[], size_t ninfo); /* Finalize the server support library. If internal comm is * in-use, the server will shut it down at this time. All * memory usage is released */ -pmix_status_t PMIx_server_finalize(void); +PMIX_EXPORT pmix_status_t PMIx_server_finalize(void); /* given a semicolon-separated list of input values, generate * a regex that can be passed down to the client for parsing. @@ -315,7 +315,7 @@ pmix_status_t PMIx_server_finalize(void); * parsing the provided regex. Other parsers may be supported - see * the pmix_client.h header for a list. */ -pmix_status_t PMIx_generate_regex(const char *input, char **regex); +PMIX_EXPORT pmix_status_t PMIx_generate_regex(const char *input, char **regex); /* The input is expected to consist of a comma-separated list * of ranges. Thus, an input of: @@ -328,7 +328,7 @@ pmix_status_t PMIx_generate_regex(const char *input, char **regex); * parsing the provided regex. Other parsers may be supported - see * the pmix_client.h header for a list. */ -pmix_status_t PMIx_generate_ppn(const char *input, char **ppn); +PMIX_EXPORT pmix_status_t PMIx_generate_ppn(const char *input, char **ppn); /* Setup the data about a particular nspace so it can * be passed to any child process upon startup. The PMIx @@ -355,16 +355,16 @@ pmix_status_t PMIx_generate_ppn(const char *input, char **ppn); * for the PMIx server library to correctly handle collectives * as a collective operation call can occur before all the * procs have been started */ -pmix_status_t PMIx_server_register_nspace(const char nspace[], int nlocalprocs, - pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_server_register_nspace(const char nspace[], int nlocalprocs, + pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Deregister an nspace and purge all objects relating to * it, including any client info from that nspace. This is * intended to support persistent PMIx servers by providing * an opportunity for the host RM to tell the PMIx server * library to release all memory for a completed job */ -void PMIx_server_deregister_nspace(const char nspace[]); +PMIX_EXPORT void PMIx_server_deregister_nspace(const char nspace[]); /* Register a client process with the PMIx server library. The * expected user ID and group ID of the child process helps the @@ -379,23 +379,23 @@ void PMIx_server_deregister_nspace(const char nspace[]); * return that object when the client calls "finalize", thus * allowing the host server to access the object without * performing a lookup. */ -pmix_status_t PMIx_server_register_client(const pmix_proc_t *proc, - uid_t uid, gid_t gid, - void *server_object, - pmix_op_cbfunc_t cbfunc, void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_server_register_client(const pmix_proc_t *proc, + uid_t uid, gid_t gid, + void *server_object, + pmix_op_cbfunc_t cbfunc, void *cbdata); /* Deregister a client and purge all data relating to it. The * deregister_nspace API will automatically delete all client * info for that nspace - this API is therefore intended solely * for use in exception cases */ -void PMIx_server_deregister_client(const pmix_proc_t *proc); +PMIX_EXPORT void PMIx_server_deregister_client(const pmix_proc_t *proc); /* Setup the environment of a child process to be forked * by the host so it can correctly interact with the PMIx * server. The PMIx client needs some setup information * so it can properly connect back to the server. This function * will set appropriate environmental variables for this purpose. */ -pmix_status_t PMIx_server_setup_fork(const pmix_proc_t *proc, char ***env); +PMIX_EXPORT pmix_status_t PMIx_server_setup_fork(const pmix_proc_t *proc, char ***env); /* Define a callback function the PMIx server will use to return * direct modex requests to the host server. The PMIx server @@ -413,9 +413,9 @@ typedef void (*pmix_dmodex_response_fn_t)(pmix_status_t status, * request into the PMIx server. The PMIx server will return a blob * (once it becomes available) via the cbfunc - the host * server shall send the blob back to the original requestor */ -pmix_status_t PMIx_server_dmodex_request(const pmix_proc_t *proc, - pmix_dmodex_response_fn_t cbfunc, - void *cbdata); +PMIX_EXPORT pmix_status_t PMIx_server_dmodex_request(const pmix_proc_t *proc, + pmix_dmodex_response_fn_t cbfunc, + void *cbdata); #if defined(c_plusplus) || defined(__cplusplus) } diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/Makefile.am b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/Makefile.am new file mode 100644 index 00000000000..9e3111de183 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/Makefile.am @@ -0,0 +1,68 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2011-2014 Cisco Systems, Inc. All rights reserved. +# Copyright (c) 2017 Research Organization for Information Science +# and Technology (RIST). All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +###################################################################### +# +# This is a bit complicated. If there is anything in the library, +# it will always be atomic-asm.S. We just symlink atomic-asm.S to +# the best atomic operations available (as determined at configure +# time) +# +###################################################################### +generated/@PMIX_ASM_FILE@: base/@PMIX_ASSEMBLY_ARCH@.asm + @ if test ! -f "$(top_srcdir)/src/atomics/asm/$@" ; then \ + cmd="$(PERL) '$(top_srcdir)/src/atomics/asm/generate-asm.pl' '@PMIX_ASSEMBLY_ARCH@' '@PMIX_ASSEMBLY_FORMAT@' '$(top_srcdir)/src/atomics/asm/base' '$(top_builddir)/src/atomics/asm/generated/@PMIX_ASM_FILE@'" ; \ + echo "$$cmd" ; \ + eval $$cmd ; \ + fi + +atomic-asm.S: generated/@PMIX_ASM_FILE@ + rm -f atomic-asm.S + @ if test -f "$(top_builddir)/src/atomics/asm/generated/@PMIX_ASM_FILE@" ; then \ + cmd="ln -s \"$(top_builddir)/src/atomics/asm/generated/@PMIX_ASM_FILE@\" atomic-asm.S" ; \ + echo "$$cmd" ; \ + eval $$cmd ; \ + else \ + cmd="ln -s \"$(top_srcdir)/src/atomics/asm/generated/@PMIX_ASM_FILE@\" atomic-asm.S" ; \ + echo "$$cmd" ; \ + eval $$cmd ; \ + fi + +# if PMIX_HAVE_ASM_FILE +# nodist_libasm_la_SOURCES = atomic-asm.S +# libasm_la_DEPENDENCIES = generated/@PMIX_ASM_FILE@ +# else +# nodist_libasm_la_SOURCES = +# libasm_la_DEPENDENCIES = +# endif + +# dist_libasm_la_SOURCES = asm.c + +###################################################################### + +clean-local: + rm -f atomic-asm.S + +distclean-local: + rm -f generated/atomic-local.s + +###################################################################### diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/asm-data.txt b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/asm-data.txt new file mode 100644 index 00000000000..55360354fb2 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/asm-data.txt @@ -0,0 +1,133 @@ +# -*- sh -*- +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2014-2017 Intel, Inc. All rights reserved. +# Copyright (c) 2017 Research Organization for Information Science +# and Technology (RIST). All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# +# Database for mapping architecture and assembly format to prebuilt +# assembly files. For explination of the assembly operations, see +# the inline assembly header files in src/include/sys/. +# +# FORMAT: +# ARCHITECTURE ASSEMBLY FORMAT BASE FILENAME +# +# Assembly Format field: +# config_file-text-global-label_suffix-gsym-lsym-type-size-align_log-ppc_r_reg-64_bit-gnu_stack + +###################################################################### +# +# AMD Opteron / Intel EM64T +# +###################################################################### + +X86_64 default-.text-.globl-:--.L-@-1-0-1-1-1 x86_64-linux +X86_64 default-.text-.globl-:--.L-@-1-0-1-1-0 x86_64-linux-nongas + + +###################################################################### +# +# ARM (ARMv7 and later) +# +###################################################################### + +ARM default-.text-.globl-:--.L-#-1-1-1-1-1 arm-linux + + +###################################################################### +# +# Intel Pentium Class +# +###################################################################### + +IA32 default-.text-.globl-:--.L-@-1-0-1-1-1 ia32-linux +IA32 default-.text-.globl-:--.L-@-1-0-1-1-0 ia32-linux-nongas +IA32 default-.text-.globl-:-_-L--0-1-1-1-0 ia32-osx +IA32 default-.text-.globl-:-_-L--0-0-1-1-1 ia32-cygwin +IA32 default-.text-.globl-:-_-L--0-0-1-1-0 ia32-cygwin-nongas + + +###################################################################### +# +# IA64 (Intel Itanium) +# +###################################################################### + +IA64 default-.text-.globl-:--.L-@-1-0-1-1-1 ia64-linux +IA64 default-.text-.globl-:--.L-@-1-0-1-1-0 ia64-linux-nongas + + +###################################################################### +# +# PowerPC / POWER +# +###################################################################### + +# standard ppc instruction set (AIX calls it ppc). This is not the +# true intersection of all the POWER / PowerPC machines, but works +# on PowerPCs since the 601 and on at least POWER 3 and above. +POWERPC32 default-.text-.globl-:-_-L--0-1-1-0-0 powerpc32-osx +POWERPC32 default-.text-.globl-:--.L-@-1-1-0-0-1 powerpc32-linux +POWERPC32 default-.text-.globl-:--.L-@-1-1-0-0-0 powerpc32-linux-nongas +POWERPC32 aix-.csect .text[PR]-.globl-:-.-L--0-1-0-0-0 powerpc32-aix + +# The ppc code above, plus support for the 64 bit operations. This +# mode is really only available on OS X when using the OS X 10.3 +# compiler chain with the -mcpu=970 option. +POWERPC32 default-.text-.globl-:-_-L--0-1-1-1-0 powerpc32-64-osx + +# PowerPC / POWER 64bit machines. sizeof(void*) == 8. +POWERPC64 default-.text-.globl-:-_-L--0-1-1-1-0 powerpc64-osx +POWERPC64 default-.text-.globl-:-.-.L-@-1-1-0-1-1 powerpc64-linux +POWERPC64 default-.text-.globl-:-.-.L-@-1-1-0-1-0 powerpc64-linux-nongas +POWERPC64 aix-.csect .text[PR]-.globl-:-.-L--0-1-0-1-0 powerpc64-aix + + +###################################################################### +# +# SPARC / UltraSPARC (Scalalable Processor ARChitecture) +# +###################################################################### + +# Usually compiled with -xarch=v8plus. Basically Sparc V9, but with +# sizeof(void*) == 4 instead of 8. Different from V9_64 because still +# uses 2 registers to pass in a 64bit integer +SPARCV9_32 default-.text-.globl-:--.L-#-1-0-1-1-0 sparcv9-32-solaris + +# The Sparc v9 (aka Ultra Sparc). Sizeof(void*) == 8. +SPARCV9_64 default-.text-.globl-:--.L-#-1-0-1-1-0 sparcv9-64-solaris + + +###################################################################### +# +# MIPS III (Microprocessor without Interlocked Pipeline Stages) +# R4000 and above +# +###################################################################### + +# So MIPS, in it's infinite wisdom (thank you!) decided that when +# compiling in 32bit mode and passing in a 64bit integer, it is done +# in one register (instead of SPARC and POWER, who use two). Which +# means that we can use the same code either way. Woo hoo! + +MIPS default-.text-.globl-:--L--1-1-1-1-0 mips-irix +MIPS default-.text-.globl-:--L--1-1-1-1-0 mips64el +MIPS default-.text-.globl-:--L-@-1-1-1-1-1 mips64-linux + +# However, this doesn't hold true for 32-bit MIPS as used on Linux. +MIPS default-.text-.globl-:--L-@-1-1-1-0-1 mips-linux diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/asm.c b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/asm.c new file mode 100644 index 00000000000..35811b37604 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/asm.c @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#include "src/include/pmix_config.h" + +#include "src/atomics/sys/atomic.h" +#include "src/atomics/sys/architecture.h" + +#if PMIX_ASSEMBLY_ARCH == PMIX_SPARC + +#define LOCKS_TABLE_SIZE 8 +/* make sure to get into reasonably useful bits (so shift at least 5) */ +#define FIND_LOCK(addr) (&(locks_table[(((unsigned long) addr) >> 8) & \ + (LOCKS_TABLE_SIZE - 1)])) + +/* have to fix if you change LOCKS_TABLE_SIZE */ +static pmix_atomic_lock_t locks_table[LOCKS_TABLE_SIZE] = { + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } }, + { { PMIX_ATOMIC_UNLOCKED } } +}; + + +int32_t +pmix_atomic_add_32(volatile int32_t *addr, int delta) +{ + int32_t ret; + + pmix_atomic_lock(FIND_LOCK(addr)); + + ret = (*addr += delta); + + pmix_atomic_unlock(FIND_LOCK(addr)); + + return ret; +} + + +int32_t +pmix_atomic_sub_32(volatile int32_t *addr, int delta) +{ + int32_t ret; + + pmix_atomic_lock(FIND_LOCK(addr)); + + ret = (*addr -= delta); + + pmix_atomic_unlock(FIND_LOCK(addr)); + + return ret; +} + + +#endif /* PMIX_ASSEMBLY_ARCH == PMIX_SPARC32 */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/ARM.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/ARM.asm new file mode 100644 index 00000000000..e3720299f77 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/ARM.asm @@ -0,0 +1,153 @@ +START_FILE + TEXT + + ALIGN(4) +START_FUNC(pmix_atomic_mb) + dmb + bx lr +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + dmb + bx lr +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + dmb + bx lr +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + LSYM(1) + ldrex r3, [r0] + cmp r1, r3 + bne REFLSYM(2) + strex r12, r2, [r0] + cmp r12, #0 + bne REFLSYM(1) + mov r0, #1 + LSYM(2) + movne r0, #0 + bx lr +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_acq_32) + LSYM(3) + ldrex r3, [r0] + cmp r1, r3 + bne REFLSYM(4) + strex r12, r2, [r0] + cmp r12, #0 + bne REFLSYM(3) + dmb + mov r0, #1 + LSYM(4) + movne r0, #0 + bx lr +END_FUNC(pmix_atomic_cmpset_acq_32) + + +START_FUNC(pmix_atomic_cmpset_rel_32) + LSYM(5) + ldrex r3, [r0] + cmp r1, r3 + bne REFLSYM(6) + dmb + strex r12, r2, [r0] + cmp r12, #0 + bne REFLSYM(4) + mov r0, #1 + LSYM(6) + movne r0, #0 + bx lr +END_FUNC(pmix_atomic_cmpset_rel_32) + +#START_64BIT +START_FUNC(pmix_atomic_cmpset_64) + push {r4-r7} + ldrd r6, r7, [sp, #16] + LSYM(7) + ldrexd r4, r5, [r0] + cmp r4, r2 + it eq + cmpeq r5, r3 + bne REFLSYM(8) + strexd r1, r6, r7, [r0] + cmp r1, #0 + bne REFLSYM(7) + mov r0, #1 + LSYM(8) + movne r0, #0 + pop {r4-r7} + bx lr +END_FUNC(pmix_atomic_cmpset_64) + +START_FUNC(pmix_atomic_cmpset_acq_64) + push {r4-r7} + ldrd r6, r7, [sp, #16] + LSYM(9) + ldrexd r4, r5, [r0] + cmp r4, r2 + it eq + cmpeq r5, r3 + bne REFLSYM(10) + strexd r1, r6, r7, [r0] + cmp r1, #0 + bne REFLSYM(9) + dmb + mov r0, #1 + LSYM(10) + movne r0, #0 + pop {r4-r7} + bx lr +END_FUNC(pmix_atomic_cmpset_acq_64) + + +START_FUNC(pmix_atomic_cmpset_rel_64) + push {r4-r7} + ldrd r6, r7, [sp, #16] + LSYM(11) + ldrexd r4, r5, [r0] + cmp r4, r2 + it eq + cmpeq r5, r3 + bne REFLSYM(12) + dmb + strexd r1, r6, r7, [r0] + cmp r1, #0 + bne REFLSYM(11) + mov r0, #1 + LSYM(12) + movne r0, #0 + pop {r4-r7} + bx lr +END_FUNC(pmix_atomic_cmpset_rel_64) +#END_64BIT + + +START_FUNC(pmix_atomic_add_32) + LSYM(13) + ldrex r2, [r0] + add r2, r2, r1 + strex r3, r2, [r0] + cmp r3, #0 + bne REFLSYM(13) + mov r0, r2 + bx lr +END_FUNC(pmix_atomic_add_32) + + +START_FUNC(pmix_atomic_sub_32) + LSYM(14) + ldrex r2, [r0] + sub r2, r2, r1 + strex r3, r2, [r0] + cmp r3, #0 + bne REFLSYM(14) + mov r0, r2 + bx lr +END_FUNC(pmix_atomic_sub_32) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/IA32.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/IA32.asm new file mode 100644 index 00000000000..d145aa237e5 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/IA32.asm @@ -0,0 +1,110 @@ +START_FILE + TEXT + +START_FUNC(pmix_atomic_mb) + pushl %ebp + movl %esp, %ebp + leave + ret +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + pushl %ebp + movl %esp, %ebp + leave + ret +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + pushl %ebp + movl %esp, %ebp + leave + ret +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + movl 16(%ebp), %ecx + movl 12(%ebp), %eax + lock; cmpxchgl %ecx,(%edx) + sete %dl + + movzbl %dl, %eax + leave + ret +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_64) + pushl %ebp + movl %esp, %ebp + subl $32, %esp + movl %ebx, -12(%ebp) + movl %esi, -8(%ebp) + movl %edi, -4(%ebp) + movl 8(%ebp), %edi + movl 12(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -24(%ebp) + movl %edx, -20(%ebp) + movl 20(%ebp), %eax + movl 24(%ebp), %edx + movl %eax, -32(%ebp) + movl %edx, -28(%ebp) + movl -24(%ebp), %ebx + movl -20(%ebp), %edx + movl -32(%ebp), %esi + movl -28(%ebp), %ecx + movl %ebx, %eax + push %ebx + movl %esi, %ebx + lock; cmpxchg8b (%edi) + sete %dl + pop %ebx + + movzbl %dl, %eax + movl -12(%ebp), %ebx + movl -8(%ebp), %esi + movl -4(%ebp), %edi + movl %ebp, %esp + popl %ebp + ret +END_FUNC(pmix_atomic_cmpset_64) + + +START_FUNC(pmix_atomic_add_32) + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; addl %edx,(%eax) + movl (%eax), %eax + leave + ret +END_FUNC(pmix_atomic_add_32) + + +START_FUNC(pmix_atomic_sub_32) + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; subl %edx,(%eax) + movl (%eax), %eax + leave + ret +END_FUNC(pmix_atomic_sub_32) + + +START_FUNC(pmix_sys_timer_get_cycles) + pushl %ebp + movl %esp, %ebp + rdtsc + popl %ebp + ret +END_FUNC(pmix_sys_timer_get_cycles) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/IA64.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/IA64.asm new file mode 100644 index 00000000000..a7287a8ffce --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/IA64.asm @@ -0,0 +1,109 @@ +START_FILE + + .pred.safe_across_calls p1-p5,p16-p63 + .text + .align 16 + .global pmix_atomic_mb# + .proc pmix_atomic_mb# +pmix_atomic_mb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_mb# + .align 16 + .global pmix_atomic_rmb# + .proc pmix_atomic_rmb# +pmix_atomic_rmb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_rmb# + .align 16 + .global pmix_atomic_wmb# + .proc pmix_atomic_wmb# +pmix_atomic_wmb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_wmb# + .align 16 + .global pmix_atomic_cmpset_acq_32# + .proc pmix_atomic_cmpset_acq_32# +pmix_atomic_cmpset_acq_32: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg4.acq r32=[r32],r34,ar.ccv + ;; + cmp4.eq p6, p7 = r32, r33 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_acq_32# + .align 16 + .global pmix_atomic_cmpset_rel_32# + .proc pmix_atomic_cmpset_rel_32# +pmix_atomic_cmpset_rel_32: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg4.rel r32=[r32],r34,ar.ccv + ;; + cmp4.eq p6, p7 = r32, r33 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_rel_32# + .align 16 + .global pmix_atomic_cmpset_acq_64# + .proc pmix_atomic_cmpset_acq_64# +pmix_atomic_cmpset_acq_64: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg8.acq r32=[r32],r34,ar.ccv + ;; + cmp.eq p6, p7 = r33, r32 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_acq_64# + .align 16 + .global pmix_atomic_cmpset_rel_64# + .proc pmix_atomic_cmpset_rel_64# +pmix_atomic_cmpset_rel_64: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg8.rel r32=[r32],r34,ar.ccv + ;; + cmp.eq p6, p7 = r33, r32 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_rel_64# + .align 16 + .global pmix_sys_timer_get_cycles# + .proc pmix_sys_timer_get_cycles# +pmix_sys_timer_get_cycles: + .prologue + .body + mov r8=ar.itc + br.ret.sptk.many b0 + ;; + .endp pmix_sys_timer_get_cycles# + .ident "GCC: (GNU) 3.2.3 20030502 (Red Hat Linux 3.2.3-49)" diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/MIPS.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/MIPS.asm new file mode 100644 index 00000000000..a30ac9f9b52 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/MIPS.asm @@ -0,0 +1,196 @@ +START_FILE + +#ifdef __linux__ +#include +#else +#include +#endif +#include + + TEXT + + ALIGN(8) +LEAF(pmix_atomic_mb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_mb) + + + ALIGN(8) +LEAF(pmix_atomic_rmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_rmb) + + +LEAF(pmix_atomic_wmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_wmb) + + +LEAF(pmix_atomic_cmpset_32) + .set noreorder +retry1: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done1 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry1 +done1: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_32) + + +LEAF(pmix_atomic_cmpset_acq_32) + .set noreorder +retry2: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done2 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry2 +done2: +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_32) + + +LEAF(pmix_atomic_cmpset_rel_32) + .set noreorder +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif +retry3: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done3 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry3 +done3: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_32) + +#ifdef __mips64 +LEAF(pmix_atomic_cmpset_64) + .set noreorder +retry4: + lld $3, 0($4) + bne $3, $5, done4 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry4 +done4: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_64) + + +LEAF(pmix_atomic_cmpset_acq_64) + .set noreorder +retry5: + lld $3, 0($4) + bne $3, $5, done5 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry5 +done5: + sync + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_64) + + +LEAF(pmix_atomic_cmpset_rel_64) + .set noreorder + sync +retry6: + lld $3, 0($4) + bne $3, $5, done6 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry6 +done6: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_64) +#endif /* __mips64 */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/POWERPC32.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/POWERPC32.asm new file mode 100644 index 00000000000..f341367806e --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/POWERPC32.asm @@ -0,0 +1,168 @@ +START_FILE + TEXT + + ALIGN(4) +START_FUNC(pmix_atomic_mb) + sync + blr +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + lwsync + blr +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + eieio + blr +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + LSYM(1) lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- REFLSYM(2) + stwcx. r5, 0, r3 + bne- REFLSYM(1) + LSYM(2) + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + blr +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_acq_32) + LSYM(3) lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- REFLSYM(4) + stwcx. r5, 0, r3 + bne- REFLSYM(3) + sync + LSYM(4) + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + lwsync + blr +END_FUNC(pmix_atomic_cmpset_acq_32) + + +START_FUNC(pmix_atomic_cmpset_rel_32) + eieio + LSYM(5) lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- REFLSYM(6) + stwcx. r5, 0, r3 + bne- REFLSYM(5) + sync + LSYM(6) + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + blr +END_FUNC(pmix_atomic_cmpset_rel_32) + +#START_64BIT +START_FUNC(pmix_atomic_cmpset_64) + stw r4,-32(r1) + stw r5,-28(r1) + stw r6,-24(r1) + stw r7,-20(r1) + ld r5,-32(r1) + ld r7,-24(r1) + LSYM(7) ldarx r9, 0, r3 + cmpd 0, r9, r5 + bne- REFLSYM(8) + stdcx. r7, 0, r3 + bne- REFLSYM(7) + LSYM(8) + xor r3,r5,r9 + subfic r5,r3,0 + adde r3,r5,r3 + blr +END_FUNC(pmix_atomic_cmpset_64) + + +START_FUNC(pmix_atomic_cmpset_acq_64) + stw r4,-32(r1) + stw r5,-28(r1) + stw r6,-24(r1) + stw r7,-20(r1) + ld r5,-32(r1) + ld r7,-24(r1) + + LSYM(9) ldarx r9, 0, r3 + cmpd 0, r9, r5 + bne- REFLSYM(10) + stdcx. r7, 0, r3 + bne- REFLSYM(9) + LSYM(10) + xor r3,r5,r9 + subfic r5,r3,0 + adde r3,r5,r3 + blr + lwsync + blr +END_FUNC(pmix_atomic_cmpset_acq_64) + + +START_FUNC(pmix_atomic_cmpset_rel_64) + stw r4,-32(r1) + stw r5,-28(r1) + stw r6,-24(r1) + stw r7,-20(r1) + ld r5,-32(r1) + ld r7,-24(r1) + + eieio + LSYM(11) ldarx r9, 0, r3 + cmpd 0, r9, r5 + bne- REFLSYM(12) + stdcx. r7, 0, r3 + bne- REFLSYM(11) + LSYM(12) + xor r3,r5,r9 + subfic r5,r3,0 + adde r3,r5,r3 + blr + lwsync + blr +END_FUNC(pmix_atomic_cmpset_rel_64) +#END_64BIT + + +START_FUNC(pmix_atomic_add_32) + LSYM(13) lwarx r0, 0, r3 + add r0, r4, r0 + stwcx. r0, 0, r3 + bne- REFLSYM(13) + mr r3,r0 + blr +END_FUNC(pmix_atomic_add_32) + + +START_FUNC(pmix_atomic_sub_32) + LSYM(14) lwarx r0,0,r3 + subf r0,r4,r0 + stwcx. r0,0,r3 + bne- REFLSYM(14) + mr r3,r0 + blr +END_FUNC(pmix_atomic_sub_32) + +START_FUNC(pmix_sys_timer_get_cycles) + LSYM(15) + mftbu r0 + mftb r11 + mftbu r2 + cmpw cr7,r2,r0 + bne+ cr7,REFLSYM(15) + li r4,0 + li r9,0 + or r3,r2,r9 + or r4,r4,r11 + blr +END_FUNC(pmix_sys_timer_get_cycles) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/POWERPC64.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/POWERPC64.asm new file mode 100644 index 00000000000..6fc4ad717c7 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/POWERPC64.asm @@ -0,0 +1,157 @@ +START_FILE + TEXT + + ALIGN(4) +START_FUNC(pmix_atomic_mb) + sync + blr +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + lwsync + blr +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + eieio + blr +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + LSYM(1) lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- REFLSYM(2) + stwcx. r5, 0, r3 + bne- REFLSYM(1) + LSYM(2) + cmpw cr7,r0,r4 + mfcr r3 + rlwinm r3,r3,31,1 + blr +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_acq_32) + mflr r0 + std r29,-24(r1) + std r0,16(r1) + stdu r1,-144(r1) + bl REFGSYM(pmix_atomic_cmpset_32) + mr r29,r3 + bl REFGSYM(pmix_atomic_rmb) + mr r3,r29 + addi r1,r1,144 + ld r0,16(r1) + mtlr r0 + ld r29,-24(r1) + blr +END_FUNC(pmix_atomic_cmpset_acq_32) + + +START_FUNC(pmix_atomic_cmpset_rel_32) + mflr r0 + std r27,-40(r1) + std r28,-32(r1) + std r29,-24(r1) + std r0,16(r1) + stdu r1,-160(r1) + mr r29,r3 + mr r28,r4 + mr r27,r5 + bl REFGSYM(pmix_atomic_wmb) + mr r3,r29 + mr r4,r28 + mr r5,r27 + bl REFGSYM(pmix_atomic_cmpset_32) + addi r1,r1,160 + ld r0,16(r1) + mtlr r0 + ld r27,-40(r1) + ld r28,-32(r1) + ld r29,-24(r1) + blr +END_FUNC(pmix_atomic_cmpset_rel_32) + + +START_FUNC(pmix_atomic_cmpset_64) + LSYM(3) ldarx r0, 0, r3 + cmpd 0, r0, r4 + bne- REFLSYM(4) + stdcx. r5, 0, r3 + bne- REFLSYM(3) + LSYM(4) + xor r3,r4,r0 + subfic r5,r3,0 + adde r3,r5,r3 + blr +END_FUNC(pmix_atomic_cmpset_64) + + +START_FUNC(pmix_atomic_cmpset_acq_64) + LSYM(7) ldarx r0, 0, r3 + cmpd 0, r0, r4 + bne- REFLSYM(8) + stdcx. r5, 0, r3 + bne- REFLSYM(7) + LSYM(8) + lwsync + xor r3,r4,r0 + subfic r5,r3,0 + adde r3,r5,r3 + blr +END_FUNC(pmix_atomic_cmpset_acq_64) + + +START_FUNC(pmix_atomic_cmpset_rel_64) + eieio + LSYM(9) ldarx r0, 0, r3 + cmpd 0, r0, r4 + bne- REFLSYM(10) + stdcx. r5, 0, r3 + bne- REFLSYM(9) + LSYM(10) + xor r3,r4,r0 + subfic r5,r3,0 + adde r3,r5,r3 + blr +END_FUNC(pmix_atomic_cmpset_rel_64) + + +START_FUNC(pmix_atomic_add_32) + LSYM(5) lwarx r0, 0, r3 + add r0, r4, r0 + stwcx. r0, 0, r3 + bne- REFLSYM(5) + + mr r3,r0 + blr +END_FUNC(pmix_atomic_add_32) + + +START_FUNC(pmix_atomic_sub_32) + LSYM(6) lwarx r0,0,r3 + subf r0,r4,r0 + stwcx. r0,0,r3 + bne- REFLSYM(6) + + mr r3,r0 + blr +END_FUNC(pmix_atomic_sub_32) + +START_FUNC(pmix_sys_timer_get_cycles) + LSYM(11) + mftbu r2 + rldicl r2,r2,0,32 + mftb r0 + rldicl r9,r0,0,32 + mftbu r0 + rldicl r0,r0,0,32 + cmpw cr7,r0,r2 + bne cr7,REFLSYM(11) + sldi r3,r0,32 + or r3,r3,r9 + blr +END_FUNC(pmix_sys_timer_get_cycles) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/SPARCV9_32.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/SPARCV9_32.asm new file mode 100644 index 00000000000..1ec34125a05 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/SPARCV9_32.asm @@ -0,0 +1,171 @@ +START_FILE + TEXT + + ALIGN(4) + + +START_FUNC(pmix_atomic_mb) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad + retl + nop +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad + retl + nop +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + retl + nop +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_acq_32) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + subx %g0, -1, %o0 + membar #LoadLoad + retl + sra %o0, 0, %o0 +END_FUNC(pmix_atomic_cmpset_acq_32) + + +START_FUNC(pmix_atomic_cmpset_rel_32) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 +END_FUNC(pmix_atomic_cmpset_rel_32) + + +START_FUNC(pmix_atomic_cmpset_64) + !#PROLOGUE# 0 + save %sp, -128, %sp + !#PROLOGUE# 1 + mov %i3, %o4 + mov %i4, %o5 + st %i1, [%fp-32] + st %i2, [%fp-28] + std %o4, [%fp-24] + ldx [%fp-24], %g1 + ldx [%fp-32], %g2 + casxa [%i0] 0x80, %g2, %g1 + stx %g1, [%fp-24] + + ld [%fp-24], %i5 + ld [%fp-32], %g1 + cmp %i5, %g1 + bne REFLSYM(12) + mov 0, %i0 + ld [%fp-20], %i2 + ld [%fp-28], %i1 + cmp %i2, %i1 + be,a REFLSYM(12) + mov 1, %i0 +LSYM(12) + ret + restore +END_FUNC(pmix_atomic_cmpset_64) + + +START_FUNC(pmix_atomic_cmpset_acq_64) + !#PROLOGUE# 0 + save %sp, -128, %sp + !#PROLOGUE# 1 + mov %i1, %o4 + mov %i2, %o5 + mov %i3, %o2 + mov %i4, %o3 + std %o4, [%fp-32] + std %o2, [%fp-24] + ldx [%fp-24], %g1 + ldx [%fp-32], %g2 + casxa [%i0] 0x80, %g2, %g1 + stx %g1, [%fp-24] + + ld [%fp-24], %i5 + ld [%fp-32], %g1 + cmp %i5, %g1 + bne REFLSYM(16) + mov 0, %i0 + ld [%fp-20], %i2 + ld [%fp-28], %i1 + cmp %i2, %i1 + be,a REFLSYM(16) + mov 1, %i0 +LSYM(16) + membar #LoadLoad + ret + restore +END_FUNC(pmix_atomic_cmpset_acq_64) + + +START_FUNC(pmix_atomic_cmpset_rel_64) + !#PROLOGUE# 0 + save %sp, -128, %sp + !#PROLOGUE# 1 + mov %i1, %o4 + mov %i2, %o5 + mov %i3, %o2 + mov %i4, %o3 + membar #StoreStore + std %o4, [%fp-32] + std %o2, [%fp-24] + ldx [%fp-24], %g1 + ldx [%fp-32], %g2 + casxa [%i0] 0x80, %g2, %g1 + stx %g1, [%fp-24] + + ld [%fp-24], %i5 + ld [%fp-32], %g1 + cmp %i5, %g1 + bne REFLSYM(21) + mov 0, %i0 + ld [%fp-20], %i2 + ld [%fp-28], %i1 + cmp %i2, %i1 + be,a REFLSYM(21) + mov 1, %i0 +LSYM(21) + ret + restore +END_FUNC(pmix_atomic_cmpset_rel_64) + + +START_FUNC(pmix_sys_timer_get_cycles) + save %sp,-96,%sp + rd %tick,%o0 + srlx %o0,32,%o1 + or %g0,%o1,%i0 + ret ! Result = %i0 + restore %o0,0,%o1 +END_FUNC(pmix_sys_timer_get_cycles) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/SPARCV9_64.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/SPARCV9_64.asm new file mode 100644 index 00000000000..85825577db7 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/SPARCV9_64.asm @@ -0,0 +1,111 @@ +START_FILE + TEXT + + ALIGN(4) + + +START_FUNC(pmix_atomic_mb) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad + retl + nop +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad + retl + nop +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + retl + nop +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_acq_32) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + subx %g0, -1, %o0 + membar #LoadLoad + retl + sra %o0, 0, %o0 +END_FUNC(pmix_atomic_cmpset_acq_32) + + +START_FUNC(pmix_atomic_cmpset_rel_32) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 +END_FUNC(pmix_atomic_cmpset_rel_32) + + +START_FUNC(pmix_atomic_cmpset_64) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casxa [%o0] 0x80, %o1, %o2 + mov 0, %o0 + xor %o2, %o1, %o2 + retl + movre %o2, 1, %o0 +END_FUNC(pmix_atomic_cmpset_64) + + +START_FUNC(pmix_atomic_cmpset_acq_64) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casxa [%o0] 0x80, %o1, %o2 + mov 0, %o0 + xor %o2, %o1, %o2 + movre %o2, 1, %o0 + membar #LoadLoad + retl + sra %o0, 0, %o0 +END_FUNC(pmix_atomic_cmpset_acq_64) + + +START_FUNC(pmix_atomic_cmpset_rel_64) + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + casxa [%o0] 0x80, %o1, %o2 + mov 0, %o0 + xor %o2, %o1, %o2 + retl + movre %o2, 1, %o0 +END_FUNC(pmix_atomic_cmpset_rel_64) + + +START_FUNC(pmix_sys_timer_get_cycles) + save %sp,-176,%sp + rd %tick,%o0 + ret ! Result = %i0 + restore %o0,0,%o0 +END_FUNC(pmix_sys_timer_get_cycles) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/X86_64.asm b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/X86_64.asm new file mode 100644 index 00000000000..042c07109ec --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/X86_64.asm @@ -0,0 +1,52 @@ +START_FILE + TEXT + +START_FUNC(pmix_atomic_mb) + pushq %rbp + movq %rsp, %rbp + leave + ret +END_FUNC(pmix_atomic_mb) + + +START_FUNC(pmix_atomic_rmb) + pushq %rbp + movq %rsp, %rbp + leave + ret +END_FUNC(pmix_atomic_rmb) + + +START_FUNC(pmix_atomic_wmb) + pushq %rbp + movq %rsp, %rbp + leave + ret +END_FUNC(pmix_atomic_wmb) + + +START_FUNC(pmix_atomic_cmpset_32) + movl %esi, %eax + lock; cmpxchgl %edx,(%rdi) + sete %dl + movzbl %dl, %eax + ret +END_FUNC(pmix_atomic_cmpset_32) + + +START_FUNC(pmix_atomic_cmpset_64) + movq %rsi, %rax + lock; cmpxchgq %rdx,(%rdi) + sete %dl + movzbl %dl, %eax + ret +END_FUNC(pmix_atomic_cmpset_64) + + +START_FUNC(pmix_sys_timer_get_cycles) + rdtsc + salq $32, %rdx + mov %eax, %eax + orq %rdx, %rax + ret +END_FUNC(pmix_sys_timer_get_cycles) diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/aix.conf b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/aix.conf new file mode 100755 index 00000000000..482aabdd418 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/aix.conf @@ -0,0 +1,44 @@ +sub start_file() +{ + my $ret = ""; + if ($IS64BIT == 1) { + $ret .= "\t.machine \"ppc64\"\n"; + } else { + $ret .= "\t.machine \"ppc\"\n"; + } + $ret .= "\t.toc\n"; + return $ret; +} + + +sub start_func($) +{ + my $func_name = shift; + my $ret = ""; + + $ret = "\t$GLOBAL $func_name\n"; + $ret .= "\t$GLOBAL $GSYM$func_name\n"; + $ret .= "\t.csect [DS],3\n"; + + $ret .= "$func_name$SUFFIX\n"; + + if ($IS64BIT == 1) { + $ret .= "\t.llong .$func_name, TOC[tc0], 0\n"; + } else { + $ret .= "\t.long .$func_name, TOC[tc0], 0\n"; + } + $ret .= "\t.csect [PR]\n"; + + $ret .= "\t.align 2\n"; + $ret .= "$GSYM$func_name$SUFFIX\n"; + + return $ret; +} + + +sub end_func($) +{ + return ""; +} + +1 diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/default.conf b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/default.conf new file mode 100755 index 00000000000..c54f085cf99 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/base/default.conf @@ -0,0 +1,34 @@ +sub start_file +{ + return ""; +} + + +sub start_func($) +{ + my $func_name = shift; + my $ret = ""; + + $ret = "\t$GLOBAL $GSYM$func_name\n"; + if (! $TYPE eq "") { + $ret .= "\t.type $GSYM$func_name, $TYPE" . "function\n"; + } + $ret .= "$GSYM$func_name$SUFFIX\n"; + + return $ret; +} + + +sub end_func($) +{ + my $func_name = shift; + my $ret = ""; + + if ($SIZE != 0) { + $ret = "\t.size $GSYM$func_name, .-$GSYM$func_name\n"; + } + + return $ret; +} + +1 diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generate-all-asm.pl b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generate-all-asm.pl new file mode 100755 index 00000000000..e452cbeaf2e --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generate-all-asm.pl @@ -0,0 +1,27 @@ +#!/usr/bin/perl -w + +my $perl = shift; +my $srcdir = shift; +my $destdir = shift; + +if (! $perl || ! $srcdir || ! $destdir) { + print "ERROR: invalid argument to generate-all-asm.pl\n"; + print "usage: generate-all-asm.pl [PERL] [SRCDIR] [DESTDIR]\n"; + exit 1; +} + +open(DATAFILE, "$srcdir/asm-data.txt") || die "Could not open data file: $!\n"; + +my $ASMARCH = ""; +my $ASMFORMAT = ""; +my $ASMFILE = ""; + +while() { + if (/^#/) { next; } + ($ASMARCH, $ASMFORMAT, $ASMFILE) = /(.*)\t(.*)\t(.*)/; + if (! $ASMARCH || ! $ASMFORMAT) { next; } + + print "--> Generating assembly for \"$ASMARCH\" \"$ASMFORMAT\"\n"; + system("$perl \'$srcdir/generate-asm.pl\' \'$ASMARCH\' \'$ASMFORMAT\' \'$srcdir/base\' \'$destdir/generated/atomic-$ASMFILE.s\'"); + +} diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generate-asm.pl b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generate-asm.pl new file mode 100644 index 00000000000..167a2a6e5e5 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generate-asm.pl @@ -0,0 +1,123 @@ +#!/usr/bin/perl -w +# +# Copyright (c) 2014 Cisco Systems, Inc. All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + + +my $asmarch = shift; +my $asmformat = shift; +my $basedir = shift; +my $output = shift; + +if ( ! $asmarch) { + print "usage: generate-asm.pl [ASMARCH] [ASMFORMAT] [BASEDIR] [OUTPUT NAME]\n"; + exit(1); +} + +open(INPUT, "$basedir/$asmarch.asm") || + die "Could not open $basedir/$asmarch.asm: $!\n"; +open(OUTPUT, ">$output") || die "Could not open $output: $!\n"; + +$CONFIG = "default"; +$TEXT = ""; +$GLOBAL = ""; +$SUFFIX = ""; +$GSYM = ""; +$LSYM = ""; +$TYPE = ""; +$SIZE = 0; +$ALIGN_LOG = 0; +$DEL_R_REG = 0; +$IS64BIT = 0; + +($CONFIG, $TEXT, $GLOBAL, $SUFFIX, $GSYM, $LSYM, $TYPE, $SIZE, $ALIGN_LOG, $DEL_R_REG, $IS64BIT, $GNU_STACK) = ( + $asmformat =~ /(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)\-(.*)/); + +if (0) { +print "$asmformat\n"; +print "CONFIG: $CONFIG\n"; +print "TEXT: $TEXT\n"; +print "GLOBAL: $GLOBAL\n"; +print "SUFFIX: $SUFFIX\n"; +print "GSYM: $GSYM\n"; +print "LSYM: $LSYM\n"; +print "GNU_STACK: $GNU_STACK\n"; +} + +my $current_func = ""; +my $delete = 0; + +# load our configuration +do "$basedir/$CONFIG.conf" or die "Could not open config file $basedir/$CONFIG.conf: $!\n"; + +while () { + s/TEXT/$TEXT/g; + s/GLOBAL/$GLOBAL/g; + s/REFGSYM\((.*)\)/$GSYM$1/g; + s/REFLSYM\((.*)\)/$LSYM$1/g; + s/GSYM\((.*)\)/$GSYM$1$SUFFIX/g; + s/LSYM\((.*)\)/$LSYM$1$SUFFIX/g; + + if ($DEL_R_REG == 0) { + s/cr([0-9][0-9]?)/$1/g; + s/r([0-9][0-9]?)/$1/g; + } + + if (/START_FILE/) { + $_ = start_file(); + } + + if (/START_FUNC\((.*)\)/) { + $current_func = $1; + $_ = start_func($current_func); + } + + if (/END_FUNC\((.*)\)/) { + $current_func = $1; + $_ = end_func($current_func); + } + + if ($ALIGN_LOG == 0) { + s/ALIGN\((\d*)\)/.align $1/g; + } else { + # Ugh... + if (m/ALIGN\((\d*)\)/) { + $val = $1; + $result = 0; + while ($val > 1) { $val /= 2; $result++ } + s/ALIGN\((\d*)\)/.align $result/; + } + } + + if (/^\#START_64BIT/) { + $_ = ""; + if ($IS64BIT == 0) { + $delete = 1; + } + } + if (/^\#END_64BIT/) { + $_ = ""; + $delete = 0; + } + + if ($delete == 0) { + print OUTPUT $_; + } +} + +if ($GNU_STACK == 1) { + if ($asmarch eq "ARM") { + print OUTPUT "\n\t.section\t.note.GNU-stack,\"\",\%progbits\n"; + } else { + print OUTPUT "\n\t.section\t.note.GNU-stack,\"\",\@progbits\n"; + } +} + +close(INPUT); +close(OUTPUT); diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-cygwin-nongas.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-cygwin-nongas.s new file mode 100644 index 00000000000..0eabeddf488 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-cygwin-nongas.s @@ -0,0 +1,109 @@ + .text + + .globl _pmix_atomic_mb +_pmix_atomic_mb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_rmb +_pmix_atomic_rmb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_wmb +_pmix_atomic_wmb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_cmpset_32 +_pmix_atomic_cmpset_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + movl 16(%ebp), %ecx + movl 12(%ebp), %eax + lock; cmpxchgl %ecx,(%edx) + sete %dl + + movzbl %dl, %eax + leave + ret + + + .globl _pmix_atomic_cmpset_64 +_pmix_atomic_cmpset_64: + pushl %ebp + movl %esp, %ebp + subl $32, %esp + movl %ebx, -12(%ebp) + movl %esi, -8(%ebp) + movl %edi, -4(%ebp) + movl 8(%ebp), %edi + movl 12(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -24(%ebp) + movl %edx, -20(%ebp) + movl 20(%ebp), %eax + movl 24(%ebp), %edx + movl %eax, -32(%ebp) + movl %edx, -28(%ebp) + movl -24(%ebp), %ebx + movl -20(%ebp), %edx + movl -32(%ebp), %esi + movl -28(%ebp), %ecx + movl %ebx, %eax + push %ebx + movl %esi, %ebx + lock; cmpxchg8b (%edi) + sete %dl + pop %ebx + + movzbl %dl, %eax + movl -12(%ebp), %ebx + movl -8(%ebp), %esi + movl -4(%ebp), %edi + movl %ebp, %esp + popl %ebp + ret + + + .globl _pmix_atomic_add_32 +_pmix_atomic_add_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; addl %edx,(%eax) + movl (%eax), %eax + leave + ret + + + .globl _pmix_atomic_sub_32 +_pmix_atomic_sub_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; subl %edx,(%eax) + movl (%eax), %eax + leave + ret + + + .globl _pmix_sys_timer_get_cycles +_pmix_sys_timer_get_cycles: + pushl %ebp + movl %esp, %ebp + rdtsc + popl %ebp + ret diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-cygwin.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-cygwin.s new file mode 100644 index 00000000000..9ffab89085f --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-cygwin.s @@ -0,0 +1,111 @@ + .text + + .globl _pmix_atomic_mb +_pmix_atomic_mb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_rmb +_pmix_atomic_rmb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_wmb +_pmix_atomic_wmb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_cmpset_32 +_pmix_atomic_cmpset_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + movl 16(%ebp), %ecx + movl 12(%ebp), %eax + lock; cmpxchgl %ecx,(%edx) + sete %dl + + movzbl %dl, %eax + leave + ret + + + .globl _pmix_atomic_cmpset_64 +_pmix_atomic_cmpset_64: + pushl %ebp + movl %esp, %ebp + subl $32, %esp + movl %ebx, -12(%ebp) + movl %esi, -8(%ebp) + movl %edi, -4(%ebp) + movl 8(%ebp), %edi + movl 12(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -24(%ebp) + movl %edx, -20(%ebp) + movl 20(%ebp), %eax + movl 24(%ebp), %edx + movl %eax, -32(%ebp) + movl %edx, -28(%ebp) + movl -24(%ebp), %ebx + movl -20(%ebp), %edx + movl -32(%ebp), %esi + movl -28(%ebp), %ecx + movl %ebx, %eax + push %ebx + movl %esi, %ebx + lock; cmpxchg8b (%edi) + sete %dl + pop %ebx + + movzbl %dl, %eax + movl -12(%ebp), %ebx + movl -8(%ebp), %esi + movl -4(%ebp), %edi + movl %ebp, %esp + popl %ebp + ret + + + .globl _pmix_atomic_add_32 +_pmix_atomic_add_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; addl %edx,(%eax) + movl (%eax), %eax + leave + ret + + + .globl _pmix_atomic_sub_32 +_pmix_atomic_sub_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; subl %edx,(%eax) + movl (%eax), %eax + leave + ret + + + .globl _pmix_sys_timer_get_cycles +_pmix_sys_timer_get_cycles: + pushl %ebp + movl %esp, %ebp + rdtsc + popl %ebp + ret + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-linux-nongas.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-linux-nongas.s new file mode 100644 index 00000000000..99971a156e7 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-linux-nongas.s @@ -0,0 +1,125 @@ + .text + + .globl pmix_atomic_mb + .type pmix_atomic_mb, @function +pmix_atomic_mb: + pushl %ebp + movl %esp, %ebp + leave + ret + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, @function +pmix_atomic_rmb: + pushl %ebp + movl %esp, %ebp + leave + ret + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, @function +pmix_atomic_wmb: + pushl %ebp + movl %esp, %ebp + leave + ret + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, @function +pmix_atomic_cmpset_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + movl 16(%ebp), %ecx + movl 12(%ebp), %eax + lock; cmpxchgl %ecx,(%edx) + sete %dl + + movzbl %dl, %eax + leave + ret + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_64 + .type pmix_atomic_cmpset_64, @function +pmix_atomic_cmpset_64: + pushl %ebp + movl %esp, %ebp + subl $32, %esp + movl %ebx, -12(%ebp) + movl %esi, -8(%ebp) + movl %edi, -4(%ebp) + movl 8(%ebp), %edi + movl 12(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -24(%ebp) + movl %edx, -20(%ebp) + movl 20(%ebp), %eax + movl 24(%ebp), %edx + movl %eax, -32(%ebp) + movl %edx, -28(%ebp) + movl -24(%ebp), %ebx + movl -20(%ebp), %edx + movl -32(%ebp), %esi + movl -28(%ebp), %ecx + movl %ebx, %eax + push %ebx + movl %esi, %ebx + lock; cmpxchg8b (%edi) + sete %dl + pop %ebx + + movzbl %dl, %eax + movl -12(%ebp), %ebx + movl -8(%ebp), %esi + movl -4(%ebp), %edi + movl %ebp, %esp + popl %ebp + ret + .size pmix_atomic_cmpset_64, .-pmix_atomic_cmpset_64 + + + .globl pmix_atomic_add_32 + .type pmix_atomic_add_32, @function +pmix_atomic_add_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; addl %edx,(%eax) + movl (%eax), %eax + leave + ret + .size pmix_atomic_add_32, .-pmix_atomic_add_32 + + + .globl pmix_atomic_sub_32 + .type pmix_atomic_sub_32, @function +pmix_atomic_sub_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; subl %edx,(%eax) + movl (%eax), %eax + leave + ret + .size pmix_atomic_sub_32, .-pmix_atomic_sub_32 + + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, @function +pmix_sys_timer_get_cycles: + pushl %ebp + movl %esp, %ebp + rdtsc + popl %ebp + ret + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-linux.s new file mode 100644 index 00000000000..a1f639ea514 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-linux.s @@ -0,0 +1,127 @@ + .text + + .globl pmix_atomic_mb + .type pmix_atomic_mb, @function +pmix_atomic_mb: + pushl %ebp + movl %esp, %ebp + leave + ret + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, @function +pmix_atomic_rmb: + pushl %ebp + movl %esp, %ebp + leave + ret + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, @function +pmix_atomic_wmb: + pushl %ebp + movl %esp, %ebp + leave + ret + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, @function +pmix_atomic_cmpset_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + movl 16(%ebp), %ecx + movl 12(%ebp), %eax + lock; cmpxchgl %ecx,(%edx) + sete %dl + + movzbl %dl, %eax + leave + ret + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_64 + .type pmix_atomic_cmpset_64, @function +pmix_atomic_cmpset_64: + pushl %ebp + movl %esp, %ebp + subl $32, %esp + movl %ebx, -12(%ebp) + movl %esi, -8(%ebp) + movl %edi, -4(%ebp) + movl 8(%ebp), %edi + movl 12(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -24(%ebp) + movl %edx, -20(%ebp) + movl 20(%ebp), %eax + movl 24(%ebp), %edx + movl %eax, -32(%ebp) + movl %edx, -28(%ebp) + movl -24(%ebp), %ebx + movl -20(%ebp), %edx + movl -32(%ebp), %esi + movl -28(%ebp), %ecx + movl %ebx, %eax + push %ebx + movl %esi, %ebx + lock; cmpxchg8b (%edi) + sete %dl + pop %ebx + + movzbl %dl, %eax + movl -12(%ebp), %ebx + movl -8(%ebp), %esi + movl -4(%ebp), %edi + movl %ebp, %esp + popl %ebp + ret + .size pmix_atomic_cmpset_64, .-pmix_atomic_cmpset_64 + + + .globl pmix_atomic_add_32 + .type pmix_atomic_add_32, @function +pmix_atomic_add_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; addl %edx,(%eax) + movl (%eax), %eax + leave + ret + .size pmix_atomic_add_32, .-pmix_atomic_add_32 + + + .globl pmix_atomic_sub_32 + .type pmix_atomic_sub_32, @function +pmix_atomic_sub_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; subl %edx,(%eax) + movl (%eax), %eax + leave + ret + .size pmix_atomic_sub_32, .-pmix_atomic_sub_32 + + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, @function +pmix_sys_timer_get_cycles: + pushl %ebp + movl %esp, %ebp + rdtsc + popl %ebp + ret + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-osx.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-osx.s new file mode 100644 index 00000000000..0eabeddf488 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia32-osx.s @@ -0,0 +1,109 @@ + .text + + .globl _pmix_atomic_mb +_pmix_atomic_mb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_rmb +_pmix_atomic_rmb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_wmb +_pmix_atomic_wmb: + pushl %ebp + movl %esp, %ebp + leave + ret + + + .globl _pmix_atomic_cmpset_32 +_pmix_atomic_cmpset_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %edx + movl 16(%ebp), %ecx + movl 12(%ebp), %eax + lock; cmpxchgl %ecx,(%edx) + sete %dl + + movzbl %dl, %eax + leave + ret + + + .globl _pmix_atomic_cmpset_64 +_pmix_atomic_cmpset_64: + pushl %ebp + movl %esp, %ebp + subl $32, %esp + movl %ebx, -12(%ebp) + movl %esi, -8(%ebp) + movl %edi, -4(%ebp) + movl 8(%ebp), %edi + movl 12(%ebp), %eax + movl 16(%ebp), %edx + movl %eax, -24(%ebp) + movl %edx, -20(%ebp) + movl 20(%ebp), %eax + movl 24(%ebp), %edx + movl %eax, -32(%ebp) + movl %edx, -28(%ebp) + movl -24(%ebp), %ebx + movl -20(%ebp), %edx + movl -32(%ebp), %esi + movl -28(%ebp), %ecx + movl %ebx, %eax + push %ebx + movl %esi, %ebx + lock; cmpxchg8b (%edi) + sete %dl + pop %ebx + + movzbl %dl, %eax + movl -12(%ebp), %ebx + movl -8(%ebp), %esi + movl -4(%ebp), %edi + movl %ebp, %esp + popl %ebp + ret + + + .globl _pmix_atomic_add_32 +_pmix_atomic_add_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; addl %edx,(%eax) + movl (%eax), %eax + leave + ret + + + .globl _pmix_atomic_sub_32 +_pmix_atomic_sub_32: + pushl %ebp + movl %esp, %ebp + movl 8(%ebp), %eax + movl 12(%ebp), %edx + lock; subl %edx,(%eax) + movl (%eax), %eax + leave + ret + + + .globl _pmix_sys_timer_get_cycles +_pmix_sys_timer_get_cycles: + pushl %ebp + movl %esp, %ebp + rdtsc + popl %ebp + ret diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia64-linux-nongas.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia64-linux-nongas.s new file mode 100644 index 00000000000..9e13953f4bd --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia64-linux-nongas.s @@ -0,0 +1,108 @@ + + .pred.safe_across_calls p1-p5,p16-p63 + .text + .align 16 + .global pmix_atomic_mb# + .proc pmix_atomic_mb# +pmix_atomic_mb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_mb# + .align 16 + .global pmix_atomic_rmb# + .proc pmix_atomic_rmb# +pmix_atomic_rmb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_rmb# + .align 16 + .global pmix_atomic_wmb# + .proc pmix_atomic_wmb# +pmix_atomic_wmb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_wmb# + .align 16 + .global pmix_atomic_cmpset_acq_32# + .proc pmix_atomic_cmpset_acq_32# +pmix_atomic_cmpset_acq_32: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg4.acq r32=[r32],r34,ar.ccv + ;; + cmp4.eq p6, p7 = r32, r33 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_acq_32# + .align 16 + .global pmix_atomic_cmpset_rel_32# + .proc pmix_atomic_cmpset_rel_32# +pmix_atomic_cmpset_rel_32: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg4.rel r32=[r32],r34,ar.ccv + ;; + cmp4.eq p6, p7 = r32, r33 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_rel_32# + .align 16 + .global pmix_atomic_cmpset_acq_64# + .proc pmix_atomic_cmpset_acq_64# +pmix_atomic_cmpset_acq_64: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg8.acq r32=[r32],r34,ar.ccv + ;; + cmp.eq p6, p7 = r33, r32 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_acq_64# + .align 16 + .global pmix_atomic_cmpset_rel_64# + .proc pmix_atomic_cmpset_rel_64# +pmix_atomic_cmpset_rel_64: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg8.rel r32=[r32],r34,ar.ccv + ;; + cmp.eq p6, p7 = r33, r32 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_rel_64# + .align 16 + .global pmix_sys_timer_get_cycles# + .proc pmix_sys_timer_get_cycles# +pmix_sys_timer_get_cycles: + .prologue + .body + mov r8=ar.itc + br.ret.sptk.many b0 + ;; + .endp pmix_sys_timer_get_cycles# + .ident "GCC: (GNU) 3.2.3 20030502 (Red Hat Linux 3.2.3-49)" diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia64-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia64-linux.s new file mode 100644 index 00000000000..2bc097f2af1 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-ia64-linux.s @@ -0,0 +1,110 @@ + + .pred.safe_across_calls p1-p5,p16-p63 + .text + .align 16 + .global pmix_atomic_mb# + .proc pmix_atomic_mb# +pmix_atomic_mb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_mb# + .align 16 + .global pmix_atomic_rmb# + .proc pmix_atomic_rmb# +pmix_atomic_rmb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_rmb# + .align 16 + .global pmix_atomic_wmb# + .proc pmix_atomic_wmb# +pmix_atomic_wmb: + .prologue + .body + mf + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_wmb# + .align 16 + .global pmix_atomic_cmpset_acq_32# + .proc pmix_atomic_cmpset_acq_32# +pmix_atomic_cmpset_acq_32: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg4.acq r32=[r32],r34,ar.ccv + ;; + cmp4.eq p6, p7 = r32, r33 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_acq_32# + .align 16 + .global pmix_atomic_cmpset_rel_32# + .proc pmix_atomic_cmpset_rel_32# +pmix_atomic_cmpset_rel_32: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg4.rel r32=[r32],r34,ar.ccv + ;; + cmp4.eq p6, p7 = r32, r33 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_rel_32# + .align 16 + .global pmix_atomic_cmpset_acq_64# + .proc pmix_atomic_cmpset_acq_64# +pmix_atomic_cmpset_acq_64: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg8.acq r32=[r32],r34,ar.ccv + ;; + cmp.eq p6, p7 = r33, r32 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_acq_64# + .align 16 + .global pmix_atomic_cmpset_rel_64# + .proc pmix_atomic_cmpset_rel_64# +pmix_atomic_cmpset_rel_64: + .prologue + .body + mov ar.ccv=r33;; + cmpxchg8.rel r32=[r32],r34,ar.ccv + ;; + cmp.eq p6, p7 = r33, r32 + ;; + (p6) addl r8 = 1, r0 + (p7) mov r8 = r0 + br.ret.sptk.many b0 + ;; + .endp pmix_atomic_cmpset_rel_64# + .align 16 + .global pmix_sys_timer_get_cycles# + .proc pmix_sys_timer_get_cycles# +pmix_sys_timer_get_cycles: + .prologue + .body + mov r8=ar.itc + br.ret.sptk.many b0 + ;; + .endp pmix_sys_timer_get_cycles# + .ident "GCC: (GNU) 3.2.3 20030502 (Red Hat Linux 3.2.3-49)" + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips-irix.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips-irix.s new file mode 100644 index 00000000000..27d4ae3d87b --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips-irix.s @@ -0,0 +1,195 @@ + +#ifdef __linux__ +#include +#else +#include +#endif +#include + + .text + + .align 3 +LEAF(pmix_atomic_mb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_mb) + + + .align 3 +LEAF(pmix_atomic_rmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_rmb) + + +LEAF(pmix_atomic_wmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_wmb) + + +LEAF(pmix_atomic_cmpset_32) + .set noreorder +retry1: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done1 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry1 +done1: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_32) + + +LEAF(pmix_atomic_cmpset_acq_32) + .set noreorder +retry2: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done2 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry2 +done2: +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_32) + + +LEAF(pmix_atomic_cmpset_rel_32) + .set noreorder +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif +retry3: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done3 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry3 +done3: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_32) + +#ifdef __mips64 +LEAF(pmix_atomic_cmpset_64) + .set noreorder +retry4: + lld $3, 0($4) + bne $3, $5, done4 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry4 +done4: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_64) + + +LEAF(pmix_atomic_cmpset_acq_64) + .set noreorder +retry5: + lld $3, 0($4) + bne $3, $5, done5 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry5 +done5: + sync + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_64) + + +LEAF(pmix_atomic_cmpset_rel_64) + .set noreorder + sync +retry6: + lld $3, 0($4) + bne $3, $5, done6 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry6 +done6: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_64) +#endif /* __mips64 */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips-linux.s new file mode 100644 index 00000000000..9339285f890 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips-linux.s @@ -0,0 +1,197 @@ + +#ifdef __linux__ +#include +#else +#include +#endif +#include + + .text + + .align 3 +LEAF(pmix_atomic_mb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_mb) + + + .align 3 +LEAF(pmix_atomic_rmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_rmb) + + +LEAF(pmix_atomic_wmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_wmb) + + +LEAF(pmix_atomic_cmpset_32) + .set noreorder +retry1: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done1 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry1 +done1: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_32) + + +LEAF(pmix_atomic_cmpset_acq_32) + .set noreorder +retry2: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done2 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry2 +done2: +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_32) + + +LEAF(pmix_atomic_cmpset_rel_32) + .set noreorder +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif +retry3: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done3 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry3 +done3: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_32) + +#ifdef __mips64 +LEAF(pmix_atomic_cmpset_64) + .set noreorder +retry4: + lld $3, 0($4) + bne $3, $5, done4 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry4 +done4: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_64) + + +LEAF(pmix_atomic_cmpset_acq_64) + .set noreorder +retry5: + lld $3, 0($4) + bne $3, $5, done5 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry5 +done5: + sync + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_64) + + +LEAF(pmix_atomic_cmpset_rel_64) + .set noreorder + sync +retry6: + lld $3, 0($4) + bne $3, $5, done6 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry6 +done6: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_64) +#endif /* __mips64 */ + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips64-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips64-linux.s new file mode 100644 index 00000000000..9339285f890 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips64-linux.s @@ -0,0 +1,197 @@ + +#ifdef __linux__ +#include +#else +#include +#endif +#include + + .text + + .align 3 +LEAF(pmix_atomic_mb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_mb) + + + .align 3 +LEAF(pmix_atomic_rmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_rmb) + + +LEAF(pmix_atomic_wmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_wmb) + + +LEAF(pmix_atomic_cmpset_32) + .set noreorder +retry1: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done1 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry1 +done1: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_32) + + +LEAF(pmix_atomic_cmpset_acq_32) + .set noreorder +retry2: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done2 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry2 +done2: +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_32) + + +LEAF(pmix_atomic_cmpset_rel_32) + .set noreorder +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif +retry3: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done3 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry3 +done3: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_32) + +#ifdef __mips64 +LEAF(pmix_atomic_cmpset_64) + .set noreorder +retry4: + lld $3, 0($4) + bne $3, $5, done4 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry4 +done4: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_64) + + +LEAF(pmix_atomic_cmpset_acq_64) + .set noreorder +retry5: + lld $3, 0($4) + bne $3, $5, done5 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry5 +done5: + sync + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_64) + + +LEAF(pmix_atomic_cmpset_rel_64) + .set noreorder + sync +retry6: + lld $3, 0($4) + bne $3, $5, done6 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry6 +done6: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_64) +#endif /* __mips64 */ + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips64el.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips64el.s new file mode 100644 index 00000000000..27d4ae3d87b --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-mips64el.s @@ -0,0 +1,195 @@ + +#ifdef __linux__ +#include +#else +#include +#endif +#include + + .text + + .align 3 +LEAF(pmix_atomic_mb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_mb) + + + .align 3 +LEAF(pmix_atomic_rmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_rmb) + + +LEAF(pmix_atomic_wmb) +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + j ra +END(pmix_atomic_wmb) + + +LEAF(pmix_atomic_cmpset_32) + .set noreorder +retry1: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done1 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry1 +done1: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_32) + + +LEAF(pmix_atomic_cmpset_acq_32) + .set noreorder +retry2: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done2 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry2 +done2: +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_32) + + +LEAF(pmix_atomic_cmpset_rel_32) + .set noreorder +#ifdef __linux__ + .set mips2 +#endif + sync +#ifdef __linux__ + .set mips0 +#endif +retry3: +#ifdef __linux__ + .set mips2 +#endif + ll $3, 0($4) +#ifdef __linux__ + .set mips0 +#endif + bne $3, $5, done3 + or $2, $6, 0 +#ifdef __linux__ + .set mips2 +#endif + sc $2, 0($4) +#ifdef __linux__ + .set mips0 +#endif + beqz $2, retry3 +done3: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_32) + +#ifdef __mips64 +LEAF(pmix_atomic_cmpset_64) + .set noreorder +retry4: + lld $3, 0($4) + bne $3, $5, done4 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry4 +done4: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_64) + + +LEAF(pmix_atomic_cmpset_acq_64) + .set noreorder +retry5: + lld $3, 0($4) + bne $3, $5, done5 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry5 +done5: + sync + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_acq_64) + + +LEAF(pmix_atomic_cmpset_rel_64) + .set noreorder + sync +retry6: + lld $3, 0($4) + bne $3, $5, done6 + or $2, $6, 0 + scd $2, 0($4) + beqz $2, retry6 +done6: + xor $3,$3,$5 + j ra + sltu $2,$3,1 + .set reorder +END(pmix_atomic_cmpset_rel_64) +#endif /* __mips64 */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-64-osx.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-64-osx.s new file mode 100644 index 00000000000..ebe9d8ad2bb --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-64-osx.s @@ -0,0 +1,165 @@ + .text + + .align 2 + .globl _pmix_atomic_mb +_pmix_atomic_mb: + sync + blr + + + .globl _pmix_atomic_rmb +_pmix_atomic_rmb: + lwsync + blr + + + .globl _pmix_atomic_wmb +_pmix_atomic_wmb: + eieio + blr + + + .globl _pmix_atomic_cmpset_32 +_pmix_atomic_cmpset_32: + L1: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L2 + stwcx. r5, 0, r3 + bne- L1 + L2: + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + .globl _pmix_atomic_cmpset_acq_32 +_pmix_atomic_cmpset_acq_32: + L3: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L4 + stwcx. r5, 0, r3 + bne- L3 + sync + L4: + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + lwsync + blr + + + .globl _pmix_atomic_cmpset_rel_32 +_pmix_atomic_cmpset_rel_32: + eieio + L5: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L6 + stwcx. r5, 0, r3 + bne- L5 + sync + L6: + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + .globl _pmix_atomic_cmpset_64 +_pmix_atomic_cmpset_64: + stw r4,-32(r1) + stw r5,-28(r1) + stw r6,-24(r1) + stw r7,-20(r1) + ld r5,-32(r1) + ld r7,-24(r1) + L7: ldarx r9, 0, r3 + cmpd 0, r9, r5 + bne- L8 + stdcx. r7, 0, r3 + bne- L7 + L8: + xor r3,r5,r9 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + .globl _pmix_atomic_cmpset_acq_64 +_pmix_atomic_cmpset_acq_64: + stw r4,-32(r1) + stw r5,-28(r1) + stw r6,-24(r1) + stw r7,-20(r1) + ld r5,-32(r1) + ld r7,-24(r1) + + L9: ldarx r9, 0, r3 + cmpd 0, r9, r5 + bne- L10 + stdcx. r7, 0, r3 + bne- L9 + L10: + xor r3,r5,r9 + subfic r5,r3,0 + adde r3,r5,r3 + blr + lwsync + blr + + + .globl _pmix_atomic_cmpset_rel_64 +_pmix_atomic_cmpset_rel_64: + stw r4,-32(r1) + stw r5,-28(r1) + stw r6,-24(r1) + stw r7,-20(r1) + ld r5,-32(r1) + ld r7,-24(r1) + + eieio + L11: ldarx r9, 0, r3 + cmpd 0, r9, r5 + bne- L12 + stdcx. r7, 0, r3 + bne- L11 + L12: + xor r3,r5,r9 + subfic r5,r3,0 + adde r3,r5,r3 + blr + lwsync + blr + + + .globl _pmix_atomic_add_32 +_pmix_atomic_add_32: + L13: lwarx r0, 0, r3 + add r0, r4, r0 + stwcx. r0, 0, r3 + bne- L13 + mr r3,r0 + blr + + + .globl _pmix_atomic_sub_32 +_pmix_atomic_sub_32: + L14: lwarx r0,0,r3 + subf r0,r4,r0 + stwcx. r0,0,r3 + bne- L14 + mr r3,r0 + blr + + .globl _pmix_sys_timer_get_cycles +_pmix_sys_timer_get_cycles: + L15: + mftbu r0 + mftb r11 + mftbu r2 + cmpw cr7,r2,r0 + bne+ cr7,L15 + li r4,0 + li r9,0 + or r3,r2,r9 + or r4,r4,r11 + blr diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-aix.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-aix.s new file mode 100644 index 00000000000..7cc2ba0b9dc --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-aix.s @@ -0,0 +1,156 @@ + .machine "ppc" + .toc + .csect .text[PR] + + .align 2 + .globl pmix_atomic_mb + .globl .pmix_atomic_mb + .csect [DS],3 +pmix_atomic_mb: + .long .pmix_atomic_mb, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_mb: + sync + blr + + + .globl pmix_atomic_rmb + .globl .pmix_atomic_rmb + .csect [DS],3 +pmix_atomic_rmb: + .long .pmix_atomic_rmb, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_rmb: + lwsync + blr + + + .globl pmix_atomic_wmb + .globl .pmix_atomic_wmb + .csect [DS],3 +pmix_atomic_wmb: + .long .pmix_atomic_wmb, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_wmb: + eieio + blr + + + .globl pmix_atomic_cmpset_32 + .globl .pmix_atomic_cmpset_32 + .csect [DS],3 +pmix_atomic_cmpset_32: + .long .pmix_atomic_cmpset_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_32: + L1: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- L2 + stwcx. 5, 0, 3 + bne- L1 + L2: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + blr + + + .globl pmix_atomic_cmpset_acq_32 + .globl .pmix_atomic_cmpset_acq_32 + .csect [DS],3 +pmix_atomic_cmpset_acq_32: + .long .pmix_atomic_cmpset_acq_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_acq_32: + L3: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- L4 + stwcx. 5, 0, 3 + bne- L3 + sync + L4: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + lwsync + blr + + + .globl pmix_atomic_cmpset_rel_32 + .globl .pmix_atomic_cmpset_rel_32 + .csect [DS],3 +pmix_atomic_cmpset_rel_32: + .long .pmix_atomic_cmpset_rel_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_rel_32: + eieio + L5: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- L6 + stwcx. 5, 0, 3 + bne- L5 + sync + L6: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + blr + + + + .globl pmix_atomic_add_32 + .globl .pmix_atomic_add_32 + .csect [DS],3 +pmix_atomic_add_32: + .long .pmix_atomic_add_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_add_32: + L13: lwarx 0, 0, 3 + add 0, 4, 0 + stwcx. 0, 0, 3 + bne- L13 + mr 3,0 + blr + + + .globl pmix_atomic_sub_32 + .globl .pmix_atomic_sub_32 + .csect [DS],3 +pmix_atomic_sub_32: + .long .pmix_atomic_sub_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_sub_32: + L14: lwarx 0,0,3 + subf 0,4,0 + stwcx. 0,0,3 + bne- L14 + mr 3,0 + blr + + .globl pmix_sys_timer_get_cycles + .globl .pmix_sys_timer_get_cycles + .csect [DS],3 +pmix_sys_timer_get_cycles: + .long .pmix_sys_timer_get_cycles, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_sys_timer_get_cycles: + L15: + mftbu 0 + mftb 11 + mftbu 2 + cmpw 7,2,0 + bne+ 7,L15 + li 4,0 + li 9,0 + or 3,2,9 + or 4,4,11 + blr diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-linux-nongas.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-linux-nongas.s new file mode 100644 index 00000000000..37b36c22b08 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-linux-nongas.s @@ -0,0 +1,118 @@ + .text + + .align 2 + .globl pmix_atomic_mb + .type pmix_atomic_mb, @function +pmix_atomic_mb: + sync + blr + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, @function +pmix_atomic_rmb: + lwsync + blr + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, @function +pmix_atomic_wmb: + eieio + blr + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, @function +pmix_atomic_cmpset_32: + .L1: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L2 + stwcx. 5, 0, 3 + bne- .L1 + .L2: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + blr + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_acq_32 + .type pmix_atomic_cmpset_acq_32, @function +pmix_atomic_cmpset_acq_32: + .L3: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L4 + stwcx. 5, 0, 3 + bne- .L3 + sync + .L4: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + lwsync + blr + .size pmix_atomic_cmpset_acq_32, .-pmix_atomic_cmpset_acq_32 + + + .globl pmix_atomic_cmpset_rel_32 + .type pmix_atomic_cmpset_rel_32, @function +pmix_atomic_cmpset_rel_32: + eieio + .L5: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L6 + stwcx. 5, 0, 3 + bne- .L5 + sync + .L6: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + blr + .size pmix_atomic_cmpset_rel_32, .-pmix_atomic_cmpset_rel_32 + + + + .globl pmix_atomic_add_32 + .type pmix_atomic_add_32, @function +pmix_atomic_add_32: + .L13: lwarx 0, 0, 3 + add 0, 4, 0 + stwcx. 0, 0, 3 + bne- .L13 + mr 3,0 + blr + .size pmix_atomic_add_32, .-pmix_atomic_add_32 + + + .globl pmix_atomic_sub_32 + .type pmix_atomic_sub_32, @function +pmix_atomic_sub_32: + .L14: lwarx 0,0,3 + subf 0,4,0 + stwcx. 0,0,3 + bne- .L14 + mr 3,0 + blr + .size pmix_atomic_sub_32, .-pmix_atomic_sub_32 + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, @function +pmix_sys_timer_get_cycles: + .L15: + mftbu 0 + mftb 11 + mftbu 2 + cmpw 7,2,0 + bne+ 7,.L15 + li 4,0 + li 9,0 + or 3,2,9 + or 4,4,11 + blr + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-linux.s new file mode 100644 index 00000000000..afecd0a305a --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-linux.s @@ -0,0 +1,120 @@ + .text + + .align 2 + .globl pmix_atomic_mb + .type pmix_atomic_mb, @function +pmix_atomic_mb: + sync + blr + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, @function +pmix_atomic_rmb: + lwsync + blr + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, @function +pmix_atomic_wmb: + eieio + blr + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, @function +pmix_atomic_cmpset_32: + .L1: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L2 + stwcx. 5, 0, 3 + bne- .L1 + .L2: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + blr + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_acq_32 + .type pmix_atomic_cmpset_acq_32, @function +pmix_atomic_cmpset_acq_32: + .L3: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L4 + stwcx. 5, 0, 3 + bne- .L3 + sync + .L4: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + lwsync + blr + .size pmix_atomic_cmpset_acq_32, .-pmix_atomic_cmpset_acq_32 + + + .globl pmix_atomic_cmpset_rel_32 + .type pmix_atomic_cmpset_rel_32, @function +pmix_atomic_cmpset_rel_32: + eieio + .L5: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L6 + stwcx. 5, 0, 3 + bne- .L5 + sync + .L6: + xor 3,0,4 + subfic 5,3,0 + adde 3,5,3 + blr + .size pmix_atomic_cmpset_rel_32, .-pmix_atomic_cmpset_rel_32 + + + + .globl pmix_atomic_add_32 + .type pmix_atomic_add_32, @function +pmix_atomic_add_32: + .L13: lwarx 0, 0, 3 + add 0, 4, 0 + stwcx. 0, 0, 3 + bne- .L13 + mr 3,0 + blr + .size pmix_atomic_add_32, .-pmix_atomic_add_32 + + + .globl pmix_atomic_sub_32 + .type pmix_atomic_sub_32, @function +pmix_atomic_sub_32: + .L14: lwarx 0,0,3 + subf 0,4,0 + stwcx. 0,0,3 + bne- .L14 + mr 3,0 + blr + .size pmix_atomic_sub_32, .-pmix_atomic_sub_32 + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, @function +pmix_sys_timer_get_cycles: + .L15: + mftbu 0 + mftb 11 + mftbu 2 + cmpw 7,2,0 + bne+ 7,.L15 + li 4,0 + li 9,0 + or 3,2,9 + or 4,4,11 + blr + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-osx.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-osx.s new file mode 100644 index 00000000000..7d2dceb2a81 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc32-osx.s @@ -0,0 +1,100 @@ + .text + + .align 2 + .globl _pmix_atomic_mb +_pmix_atomic_mb: + sync + blr + + + .globl _pmix_atomic_rmb +_pmix_atomic_rmb: + lwsync + blr + + + .globl _pmix_atomic_wmb +_pmix_atomic_wmb: + eieio + blr + + + .globl _pmix_atomic_cmpset_32 +_pmix_atomic_cmpset_32: + L1: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L2 + stwcx. r5, 0, r3 + bne- L1 + L2: + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + .globl _pmix_atomic_cmpset_acq_32 +_pmix_atomic_cmpset_acq_32: + L3: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L4 + stwcx. r5, 0, r3 + bne- L3 + sync + L4: + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + lwsync + blr + + + .globl _pmix_atomic_cmpset_rel_32 +_pmix_atomic_cmpset_rel_32: + eieio + L5: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L6 + stwcx. r5, 0, r3 + bne- L5 + sync + L6: + xor r3,r0,r4 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + + .globl _pmix_atomic_add_32 +_pmix_atomic_add_32: + L13: lwarx r0, 0, r3 + add r0, r4, r0 + stwcx. r0, 0, r3 + bne- L13 + mr r3,r0 + blr + + + .globl _pmix_atomic_sub_32 +_pmix_atomic_sub_32: + L14: lwarx r0,0,r3 + subf r0,r4,r0 + stwcx. r0,0,r3 + bne- L14 + mr r3,r0 + blr + + .globl _pmix_sys_timer_get_cycles +_pmix_sys_timer_get_cycles: + L15: + mftbu r0 + mftb r11 + mftbu r2 + cmpw cr7,r2,r0 + bne+ cr7,L15 + li r4,0 + li r9,0 + or r3,r2,r9 + or r4,r4,r11 + blr diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-aix.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-aix.s new file mode 100644 index 00000000000..7e3995e3512 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-aix.s @@ -0,0 +1,230 @@ + .machine "ppc64" + .toc + .csect .text[PR] + + .align 2 + .globl pmix_atomic_mb + .globl .pmix_atomic_mb + .csect [DS],3 +pmix_atomic_mb: + .llong .pmix_atomic_mb, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_mb: + sync + blr + + + .globl pmix_atomic_rmb + .globl .pmix_atomic_rmb + .csect [DS],3 +pmix_atomic_rmb: + .llong .pmix_atomic_rmb, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_rmb: + lwsync + blr + + + .globl pmix_atomic_wmb + .globl .pmix_atomic_wmb + .csect [DS],3 +pmix_atomic_wmb: + .llong .pmix_atomic_wmb, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_wmb: + eieio + blr + + + .globl pmix_atomic_cmpset_32 + .globl .pmix_atomic_cmpset_32 + .csect [DS],3 +pmix_atomic_cmpset_32: + .llong .pmix_atomic_cmpset_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_32: + L1: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- L2 + stwcx. 5, 0, 3 + bne- L1 + L2: + cmpw 7,0,4 + mfcr 3 + rlwinm 3,3,31,1 + blr + + + .globl pmix_atomic_cmpset_acq_32 + .globl .pmix_atomic_cmpset_acq_32 + .csect [DS],3 +pmix_atomic_cmpset_acq_32: + .llong .pmix_atomic_cmpset_acq_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_acq_32: + mflr 0 + std 29,-24(1) + std 0,16(1) + stdu 1,-144(1) + bl .pmix_atomic_cmpset_32 + mr 29,3 + bl .pmix_atomic_rmb + mr 3,29 + addi 1,1,144 + ld 0,16(1) + mtlr 0 + ld 29,-24(1) + blr + + + .globl pmix_atomic_cmpset_rel_32 + .globl .pmix_atomic_cmpset_rel_32 + .csect [DS],3 +pmix_atomic_cmpset_rel_32: + .llong .pmix_atomic_cmpset_rel_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_rel_32: + mflr 0 + std 27,-40(1) + std 28,-32(1) + std 29,-24(1) + std 0,16(1) + stdu 1,-160(1) + mr 29,3 + mr 28,4 + mr 27,5 + bl .pmix_atomic_wmb + mr 3,29 + mr 4,28 + mr 5,27 + bl .pmix_atomic_cmpset_32 + addi 1,1,160 + ld 0,16(1) + mtlr 0 + ld 27,-40(1) + ld 28,-32(1) + ld 29,-24(1) + blr + + + .globl pmix_atomic_cmpset_64 + .globl .pmix_atomic_cmpset_64 + .csect [DS],3 +pmix_atomic_cmpset_64: + .llong .pmix_atomic_cmpset_64, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_64: + L3: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- L4 + stdcx. 5, 0, 3 + bne- L3 + L4: + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + + + .globl pmix_atomic_cmpset_acq_64 + .globl .pmix_atomic_cmpset_acq_64 + .csect [DS],3 +pmix_atomic_cmpset_acq_64: + .llong .pmix_atomic_cmpset_acq_64, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_acq_64: + L7: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- L8 + stdcx. 5, 0, 3 + bne- L7 + L8: + lwsync + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + + + .globl pmix_atomic_cmpset_rel_64 + .globl .pmix_atomic_cmpset_rel_64 + .csect [DS],3 +pmix_atomic_cmpset_rel_64: + .llong .pmix_atomic_cmpset_rel_64, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_cmpset_rel_64: + eieio + L9: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- L10 + stdcx. 5, 0, 3 + bne- L9 + L10: + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + + + .globl pmix_atomic_add_32 + .globl .pmix_atomic_add_32 + .csect [DS],3 +pmix_atomic_add_32: + .llong .pmix_atomic_add_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_add_32: + L5: lwarx 0, 0, 3 + add 0, 4, 0 + stwcx. 0, 0, 3 + bne- L5 + + mr 3,0 + blr + + + .globl pmix_atomic_sub_32 + .globl .pmix_atomic_sub_32 + .csect [DS],3 +pmix_atomic_sub_32: + .llong .pmix_atomic_sub_32, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_atomic_sub_32: + L6: lwarx 0,0,3 + subf 0,4,0 + stwcx. 0,0,3 + bne- L6 + + mr 3,0 + blr + + .globl pmix_sys_timer_get_cycles + .globl .pmix_sys_timer_get_cycles + .csect [DS],3 +pmix_sys_timer_get_cycles: + .llong .pmix_sys_timer_get_cycles, TOC[tc0], 0 + .csect [PR] + .align 2 +.pmix_sys_timer_get_cycles: + L11: + mftbu 2 + rldicl 2,2,0,32 + mftb 0 + rldicl 9,0,0,32 + mftbu 0 + rldicl 0,0,0,32 + cmpw 7,0,2 + bne 7,L11 + sldi 3,0,32 + or 3,3,9 + blr diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-linux-nongas.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-linux-nongas.s new file mode 100644 index 00000000000..1bb4731ae32 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-linux-nongas.s @@ -0,0 +1,180 @@ + .text + + .align 2 + .globl .pmix_atomic_mb + .type .pmix_atomic_mb, @function +.pmix_atomic_mb: + sync + blr + .size .pmix_atomic_mb, .-.pmix_atomic_mb + + + .globl .pmix_atomic_rmb + .type .pmix_atomic_rmb, @function +.pmix_atomic_rmb: + lwsync + blr + .size .pmix_atomic_rmb, .-.pmix_atomic_rmb + + + .globl .pmix_atomic_wmb + .type .pmix_atomic_wmb, @function +.pmix_atomic_wmb: + eieio + blr + .size .pmix_atomic_wmb, .-.pmix_atomic_wmb + + + .globl .pmix_atomic_cmpset_32 + .type .pmix_atomic_cmpset_32, @function +.pmix_atomic_cmpset_32: + .L1: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L2 + stwcx. 5, 0, 3 + bne- .L1 + .L2: + cmpw 7,0,4 + mfcr 3 + rlwinm 3,3,31,1 + blr + .size .pmix_atomic_cmpset_32, .-.pmix_atomic_cmpset_32 + + + .globl .pmix_atomic_cmpset_acq_32 + .type .pmix_atomic_cmpset_acq_32, @function +.pmix_atomic_cmpset_acq_32: + mflr 0 + std 29,-24(1) + std 0,16(1) + stdu 1,-144(1) + bl .pmix_atomic_cmpset_32 + mr 29,3 + bl .pmix_atomic_rmb + mr 3,29 + addi 1,1,144 + ld 0,16(1) + mtlr 0 + ld 29,-24(1) + blr + .size .pmix_atomic_cmpset_acq_32, .-.pmix_atomic_cmpset_acq_32 + + + .globl .pmix_atomic_cmpset_rel_32 + .type .pmix_atomic_cmpset_rel_32, @function +.pmix_atomic_cmpset_rel_32: + mflr 0 + std 27,-40(1) + std 28,-32(1) + std 29,-24(1) + std 0,16(1) + stdu 1,-160(1) + mr 29,3 + mr 28,4 + mr 27,5 + bl .pmix_atomic_wmb + mr 3,29 + mr 4,28 + mr 5,27 + bl .pmix_atomic_cmpset_32 + addi 1,1,160 + ld 0,16(1) + mtlr 0 + ld 27,-40(1) + ld 28,-32(1) + ld 29,-24(1) + blr + .size .pmix_atomic_cmpset_rel_32, .-.pmix_atomic_cmpset_rel_32 + + + .globl .pmix_atomic_cmpset_64 + .type .pmix_atomic_cmpset_64, @function +.pmix_atomic_cmpset_64: + .L3: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- .L4 + stdcx. 5, 0, 3 + bne- .L3 + .L4: + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + .size .pmix_atomic_cmpset_64, .-.pmix_atomic_cmpset_64 + + + .globl .pmix_atomic_cmpset_acq_64 + .type .pmix_atomic_cmpset_acq_64, @function +.pmix_atomic_cmpset_acq_64: + .L7: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- .L8 + stdcx. 5, 0, 3 + bne- .L7 + .L8: + lwsync + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + .size .pmix_atomic_cmpset_acq_64, .-.pmix_atomic_cmpset_acq_64 + + + .globl .pmix_atomic_cmpset_rel_64 + .type .pmix_atomic_cmpset_rel_64, @function +.pmix_atomic_cmpset_rel_64: + eieio + .L9: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- .L10 + stdcx. 5, 0, 3 + bne- .L9 + .L10: + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + .size .pmix_atomic_cmpset_rel_64, .-.pmix_atomic_cmpset_rel_64 + + + .globl .pmix_atomic_add_32 + .type .pmix_atomic_add_32, @function +.pmix_atomic_add_32: + .L5: lwarx 0, 0, 3 + add 0, 4, 0 + stwcx. 0, 0, 3 + bne- .L5 + + mr 3,0 + blr + .size .pmix_atomic_add_32, .-.pmix_atomic_add_32 + + + .globl .pmix_atomic_sub_32 + .type .pmix_atomic_sub_32, @function +.pmix_atomic_sub_32: + .L6: lwarx 0,0,3 + subf 0,4,0 + stwcx. 0,0,3 + bne- .L6 + + mr 3,0 + blr + .size .pmix_atomic_sub_32, .-.pmix_atomic_sub_32 + + .globl .pmix_sys_timer_get_cycles + .type .pmix_sys_timer_get_cycles, @function +.pmix_sys_timer_get_cycles: + .L11: + mftbu 2 + rldicl 2,2,0,32 + mftb 0 + rldicl 9,0,0,32 + mftbu 0 + rldicl 0,0,0,32 + cmpw 7,0,2 + bne 7,.L11 + sldi 3,0,32 + or 3,3,9 + blr + .size .pmix_sys_timer_get_cycles, .-.pmix_sys_timer_get_cycles diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-linux.s new file mode 100644 index 00000000000..300d0aa0d70 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-linux.s @@ -0,0 +1,182 @@ + .text + + .align 2 + .globl .pmix_atomic_mb + .type .pmix_atomic_mb, @function +.pmix_atomic_mb: + sync + blr + .size .pmix_atomic_mb, .-.pmix_atomic_mb + + + .globl .pmix_atomic_rmb + .type .pmix_atomic_rmb, @function +.pmix_atomic_rmb: + lwsync + blr + .size .pmix_atomic_rmb, .-.pmix_atomic_rmb + + + .globl .pmix_atomic_wmb + .type .pmix_atomic_wmb, @function +.pmix_atomic_wmb: + eieio + blr + .size .pmix_atomic_wmb, .-.pmix_atomic_wmb + + + .globl .pmix_atomic_cmpset_32 + .type .pmix_atomic_cmpset_32, @function +.pmix_atomic_cmpset_32: + .L1: lwarx 0, 0, 3 + cmpw 0, 0, 4 + bne- .L2 + stwcx. 5, 0, 3 + bne- .L1 + .L2: + cmpw 7,0,4 + mfcr 3 + rlwinm 3,3,31,1 + blr + .size .pmix_atomic_cmpset_32, .-.pmix_atomic_cmpset_32 + + + .globl .pmix_atomic_cmpset_acq_32 + .type .pmix_atomic_cmpset_acq_32, @function +.pmix_atomic_cmpset_acq_32: + mflr 0 + std 29,-24(1) + std 0,16(1) + stdu 1,-144(1) + bl .pmix_atomic_cmpset_32 + mr 29,3 + bl .pmix_atomic_rmb + mr 3,29 + addi 1,1,144 + ld 0,16(1) + mtlr 0 + ld 29,-24(1) + blr + .size .pmix_atomic_cmpset_acq_32, .-.pmix_atomic_cmpset_acq_32 + + + .globl .pmix_atomic_cmpset_rel_32 + .type .pmix_atomic_cmpset_rel_32, @function +.pmix_atomic_cmpset_rel_32: + mflr 0 + std 27,-40(1) + std 28,-32(1) + std 29,-24(1) + std 0,16(1) + stdu 1,-160(1) + mr 29,3 + mr 28,4 + mr 27,5 + bl .pmix_atomic_wmb + mr 3,29 + mr 4,28 + mr 5,27 + bl .pmix_atomic_cmpset_32 + addi 1,1,160 + ld 0,16(1) + mtlr 0 + ld 27,-40(1) + ld 28,-32(1) + ld 29,-24(1) + blr + .size .pmix_atomic_cmpset_rel_32, .-.pmix_atomic_cmpset_rel_32 + + + .globl .pmix_atomic_cmpset_64 + .type .pmix_atomic_cmpset_64, @function +.pmix_atomic_cmpset_64: + .L3: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- .L4 + stdcx. 5, 0, 3 + bne- .L3 + .L4: + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + .size .pmix_atomic_cmpset_64, .-.pmix_atomic_cmpset_64 + + + .globl .pmix_atomic_cmpset_acq_64 + .type .pmix_atomic_cmpset_acq_64, @function +.pmix_atomic_cmpset_acq_64: + .L7: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- .L8 + stdcx. 5, 0, 3 + bne- .L7 + .L8: + lwsync + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + .size .pmix_atomic_cmpset_acq_64, .-.pmix_atomic_cmpset_acq_64 + + + .globl .pmix_atomic_cmpset_rel_64 + .type .pmix_atomic_cmpset_rel_64, @function +.pmix_atomic_cmpset_rel_64: + eieio + .L9: ldarx 0, 0, 3 + cmpd 0, 0, 4 + bne- .L10 + stdcx. 5, 0, 3 + bne- .L9 + .L10: + xor 3,4,0 + subfic 5,3,0 + adde 3,5,3 + blr + .size .pmix_atomic_cmpset_rel_64, .-.pmix_atomic_cmpset_rel_64 + + + .globl .pmix_atomic_add_32 + .type .pmix_atomic_add_32, @function +.pmix_atomic_add_32: + .L5: lwarx 0, 0, 3 + add 0, 4, 0 + stwcx. 0, 0, 3 + bne- .L5 + + mr 3,0 + blr + .size .pmix_atomic_add_32, .-.pmix_atomic_add_32 + + + .globl .pmix_atomic_sub_32 + .type .pmix_atomic_sub_32, @function +.pmix_atomic_sub_32: + .L6: lwarx 0,0,3 + subf 0,4,0 + stwcx. 0,0,3 + bne- .L6 + + mr 3,0 + blr + .size .pmix_atomic_sub_32, .-.pmix_atomic_sub_32 + + .globl .pmix_sys_timer_get_cycles + .type .pmix_sys_timer_get_cycles, @function +.pmix_sys_timer_get_cycles: + .L11: + mftbu 2 + rldicl 2,2,0,32 + mftb 0 + rldicl 9,0,0,32 + mftbu 0 + rldicl 0,0,0,32 + cmpw 7,0,2 + bne 7,.L11 + sldi 3,0,32 + or 3,3,9 + blr + .size .pmix_sys_timer_get_cycles, .-.pmix_sys_timer_get_cycles + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-osx.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-osx.s new file mode 100644 index 00000000000..3a29e67e018 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-powerpc64-osx.s @@ -0,0 +1,156 @@ + .text + + .align 2 + .globl _pmix_atomic_mb +_pmix_atomic_mb: + sync + blr + + + .globl _pmix_atomic_rmb +_pmix_atomic_rmb: + lwsync + blr + + + .globl _pmix_atomic_wmb +_pmix_atomic_wmb: + eieio + blr + + + .globl _pmix_atomic_cmpset_32 +_pmix_atomic_cmpset_32: + L1: lwarx r0, 0, r3 + cmpw 0, r0, r4 + bne- L2 + stwcx. r5, 0, r3 + bne- L1 + L2: + cmpw cr7,r0,r4 + mfcr r3 + rlwinm r3,r3,31,1 + blr + + + .globl _pmix_atomic_cmpset_acq_32 +_pmix_atomic_cmpset_acq_32: + mflr r0 + std r29,-24(r1) + std r0,16(r1) + stdu r1,-144(r1) + bl _pmix_atomic_cmpset_32 + mr r29,r3 + bl _pmix_atomic_rmb + mr r3,r29 + addi r1,r1,144 + ld r0,16(r1) + mtlr r0 + ld r29,-24(r1) + blr + + + .globl _pmix_atomic_cmpset_rel_32 +_pmix_atomic_cmpset_rel_32: + mflr r0 + std r27,-40(r1) + std r28,-32(r1) + std r29,-24(r1) + std r0,16(r1) + stdu r1,-160(r1) + mr r29,r3 + mr r28,r4 + mr r27,r5 + bl _pmix_atomic_wmb + mr r3,r29 + mr r4,r28 + mr r5,r27 + bl _pmix_atomic_cmpset_32 + addi r1,r1,160 + ld r0,16(r1) + mtlr r0 + ld r27,-40(r1) + ld r28,-32(r1) + ld r29,-24(r1) + blr + + + .globl _pmix_atomic_cmpset_64 +_pmix_atomic_cmpset_64: + L3: ldarx r0, 0, r3 + cmpd 0, r0, r4 + bne- L4 + stdcx. r5, 0, r3 + bne- L3 + L4: + xor r3,r4,r0 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + .globl _pmix_atomic_cmpset_acq_64 +_pmix_atomic_cmpset_acq_64: + L7: ldarx r0, 0, r3 + cmpd 0, r0, r4 + bne- L8 + stdcx. r5, 0, r3 + bne- L7 + L8: + lwsync + xor r3,r4,r0 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + .globl _pmix_atomic_cmpset_rel_64 +_pmix_atomic_cmpset_rel_64: + eieio + L9: ldarx r0, 0, r3 + cmpd 0, r0, r4 + bne- L10 + stdcx. r5, 0, r3 + bne- L9 + L10: + xor r3,r4,r0 + subfic r5,r3,0 + adde r3,r5,r3 + blr + + + .globl _pmix_atomic_add_32 +_pmix_atomic_add_32: + L5: lwarx r0, 0, r3 + add r0, r4, r0 + stwcx. r0, 0, r3 + bne- L5 + + mr r3,r0 + blr + + + .globl _pmix_atomic_sub_32 +_pmix_atomic_sub_32: + L6: lwarx r0,0,r3 + subf r0,r4,r0 + stwcx. r0,0,r3 + bne- L6 + + mr r3,r0 + blr + + .globl _pmix_sys_timer_get_cycles +_pmix_sys_timer_get_cycles: + L11: + mftbu r2 + rldicl r2,r2,0,32 + mftb r0 + rldicl r9,r0,0,32 + mftbu r0 + rldicl r0,r0,0,32 + cmpw cr7,r0,r2 + bne cr7,L11 + sldi r3,r0,32 + or r3,r3,r9 + blr diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-sparcv9-32-solaris.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-sparcv9-32-solaris.s new file mode 100644 index 00000000000..3fb48494f6e --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-sparcv9-32-solaris.s @@ -0,0 +1,190 @@ + .text + + .align 4 + + + .globl pmix_atomic_mb + .type pmix_atomic_mb, #function +pmix_atomic_mb: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad + retl + nop + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, #function +pmix_atomic_rmb: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad + retl + nop + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, #function +pmix_atomic_wmb: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + retl + nop + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, #function +pmix_atomic_cmpset_32: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_acq_32 + .type pmix_atomic_cmpset_acq_32, #function +pmix_atomic_cmpset_acq_32: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + subx %g0, -1, %o0 + membar #LoadLoad + retl + sra %o0, 0, %o0 + .size pmix_atomic_cmpset_acq_32, .-pmix_atomic_cmpset_acq_32 + + + .globl pmix_atomic_cmpset_rel_32 + .type pmix_atomic_cmpset_rel_32, #function +pmix_atomic_cmpset_rel_32: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 + .size pmix_atomic_cmpset_rel_32, .-pmix_atomic_cmpset_rel_32 + + + .globl pmix_atomic_cmpset_64 + .type pmix_atomic_cmpset_64, #function +pmix_atomic_cmpset_64: + !#PROLOGUE# 0 + save %sp, -128, %sp + !#PROLOGUE# 1 + mov %i3, %o4 + mov %i4, %o5 + st %i1, [%fp-32] + st %i2, [%fp-28] + std %o4, [%fp-24] + ldx [%fp-24], %g1 + ldx [%fp-32], %g2 + casxa [%i0] 0x80, %g2, %g1 + stx %g1, [%fp-24] + + ld [%fp-24], %i5 + ld [%fp-32], %g1 + cmp %i5, %g1 + bne .L12 + mov 0, %i0 + ld [%fp-20], %i2 + ld [%fp-28], %i1 + cmp %i2, %i1 + be,a .L12 + mov 1, %i0 +.L12: + ret + restore + .size pmix_atomic_cmpset_64, .-pmix_atomic_cmpset_64 + + + .globl pmix_atomic_cmpset_acq_64 + .type pmix_atomic_cmpset_acq_64, #function +pmix_atomic_cmpset_acq_64: + !#PROLOGUE# 0 + save %sp, -128, %sp + !#PROLOGUE# 1 + mov %i1, %o4 + mov %i2, %o5 + mov %i3, %o2 + mov %i4, %o3 + std %o4, [%fp-32] + std %o2, [%fp-24] + ldx [%fp-24], %g1 + ldx [%fp-32], %g2 + casxa [%i0] 0x80, %g2, %g1 + stx %g1, [%fp-24] + + ld [%fp-24], %i5 + ld [%fp-32], %g1 + cmp %i5, %g1 + bne .L16 + mov 0, %i0 + ld [%fp-20], %i2 + ld [%fp-28], %i1 + cmp %i2, %i1 + be,a .L16 + mov 1, %i0 +.L16: + membar #LoadLoad + ret + restore + .size pmix_atomic_cmpset_acq_64, .-pmix_atomic_cmpset_acq_64 + + + .globl pmix_atomic_cmpset_rel_64 + .type pmix_atomic_cmpset_rel_64, #function +pmix_atomic_cmpset_rel_64: + !#PROLOGUE# 0 + save %sp, -128, %sp + !#PROLOGUE# 1 + mov %i1, %o4 + mov %i2, %o5 + mov %i3, %o2 + mov %i4, %o3 + membar #StoreStore + std %o4, [%fp-32] + std %o2, [%fp-24] + ldx [%fp-24], %g1 + ldx [%fp-32], %g2 + casxa [%i0] 0x80, %g2, %g1 + stx %g1, [%fp-24] + + ld [%fp-24], %i5 + ld [%fp-32], %g1 + cmp %i5, %g1 + bne .L21 + mov 0, %i0 + ld [%fp-20], %i2 + ld [%fp-28], %i1 + cmp %i2, %i1 + be,a .L21 + mov 1, %i0 +.L21: + ret + restore + .size pmix_atomic_cmpset_rel_64, .-pmix_atomic_cmpset_rel_64 + + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, #function +pmix_sys_timer_get_cycles: + save %sp,-96,%sp + rd %tick,%o0 + srlx %o0,32,%o1 + or %g0,%o1,%i0 + ret ! Result = %i0 + restore %o0,0,%o1 + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-sparcv9-64-solaris.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-sparcv9-64-solaris.s new file mode 100644 index 00000000000..7aae1cb8ed3 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-sparcv9-64-solaris.s @@ -0,0 +1,130 @@ + .text + + .align 4 + + + .globl pmix_atomic_mb + .type pmix_atomic_mb, #function +pmix_atomic_mb: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad + retl + nop + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, #function +pmix_atomic_rmb: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #LoadLoad + retl + nop + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, #function +pmix_atomic_wmb: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + retl + nop + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, #function +pmix_atomic_cmpset_32: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_acq_32 + .type pmix_atomic_cmpset_acq_32, #function +pmix_atomic_cmpset_acq_32: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + subx %g0, -1, %o0 + membar #LoadLoad + retl + sra %o0, 0, %o0 + .size pmix_atomic_cmpset_acq_32, .-pmix_atomic_cmpset_acq_32 + + + .globl pmix_atomic_cmpset_rel_32 + .type pmix_atomic_cmpset_rel_32, #function +pmix_atomic_cmpset_rel_32: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + casa [%o0] 0x80, %o1, %o2 + xor %o2, %o1, %o2 + subcc %g0, %o2, %g0 + retl + subx %g0, -1, %o0 + .size pmix_atomic_cmpset_rel_32, .-pmix_atomic_cmpset_rel_32 + + + .globl pmix_atomic_cmpset_64 + .type pmix_atomic_cmpset_64, #function +pmix_atomic_cmpset_64: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casxa [%o0] 0x80, %o1, %o2 + mov 0, %o0 + xor %o2, %o1, %o2 + retl + movre %o2, 1, %o0 + .size pmix_atomic_cmpset_64, .-pmix_atomic_cmpset_64 + + + .globl pmix_atomic_cmpset_acq_64 + .type pmix_atomic_cmpset_acq_64, #function +pmix_atomic_cmpset_acq_64: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + casxa [%o0] 0x80, %o1, %o2 + mov 0, %o0 + xor %o2, %o1, %o2 + movre %o2, 1, %o0 + membar #LoadLoad + retl + sra %o0, 0, %o0 + .size pmix_atomic_cmpset_acq_64, .-pmix_atomic_cmpset_acq_64 + + + .globl pmix_atomic_cmpset_rel_64 + .type pmix_atomic_cmpset_rel_64, #function +pmix_atomic_cmpset_rel_64: + !#PROLOGUE# 0 + !#PROLOGUE# 1 + membar #StoreStore + casxa [%o0] 0x80, %o1, %o2 + mov 0, %o0 + xor %o2, %o1, %o2 + retl + movre %o2, 1, %o0 + .size pmix_atomic_cmpset_rel_64, .-pmix_atomic_cmpset_rel_64 + + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, #function +pmix_sys_timer_get_cycles: + save %sp,-176,%sp + rd %tick,%o0 + ret ! Result = %i0 + restore %o0,0,%o0 + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-x86_64-linux-nongas.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-x86_64-linux-nongas.s new file mode 100644 index 00000000000..85d19d9b1e2 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-x86_64-linux-nongas.s @@ -0,0 +1,63 @@ + .text + + .globl pmix_atomic_mb + .type pmix_atomic_mb, @function +pmix_atomic_mb: + pushq %rbp + movq %rsp, %rbp + leave + ret + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, @function +pmix_atomic_rmb: + pushq %rbp + movq %rsp, %rbp + leave + ret + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, @function +pmix_atomic_wmb: + pushq %rbp + movq %rsp, %rbp + leave + ret + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, @function +pmix_atomic_cmpset_32: + movl %esi, %eax + lock; cmpxchgl %edx,(%rdi) + sete %dl + movzbl %dl, %eax + ret + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_64 + .type pmix_atomic_cmpset_64, @function +pmix_atomic_cmpset_64: + movq %rsi, %rax + lock; cmpxchgq %rdx,(%rdi) + sete %dl + movzbl %dl, %eax + ret + .size pmix_atomic_cmpset_64, .-pmix_atomic_cmpset_64 + + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, @function +pmix_sys_timer_get_cycles: + rdtsc + salq $32, %rdx + mov %eax, %eax + orq %rdx, %rax + ret + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-x86_64-linux.s b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-x86_64-linux.s new file mode 100644 index 00000000000..f60867c1ab8 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/asm/generated/atomic-x86_64-linux.s @@ -0,0 +1,65 @@ + .text + + .globl pmix_atomic_mb + .type pmix_atomic_mb, @function +pmix_atomic_mb: + pushq %rbp + movq %rsp, %rbp + leave + ret + .size pmix_atomic_mb, .-pmix_atomic_mb + + + .globl pmix_atomic_rmb + .type pmix_atomic_rmb, @function +pmix_atomic_rmb: + pushq %rbp + movq %rsp, %rbp + leave + ret + .size pmix_atomic_rmb, .-pmix_atomic_rmb + + + .globl pmix_atomic_wmb + .type pmix_atomic_wmb, @function +pmix_atomic_wmb: + pushq %rbp + movq %rsp, %rbp + leave + ret + .size pmix_atomic_wmb, .-pmix_atomic_wmb + + + .globl pmix_atomic_cmpset_32 + .type pmix_atomic_cmpset_32, @function +pmix_atomic_cmpset_32: + movl %esi, %eax + lock; cmpxchgl %edx,(%rdi) + sete %dl + movzbl %dl, %eax + ret + .size pmix_atomic_cmpset_32, .-pmix_atomic_cmpset_32 + + + .globl pmix_atomic_cmpset_64 + .type pmix_atomic_cmpset_64, @function +pmix_atomic_cmpset_64: + movq %rsi, %rax + lock; cmpxchgq %rdx,(%rdi) + sete %dl + movzbl %dl, %eax + ret + .size pmix_atomic_cmpset_64, .-pmix_atomic_cmpset_64 + + + .globl pmix_sys_timer_get_cycles + .type pmix_sys_timer_get_cycles, @function +pmix_sys_timer_get_cycles: + rdtsc + salq $32, %rdx + mov %eax, %eax + orq %rdx, %rax + ret + .size pmix_sys_timer_get_cycles, .-pmix_sys_timer_get_cycles + + .section .note.GNU-stack,"",@progbits diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/Makefile.include new file mode 100644 index 00000000000..3cacbb40e5b --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/Makefile.include @@ -0,0 +1,44 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2010 Cisco Systems, Inc. All rights reserved. +# Copyright (c) 2011 Sandia National Laboratories. All rights reserved. +# Copyright (c) 2016 Los A.includeos National Security, LLC. All rights +# reserved. +# Copyright (c) 2017 Research Organization for Information Science +# and Technology (RIST). All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.include does not stand on its own - it is included from src/Makefile.am + +headers += \ + src/atomics/sys/architecture.h \ + src/atomics/sys/atomic.h \ + src/atomics/sys/atomic_impl.h \ + src/atomics/sys/timer.h \ + src/atomics/sys/cma.h + +include src/atomics/sys/x86_64/Makefile.include +include src/atomics/sys/arm/Makefile.include +include src/atomics/sys/arm64/Makefile.include +include src/atomics/sys/ia32/Makefile.include +include src/atomics/sys/ia64/Makefile.include +include src/atomics/sys/mips/Makefile.include +include src/atomics/sys/powerpc/Makefile.include +include src/atomics/sys/sparcv9/Makefile.include +include src/atomics/sys/sync_builtin/Makefile.include +include src/atomics/sys/gcc_builtin/Makefile.include diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/architecture.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/architecture.h new file mode 100644 index 00000000000..244c966a164 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/architecture.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2004-2007 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2011 Sandia National Laboratories. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. + * Copyright (c) 2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +/* + * List of supported architectures + */ + +#ifndef PMIX_SYS_ARCHITECTURE_H +#define PMIX_SYS_ARCHITECTURE_H + +/* Architectures */ +#define PMIX_UNSUPPORTED 0000 +#define PMIX_IA32 0010 +#define PMIX_IA64 0020 +#define PMIX_X86_64 0030 +#define PMIX_POWERPC32 0050 +#define PMIX_POWERPC64 0051 +#define PMIX_SPARC 0060 +#define PMIX_SPARCV9_32 0061 +#define PMIX_SPARCV9_64 0062 +#define PMIX_MIPS 0070 +#define PMIX_ARM 0100 +#define PMIX_ARM64 0101 +#define PMIX_S390 0110 +#define PMIX_S390X 0111 +#define PMIX_BUILTIN_SYNC 0200 +#define PMIX_BUILTIN_GCC 0202 +#define PMIX_BUILTIN_NO 0203 + +/* Formats */ +#define PMIX_DEFAULT 1000 /* standard for given architecture */ +#define PMIX_DARWIN 1001 /* Darwin / OS X on PowerPC */ +#define PMIX_PPC_LINUX 1002 /* Linux on PowerPC */ +#define PMIX_AIX 1003 /* AIX on Power / PowerPC */ + +#endif /* #ifndef PMIX_SYS_ARCHITECTURE_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/Makefile.include new file mode 100644 index 00000000000..dac2063c1b7 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2008 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from src/atomics/sys/include/Makefile.include + +headers += \ + src/atomics//sys/arm/atomic.h \ + src/atomics//sys/arm/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/atomic.h new file mode 100644 index 00000000000..1ee246252a9 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/atomic.h @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2010 IBM Corporation. All rights reserved. + * Copyright (c) 2010 ARM ltd. All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +/* + * ARMv5 and earlier lack robust atomic operations and therefore this file uses + * Linux kernel support where needed. The kernel also provides memory barriers + * and this file uses them for ARMv5 and earlier processors, which lack the + * memory barrier instruction. These kernel functions are available on kernel + * versions 2.6.15 and greater; using them will result in undefined behavior on + * older kernels. + * See Documentation/arm/kernel_user_helpers.txt in the kernel tree for details + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +#if (PMIX_ASM_ARM_VERSION >= 7) + +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 +/* use the DMB instruction if available... */ + +#define PMIXMB() __asm__ __volatile__ ("dmb" : : : "memory") +#define PMIXRMB() __asm__ __volatile__ ("dmb" : : : "memory") +#define PMIXWMB() __asm__ __volatile__ ("dmb" : : : "memory") + +#elif (PMIX_ASM_ARM_VERSION == 6) + +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 +/* ...or the v6-specific equivalent... */ + +#define PMIXMB() __asm__ __volatile__ ("mcr p15, 0, r0, c7, c10, 5" : : : "memory") +#define PMIXRMB() MB() +#define PMIXWMB() MB() + +#else + +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 +/* ...otherwise use the Linux kernel-provided barrier */ + +#define PMIXMB() (*((void (*)(void))(0xffff0fa0)))() +#define PMIXRMB() MB() +#define PMIXWMB() MB() + +#endif + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ + +#if (PMIX_HAVE_ATOMIC_MEM_BARRIER == 1) + +static inline +void pmix_atomic_mb(void) +{ + PMIXMB(); +} + + +static inline +void pmix_atomic_rmb(void) +{ + PMIXRMB(); +} + + +static inline +void pmix_atomic_wmb(void) +{ + PMIXWMB(); +} + +static inline +void pmix_atomic_isync(void) +{ +} + +#endif + + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ + +#if (PMIX_GCC_INLINE_ASSEMBLY && (PMIX_ASM_ARM_VERSION >= 6)) + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +#define PMIX_HAVE_ATOMIC_MATH_32 1 +static inline int pmix_atomic_cmpset_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int32_t ret, tmp; + + __asm__ __volatile__ ( + "1: ldrex %0, [%2] \n" + " cmp %0, %3 \n" + " bne 2f \n" + " strex %1, %4, [%2] \n" + " cmp %1, #0 \n" + " bne 1b \n" + "2: \n" + + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_32 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_32(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_32(addr, oldval, newval); +} + +#if (PMIX_ASM_SUPPORT_64BIT == 1) + +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 +static inline int pmix_atomic_cmpset_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + int tmp; + + + __asm__ __volatile__ ( + "1: ldrexd %0, %H0, [%2] \n" + " cmp %0, %3 \n" + " it eq \n" + " cmpeq %H0, %H3 \n" + " bne 2f \n" + " strexd %1, %4, %H4, [%2] \n" + " cmp %1, #0 \n" + " bne 1b \n" + "2: \n" + + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_64 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_64(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_64(addr, oldval, newval); +} + +#endif + + +#define PMIX_HAVE_ATOMIC_ADD_32 1 +static inline int32_t pmix_atomic_add_32(volatile int32_t* v, int inc) +{ + int32_t t; + int tmp; + + __asm__ __volatile__( + "1: ldrex %0, [%2] \n" + " add %0, %0, %3 \n" + " strex %1, %0, [%2] \n" + " cmp %1, #0 \n" + " bne 1b \n" + + : "=&r" (t), "=&r" (tmp) + : "r" (v), "r" (inc) + : "cc", "memory"); + + + return t; +} + +#define PMIX_HAVE_ATOMIC_SUB_32 1 +static inline int32_t pmix_atomic_sub_32(volatile int32_t* v, int dec) +{ + int32_t t; + int tmp; + + __asm__ __volatile__( + "1: ldrex %0, [%2] \n" + " sub %0, %0, %3 \n" + " strex %1, %0, [%2] \n" + " cmp %1, #0 \n" + " bne 1b \n" + + : "=&r" (t), "=&r" (tmp) + : "r" (v), "r" (dec) + : "cc", "memory"); + + return t; +} + +#else /* PMIX_ASM_ARM_VERSION <=5 or no GCC inline assembly */ + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +#define __kuser_cmpxchg (*((int (*)(int, int, volatile int*))(0xffff0fc0))) +static inline int pmix_atomic_cmpset_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return !(__kuser_cmpxchg(oldval, newval, addr)); +} + +static inline int pmix_atomic_cmpset_acq_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + /* kernel function includes all necessary memory barriers */ + return pmix_atomic_cmpset_32(addr, oldval, newval); +} + +static inline int pmix_atomic_cmpset_rel_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + /* kernel function includes all necessary memory barriers */ + return pmix_atomic_cmpset_32(addr, oldval, newval); +} + +#endif + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/timer.h new file mode 100644 index 00000000000..65532ac8a77 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm/timer.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2008 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + +#include + +typedef uint64_t pmix_timer_t; + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + struct tms accurate_clock; + + times(&accurate_clock); + ret = accurate_clock.tms_utime + accurate_clock.tms_stime; + + return ret; +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/Makefile.include new file mode 100644 index 00000000000..07a51796c5d --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2008 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/arm64/atomic.h \ + src/atomics/sys/arm64/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/atomic.h new file mode 100644 index 00000000000..c48c9143d36 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/atomic.h @@ -0,0 +1,302 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2010 IBM Corporation. All rights reserved. + * Copyright (c) 2010 ARM ltd. All rights reserved. + * Copyright (c) 2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#if !defined(PMIX_SYS_ARCH_ATOMIC_H) + +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +#if PMIX_GCC_INLINE_ASSEMBLY + +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 +#define PMIX_HAVE_ATOMIC_LLSC_32 1 +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +#define PMIX_HAVE_ATOMIC_SWAP_32 1 +#define PMIX_HAVE_ATOMIC_MATH_32 1 +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 +#define PMIX_HAVE_ATOMIC_SWAP_64 1 +#define PMIX_HAVE_ATOMIC_LLSC_64 1 +#define PMIX_HAVE_ATOMIC_ADD_32 1 +#define PMIX_HAVE_ATOMIC_SUB_32 1 +#define PMIX_HAVE_ATOMIC_ADD_64 1 +#define PMIX_HAVE_ATOMIC_SUB_64 1 + +#define PMIXMB() __asm__ __volatile__ ("dmb sy" : : : "memory") +#define PMIXRMB() __asm__ __volatile__ ("dmb ld" : : : "memory") +#define PMIXWMB() __asm__ __volatile__ ("dmb st" : : : "memory") + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ + +static inline void pmix_atomic_mb (void) +{ + PMIXMB(); +} + +static inline void pmix_atomic_rmb (void) +{ + PMIXRMB(); +} + +static inline void pmix_atomic_wmb (void) +{ + PMIXWMB(); +} + +static inline void pmix_atomic_isync (void) +{ + __asm__ __volatile__ ("isb"); +} + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ + +static inline int pmix_atomic_cmpset_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int32_t ret, tmp; + + __asm__ __volatile__ ("1: ldaxr %w0, [%2] \n" + " cmp %w0, %w3 \n" + " bne 2f \n" + " stxr %w1, %w4, [%2] \n" + " cbnz %w1, 1b \n" + "2: \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + +static inline int32_t pmix_atomic_swap_32(volatile int32_t *addr, int32_t newval) +{ + int32_t ret, tmp; + + __asm__ __volatile__ ("1: ldaxr %w0, [%2] \n" + " stlxr %w1, %w3, [%2] \n" + " cbnz %w1, 1b \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (newval) + : "cc", "memory"); + + return ret; +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_32 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int32_t ret, tmp; + + __asm__ __volatile__ ("1: ldaxr %w0, [%2] \n" + " cmp %w0, %w3 \n" + " bne 2f \n" + " stxr %w1, %w4, [%2] \n" + " cbnz %w1, 1b \n" + "2: \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + + +static inline int pmix_atomic_cmpset_rel_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int32_t ret, tmp; + + __asm__ __volatile__ ("1: ldxr %w0, [%2] \n" + " cmp %w0, %w3 \n" + " bne 2f \n" + " stlxr %w1, %w4, [%2] \n" + " cbnz %w1, 1b \n" + "2: \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + +static inline int32_t pmix_atomic_ll_32 (volatile int32_t *addr) +{ + int32_t ret; + + __asm__ __volatile__ ("ldaxr %w0, [%1] \n" + : "=&r" (ret) + : "r" (addr)); + + return ret; +} + +static inline int pmix_atomic_sc_32 (volatile int32_t *addr, int32_t newval) +{ + int ret; + + __asm__ __volatile__ ("stlxr %w0, %w2, [%1] \n" + : "=&r" (ret) + : "r" (addr), "r" (newval) + : "cc", "memory"); + + return ret == 0; +} + +static inline int pmix_atomic_cmpset_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + int tmp; + + __asm__ __volatile__ ("1: ldaxr %0, [%2] \n" + " cmp %0, %3 \n" + " bne 2f \n" + " stxr %w1, %4, [%2] \n" + " cbnz %w1, 1b \n" + "2: \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + +static inline int64_t pmix_atomic_swap_64 (volatile int64_t *addr, int64_t newval) +{ + int64_t ret; + int tmp; + + __asm__ __volatile__ ("1: ldaxr %0, [%2] \n" + " stlxr %w1, %3, [%2] \n" + " cbnz %w1, 1b \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (newval) + : "cc", "memory"); + + return ret; +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_64 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + int tmp; + + __asm__ __volatile__ ("1: ldaxr %0, [%2] \n" + " cmp %0, %3 \n" + " bne 2f \n" + " stxr %w1, %4, [%2] \n" + " cbnz %w1, 1b \n" + "2: \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + + +static inline int pmix_atomic_cmpset_rel_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + int tmp; + + __asm__ __volatile__ ("1: ldxr %0, [%2] \n" + " cmp %0, %3 \n" + " bne 2f \n" + " stlxr %w1, %4, [%2] \n" + " cbnz %w1, 1b \n" + "2: \n" + : "=&r" (ret), "=&r" (tmp) + : "r" (addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + +static inline int64_t pmix_atomic_ll_64 (volatile int64_t *addr) +{ + int64_t ret; + + __asm__ __volatile__ ("ldaxr %0, [%1] \n" + : "=&r" (ret) + : "r" (addr)); + + return ret; +} + +static inline int pmix_atomic_sc_64 (volatile int64_t *addr, int64_t newval) +{ + int ret; + + __asm__ __volatile__ ("stlxr %w0, %2, [%1] \n" + : "=&r" (ret) + : "r" (addr), "r" (newval) + : "cc", "memory"); + + return ret == 0; +} + +#define PMIX_ASM_MAKE_ATOMIC(type, bits, name, inst, reg) \ + static inline type pmix_atomic_ ## name ## _ ## bits (volatile type *addr, type value) \ + { \ + type newval; \ + int32_t tmp; \ + \ + __asm__ __volatile__("1: ldxr %" reg "0, [%2] \n" \ + " " inst " %" reg "0, %" reg "0, %" reg "3 \n" \ + " stxr %w1, %" reg "0, [%2] \n" \ + " cbnz %w1, 1b \n" \ + : "=&r" (newval), "=&r" (tmp) \ + : "r" (addr), "r" (value) \ + : "cc", "memory"); \ + \ + return newval; \ + } + +PMIX_ASM_MAKE_ATOMIC(int32_t, 32, add, "add", "w") +PMIX_ASM_MAKE_ATOMIC(int32_t, 32, sub, "sub", "w") +PMIX_ASM_MAKE_ATOMIC(int64_t, 64, add, "add", "") +PMIX_ASM_MAKE_ATOMIC(int64_t, 64, sub, "sub", "") + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/timer.h new file mode 100644 index 00000000000..bacc4b919eb --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/arm64/timer.h @@ -0,0 +1,46 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2008 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2016 Broadcom Limited. All rights reserved. + * Copyright (c) 2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + +#include + +typedef uint64_t pmix_timer_t; + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + + __asm__ __volatile__ ("isb" ::: "memory"); + __asm__ __volatile__ ("mrs %0, CNTVCT_EL0" : "=r" (ret)); + + return ret; +} + + +static inline pmix_timer_t +pmix_sys_timer_freq(void) +{ + pmix_timer_t freq; + __asm__ __volatile__ ("mrs %0, CNTFRQ_EL0" : "=r" (freq)); + return (pmix_timer_t)(freq); +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/atomic.h new file mode 100644 index 00000000000..32e9f762983 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/atomic.h @@ -0,0 +1,623 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2006 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright (c) 2011 Sandia National Laboratories. All rights reserved. + * Copyright (c) 2011-2015 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +/** @file + * + * Atomic operations. + * + * This API is patterned after the FreeBSD kernel atomic interface + * (which is influenced by Intel's ia64 architecture). The + * FreeBSD interface is documented at + * + * http://www.freebsd.org/cgi/man.cgi?query=atomic&sektion=9 + * + * Only the necessary subset of functions are implemented here. + * + * The following #defines will be true / false based on + * assembly support: + * + * - \c PMIX_HAVE_ATOMIC_MEM_BARRIER atomic memory barriers + * - \c PMIX_HAVE_ATOMIC_SPINLOCKS atomic spinlocks + * - \c PMIX_HAVE_ATOMIC_MATH_32 if 32 bit add/sub/cmpset can be done "atomicly" + * - \c PMIX_HAVE_ATOMIC_MATH_64 if 64 bit add/sub/cmpset can be done "atomicly" + * + * Note that for the Atomic math, atomic add/sub may be implemented as + * C code using pmix_atomic_cmpset. The appearance of atomic + * operation will be upheld in these cases. + */ + +#ifndef PMIX_SYS_ATOMIC_H +#define PMIX_SYS_ATOMIC_H 1 + +#include "src/include/pmix_config.h" + +#include "src/atomics/sys/architecture.h" +#include "include/pmix/autogen/pmix_stdint.h" + +/* do some quick #define cleanup in cases where we are doing + testing... */ +#ifdef PMIX_DISABLE_INLINE_ASM +#undef PMIX_C_GCC_INLINE_ASSEMBLY +#define PMIX_C_GCC_INLINE_ASSEMBLY 0 +#undef PMIX_C_DEC_INLINE_ASSEMBLY +#define PMIX_C_DEC_INLINE_ASSEMBLY 0 +#undef PMIX_C_XLC_INLINE_ASSEMBLY +#define PMIX_C_XLC_INLINE_ASSEMBLY 0 +#endif + +/* define PMIX_{GCC,DEC,XLC}_INLINE_ASSEMBLY based on the + PMIX_C_{GCC,DEC,XLC}_INLINE_ASSEMBLY defines and whether we + are in C or C++ */ +#if defined(c_plusplus) || defined(__cplusplus) +/* We no longer support inline assembly for C++ as PMIX is a C-only interface */ +#define PMIX_GCC_INLINE_ASSEMBLY 0 +#define PMIX_DEC_INLINE_ASSEMBLY 0 +#define PMIX_XLC_INLINE_ASSEMBLY 0 +#else +#define PMIX_GCC_INLINE_ASSEMBLY PMIX_C_GCC_INLINE_ASSEMBLY +#define PMIX_DEC_INLINE_ASSEMBLY PMIX_C_DEC_INLINE_ASSEMBLY +#define PMIX_XLC_INLINE_ASSEMBLY PMIX_C_XLC_INLINE_ASSEMBLY +#endif + + +BEGIN_C_DECLS +/********************************************************************** + * + * Data structures for atomic ops + * + *********************************************************************/ +/** + * Volatile lock object (with optional padding). + * + * \note The internals of the lock are included here, but should be + * considered private. The implementation currently in use may choose + * to use an int or unsigned char as the lock value - the user is not + * informed either way. + */ +struct pmix_atomic_lock_t { + union { + volatile int32_t lock; /**< The lock address (an integer) */ + volatile unsigned char sparc_lock; /**< The lock address on sparc */ + char padding[sizeof(int)]; /**< Array for optional padding */ + } u; +}; +typedef struct pmix_atomic_lock_t pmix_atomic_lock_t; + +/********************************************************************** + * + * Set or unset these macros in the architecture-specific atomic.h + * files if we need to specify them as inline or non-inline + * + *********************************************************************/ +#if !PMIX_GCC_INLINE_ASSEMBLY +#define PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER 0 +#define PMIX_HAVE_INLINE_ATOMIC_CMPSET_32 0 +#define PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 0 +#define PMIX_HAVE_INLINE_ATOMIC_ADD_32 0 +#define PMIX_HAVE_INLINE_ATOMIC_SUB_32 0 +#define PMIX_HAVE_INLINE_ATOMIC_ADD_64 0 +#define PMIX_HAVE_INLINE_ATOMIC_SUB_64 0 +#define PMIX_HAVE_INLINE_ATOMIC_SWAP_32 0 +#define PMIX_HAVE_INLINE_ATOMIC_SWAP_64 0 +#else +#define PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER 1 +#define PMIX_HAVE_INLINE_ATOMIC_CMPSET_32 1 +#define PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 1 +#define PMIX_HAVE_INLINE_ATOMIC_ADD_32 1 +#define PMIX_HAVE_INLINE_ATOMIC_SUB_32 1 +#define PMIX_HAVE_INLINE_ATOMIC_ADD_64 1 +#define PMIX_HAVE_INLINE_ATOMIC_SUB_64 1 +#define PMIX_HAVE_INLINE_ATOMIC_SWAP_32 1 +#define PMIX_HAVE_INLINE_ATOMIC_SWAP_64 1 +#endif + +/** + * Enumeration of lock states + */ +enum { + PMIX_ATOMIC_UNLOCKED = 0, + PMIX_ATOMIC_LOCKED = 1 +}; + +/********************************************************************** + * + * Load the appropriate architecture files and set some reasonable + * default values for our support + * + *********************************************************************/ +#if defined(DOXYGEN) +/* don't include system-level gorp when generating doxygen files */ +#elif PMIX_ASSEMBLY_BUILTIN == PMIX_BUILTIN_SYNC +#include "src/atomics/sys/sync_builtin/atomic.h" +#elif PMIX_ASSEMBLY_BUILTIN == PMIX_BUILTIN_GCC +#include "src/atomics/sys/gcc_builtin/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_X86_64 +#include "src/atomics/sys/x86_64/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_ARM +#include "src/atomics/sys/arm/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_ARM64 +#include "src/atomics/sys/arm64/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_IA32 +#include "src/atomics/sys/ia32/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_IA64 +#include "src/atomics/sys/ia64/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_MIPS +#include "src/atomics/sys/mips/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_POWERPC32 +#include "src/atomics/sys/powerpc/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_POWERPC64 +#include "src/atomics/sys/powerpc/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_SPARC +#include "src/atomics/sys/sparc/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_32 +#include "src/atomics/sys/sparcv9/atomic.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_64 +#include "src/atomics/sys/sparcv9/atomic.h" +#endif + +#ifndef DOXYGEN +/* compare and set operations can't really be emulated from software, + so if these defines aren't already set, they should be set to 0 + now */ +#ifndef PMIX_HAVE_ATOMIC_CMPSET_32 +#define PMIX_HAVE_ATOMIC_CMPSET_32 0 +#endif +#ifndef PMIX_HAVE_ATOMIC_CMPSET_64 +#define PMIX_HAVE_ATOMIC_CMPSET_64 0 +#endif +#ifndef PMIX_HAVE_ATOMIC_CMPSET_128 +#define PMIX_HAVE_ATOMIC_CMPSET_128 0 +#endif +#ifndef PMIX_HAVE_ATOMIC_LLSC_32 +#define PMIX_HAVE_ATOMIC_LLSC_32 0 +#endif +#ifndef PMIX_HAVE_ATOMIC_LLSC_64 +#define PMIX_HAVE_ATOMIC_LLSC_64 0 +#endif +#endif /* DOXYGEN */ + +/********************************************************************** + * + * Memory Barriers - defined here if running doxygen or have barriers + * but can't inline + * + *********************************************************************/ +#if !defined(PMIX_HAVE_ATOMIC_MEM_BARRIER) && !defined(DOXYGEN) +/* no way to emulate in C code */ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 0 +#endif + +#if defined(DOXYGEN) || PMIX_HAVE_ATOMIC_MEM_BARRIER +/** + * Memory barrier + * + * Will use system-specific features to instruct the processor and + * memory controller that all writes and reads that have been posted + * before the call to \c pmix_atomic_mb() must appear to have + * completed before the next read or write. + * + * \note This can have some expensive side effects, including flushing + * the pipeline, preventing the cpu from reordering instructions, and + * generally grinding the memory controller's performance. Use only + * if you need *both* read and write barriers. + */ + +#if PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER +static inline +#endif +void pmix_atomic_mb(void); + +/** + * Read memory barrier + * + * Use system-specific features to instruct the processor and memory + * conrtoller that all reads that have been posted before the call to + * \c pmix_atomic_rmb() must appear to have been completed before the + * next read. Nothing is said about the ordering of writes when using + * \c pmix_atomic_rmb(). + */ + +#if PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER +static inline +#endif +void pmix_atomic_rmb(void); + +/** + * Write memory barrier. + * + * Use system-specific features to instruct the processor and memory + * conrtoller that all writes that have been posted before the call to + * \c pmix_atomic_wmb() must appear to have been completed before the + * next write. Nothing is said about the ordering of reads when using + * \c pmix_atomic_wmb(). + */ + +#if PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER +static inline +#endif +void pmix_atomic_wmb(void); + +#endif /* defined(DOXYGEN) || PMIX_HAVE_ATOMIC_MEM_BARRIER */ + + +/********************************************************************** + * + * Atomic spinlocks - always inlined, if have atomic cmpset + * + *********************************************************************/ + +#if !defined(PMIX_HAVE_ATOMIC_SPINLOCKS) && !defined(DOXYGEN) +/* 0 is more like "pending" - we'll fix up at the end after all + the static inline functions are declared */ +#define PMIX_HAVE_ATOMIC_SPINLOCKS 0 +#endif + +#if defined(DOXYGEN) || PMIX_HAVE_ATOMIC_SPINLOCKS || (PMIX_HAVE_ATOMIC_CMPSET_32 || PMIX_HAVE_ATOMIC_CMPSET_64) + +/** + * Initialize a lock to value + * + * @param lock Address of the lock + * @param value Initial value to set lock to + */ +#if PMIX_HAVE_ATOMIC_SPINLOCKS == 0 +static inline +#endif +void pmix_atomic_init(pmix_atomic_lock_t* lock, int32_t value); + + +/** + * Try to acquire a lock. + * + * @param lock Address of the lock. + * @return 0 if the lock was acquired, 1 otherwise. + */ +#if PMIX_HAVE_ATOMIC_SPINLOCKS == 0 +static inline +#endif +int pmix_atomic_trylock(pmix_atomic_lock_t *lock); + + +/** + * Acquire a lock by spinning. + * + * @param lock Address of the lock. + */ +#if PMIX_HAVE_ATOMIC_SPINLOCKS == 0 +static inline +#endif +void pmix_atomic_lock(pmix_atomic_lock_t *lock); + + +/** + * Release a lock. + * + * @param lock Address of the lock. + */ +#if PMIX_HAVE_ATOMIC_SPINLOCKS == 0 +static inline +#endif +void pmix_atomic_unlock(pmix_atomic_lock_t *lock); + + +#if PMIX_HAVE_ATOMIC_SPINLOCKS == 0 +#undef PMIX_HAVE_ATOMIC_SPINLOCKS +#define PMIX_HAVE_ATOMIC_SPINLOCKS (PMIX_HAVE_ATOMIC_CMPSET_32 || PMIX_HAVE_ATOMIC_CMPSET_64) +#define PMIX_NEED_INLINE_ATOMIC_SPINLOCKS 1 +#endif + +#endif /* PMIX_HAVE_ATOMIC_SPINLOCKS */ + + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if !defined(PMIX_HAVE_ATOMIC_CMPSET_32) && !defined(DOXYGEN) +#define PMIX_HAVE_ATOMIC_CMPSET_32 0 +#endif +#if defined(DOXYGEN) || PMIX_HAVE_ATOMIC_CMPSET_32 + +#if PMIX_HAVE_INLINE_ATOMIC_CMPSET_32 +static inline +#endif +int pmix_atomic_cmpset_32(volatile int32_t *addr, int32_t oldval, + int32_t newval); + +#if PMIX_HAVE_INLINE_ATOMIC_CMPSET_32 +static inline +#endif +int pmix_atomic_cmpset_acq_32(volatile int32_t *addr, int32_t oldval, + int32_t newval); + +#if PMIX_HAVE_INLINE_ATOMIC_CMPSET_32 +static inline +#endif +int pmix_atomic_cmpset_rel_32(volatile int32_t *addr, int32_t oldval, + int32_t newval); +#endif + + +#if !defined(PMIX_HAVE_ATOMIC_CMPSET_64) && !defined(DOXYGEN) +#define PMIX_HAVE_ATOMIC_CMPSET_64 0 +#endif +#if defined(DOXYGEN) || PMIX_HAVE_ATOMIC_CMPSET_64 + +#if PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 +static inline +#endif +int pmix_atomic_cmpset_64(volatile int64_t *addr, int64_t oldval, + int64_t newval); + +#if PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 +static inline +#endif +int pmix_atomic_cmpset_acq_64(volatile int64_t *addr, int64_t oldval, + int64_t newval); + +#if PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 +static inline +#endif +int pmix_atomic_cmpset_rel_64(volatile int64_t *addr, int64_t oldval, + int64_t newval); + +#endif + +#if !defined(PMIX_HAVE_ATOMIC_MATH_32) && !defined(DOXYGEN) + /* define to 0 for these tests. WIll fix up later. */ + #define PMIX_HAVE_ATOMIC_MATH_32 0 +#endif + +#if defined(DOXYGEN) || PMIX_HAVE_ATOMIC_MATH_32 || PMIX_HAVE_ATOMIC_CMPSET_32 + +/* PMIX_HAVE_INLINE_ATOMIC_*_32 will be 1 if /atomic.h provides + a static inline version of it (in assembly). If we have to fall + back on cmpset 32, that too will be inline. */ +#if PMIX_HAVE_INLINE_ATOMIC_ADD_32 || (!defined(PMIX_HAVE_ATOMIC_ADD_32) && PMIX_HAVE_ATOMIC_CMPSET_32) +static inline +#endif +int32_t pmix_atomic_add_32(volatile int32_t *addr, int delta); + +/* PMIX_HAVE_INLINE_ATOMIC_*_32 will be 1 if /atomic.h provides + a static inline version of it (in assembly). If we have to fall + back to cmpset 32, that too will be inline. */ +#if PMIX_HAVE_INLINE_ATOMIC_SUB_32 || (!defined(PMIX_HAVE_ATOMIC_ADD_32) && PMIX_HAVE_ATOMIC_CMPSET_32) +static inline +#endif +int32_t pmix_atomic_sub_32(volatile int32_t *addr, int delta); + +#endif /* PMIX_HAVE_ATOMIC_MATH_32 */ + +#if ! PMIX_HAVE_ATOMIC_MATH_32 +/* fix up the value of pmix_have_atomic_math_32 to allow for C versions */ +#undef PMIX_HAVE_ATOMIC_MATH_32 +#define PMIX_HAVE_ATOMIC_MATH_32 PMIX_HAVE_ATOMIC_CMPSET_32 +#endif + +#ifndef PMIX_HAVE_ATOMIC_MATH_64 +/* define to 0 for these tests. WIll fix up later. */ +#define PMIX_HAVE_ATOMIC_MATH_64 0 +#endif + +#if defined(DOXYGEN) || PMIX_HAVE_ATOMIC_MATH_64 || PMIX_HAVE_ATOMIC_CMPSET_64 + +/* PMIX_HAVE_INLINE_ATOMIC_*_64 will be 1 if /atomic.h provides + a static inline version of it (in assembly). If we have to fall + back to cmpset 64, that too will be inline */ +#if PMIX_HAVE_INLINE_ATOMIC_ADD_64 || (!defined(PMIX_HAVE_ATOMIC_ADD_64) && PMIX_HAVE_ATOMIC_CMPSET_64) +static inline +#endif +int64_t pmix_atomic_add_64(volatile int64_t *addr, int64_t delta); + +/* PMIX_HAVE_INLINE_ATOMIC_*_64 will be 1 if /atomic.h provides + a static inline version of it (in assembly). If we have to fall + back to cmpset 64, that too will be inline */ +#if PMIX_HAVE_INLINE_ATOMIC_SUB_64 || (!defined(PMIX_HAVE_ATOMIC_ADD_64) && PMIX_HAVE_ATOMIC_CMPSET_64) +static inline +#endif +int64_t pmix_atomic_sub_64(volatile int64_t *addr, int64_t delta); + +#endif /* PMIX_HAVE_ATOMIC_MATH_32 */ + +#if ! PMIX_HAVE_ATOMIC_MATH_64 +/* fix up the value of pmix_have_atomic_math_64 to allow for C versions */ +#undef PMIX_HAVE_ATOMIC_MATH_64 +#define PMIX_HAVE_ATOMIC_MATH_64 PMIX_HAVE_ATOMIC_CMPSET_64 +#endif + +/* provide a size_t add/subtract. When in debug mode, make it an + * inline function so that we don't have any casts in the + * interface and can catch type errors. When not in debug mode, + * just make it a macro, so that there's no performance penalty + */ +#if defined(DOXYGEN) || PMIX_ENABLE_DEBUG +static inline size_t +pmix_atomic_add_size_t(volatile size_t *addr, int delta) +{ +#if SIZEOF_SIZE_T == 4 + return (size_t) pmix_atomic_add_32((int32_t*) addr, delta); +#elif SIZEOF_SIZE_T == 8 + return (size_t) pmix_atomic_add_64((int64_t*) addr, delta); +#else +#error "Unknown size_t size" +#endif +} +static inline size_t +pmix_atomic_sub_size_t(volatile size_t *addr, int delta) +{ +#if SIZEOF_SIZE_T == 4 + return (size_t) pmix_atomic_sub_32((int32_t*) addr, delta); +#elif SIZEOF_SIZE_T == 8 + return (size_t) pmix_atomic_sub_64((int64_t*) addr, delta); +#else +#error "Unknown size_t size" +#endif +} +#else +#if SIZEOF_SIZE_T == 4 +#define pmix_atomic_add_size_t(addr, delta) ((size_t) pmix_atomic_add_32((int32_t*) addr, delta)) +#define pmix_atomic_sub_size_t(addr, delta) ((size_t) pmix_atomic_sub_32((int32_t*) addr, delta)) +#elif SIZEOF_SIZE_T ==8 +#define pmix_atomic_add_size_t(addr, delta) ((size_t) pmix_atomic_add_64((int64_t*) addr, delta)) +#define pmix_atomic_sub_size_t(addr, delta) ((size_t) pmix_atomic_sub_64((int64_t*) addr, delta)) +#else +#error "Unknown size_t size" +#endif +#endif + +#if defined(DOXYGEN) || (PMIX_HAVE_ATOMIC_CMPSET_32 || PMIX_HAVE_ATOMIC_CMPSET_64) +/* these are always done with inline functions, so always mark as + static inline */ +static inline int pmix_atomic_cmpset_xx(volatile void* addr, int64_t oldval, + int64_t newval, size_t length); +static inline int pmix_atomic_cmpset_acq_xx(volatile void* addr, + int64_t oldval, int64_t newval, + size_t length); +static inline int pmix_atomic_cmpset_rel_xx(volatile void* addr, + int64_t oldval, int64_t newval, + size_t length); + +static inline int pmix_atomic_cmpset_ptr(volatile void* addr, + void* oldval, + void* newval); +static inline int pmix_atomic_cmpset_acq_ptr(volatile void* addr, + void* oldval, + void* newval); +static inline int pmix_atomic_cmpset_rel_ptr(volatile void* addr, + void* oldval, + void* newval); + +/** + * Atomic compare and set of pointer with relaxed semantics. This + * macro detect at compile time the type of the first argument and + * choose the correct function to be called. + * + * \note This macro should only be used for integer types. + * + * @param addr Address of . + * @param oldval Comparison value . + * @param newval New value to set if comparision is true . + * + * See pmix_atomic_cmpset_* for pseudo-code. + */ +#define pmix_atomic_cmpset( ADDR, OLDVAL, NEWVAL ) \ + pmix_atomic_cmpset_xx( (volatile void*)(ADDR), (intptr_t)(OLDVAL), \ + (intptr_t)(NEWVAL), sizeof(*(ADDR)) ) + +/** + * Atomic compare and set of pointer with acquire semantics. This + * macro detect at compile time the type of the first argument + * and choose the correct function to be called. + * + * \note This macro should only be used for integer types. + * + * @param addr Address of . + * @param oldval Comparison value . + * @param newval New value to set if comparision is true . + * + * See pmix_atomic_cmpset_acq_* for pseudo-code. + */ +#define pmix_atomic_cmpset_acq( ADDR, OLDVAL, NEWVAL ) \ + pmix_atomic_cmpset_acq_xx( (volatile void*)(ADDR), (int64_t)(OLDVAL), \ + (int64_t)(NEWVAL), sizeof(*(ADDR)) ) + + +/** + * Atomic compare and set of pointer with release semantics. This + * macro detect at compile time the type of the first argument + * and choose the correct function to b + * + * \note This macro should only be used for integer types. + * + * @param addr Address of . + * @param oldval Comparison value . + * @param newval New value to set if comparision is true . + * + * See pmix_atomic_cmpsetrel_* for pseudo-code. + */ +#define pmix_atomic_cmpset_rel( ADDR, OLDVAL, NEWVAL ) \ + pmix_atomic_cmpset_rel_xx( (volatile void*)(ADDR), (int64_t)(OLDVAL), \ + (int64_t)(NEWVAL), sizeof(*(ADDR)) ) + +#endif /* (PMIX_HAVE_ATOMIC_CMPSET_32 || PMIX_HAVE_ATOMIC_CMPSET_64) */ + +#if defined(DOXYGEN) || (PMIX_HAVE_ATOMIC_MATH_32 || PMIX_HAVE_ATOMIC_MATH_64) + +static inline void pmix_atomic_add_xx(volatile void* addr, + int32_t value, size_t length); +static inline void pmix_atomic_sub_xx(volatile void* addr, + int32_t value, size_t length); +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_CMPSET_32 +static inline int32_t pmix_atomic_add_ptr( volatile void* addr, void* delta ); +static inline int32_t pmix_atomic_sub_ptr( volatile void* addr, void* delta ); +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_CMPSET_64 +static inline int64_t pmix_atomic_add_ptr( volatile void* addr, void* delta ); +static inline int64_t pmix_atomic_sub_ptr( volatile void* addr, void* delta ); +#else +#error Atomic arithmetic on pointers not supported +#endif + +/** + * Atomically increment the content depending on the type. This + * macro detect at compile time the type of the first argument + * and choose the correct function to be called. + * + * \note This macro should only be used for integer types. + * + * @param addr Address of + * @param delta Value to add (converted to ). + */ +#define pmix_atomic_add( ADDR, VALUE ) \ + pmix_atomic_add_xx( (volatile void*)(ADDR), (int32_t)(VALUE), \ + sizeof(*(ADDR)) ) + +/** + * Atomically decrement the content depending on the type. This + * macro detect at compile time the type of the first argument + * and choose the correct function to be called. + * + * \note This macro should only be used for integer types. + * + * @param addr Address of + * @param delta Value to substract (converted to ). + */ +#define pmix_atomic_sub( ADDR, VALUE ) \ + pmix_atomic_sub_xx( (volatile void*)(ADDR), (int32_t)(VALUE), \ + sizeof(*(ADDR)) ) + +#endif /* PMIX_HAVE_ATOMIC_MATH_32 || PMIX_HAVE_ATOMIC_MATH_64 */ + + +/* + * Include inline implementations of everything not defined directly + * in assembly + */ +#include "src/atomics/sys/atomic_impl.h" + +END_C_DECLS + +#endif /* PMIX_SYS_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/atomic_impl.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/atomic_impl.h new file mode 100644 index 00000000000..62213e3a508 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/atomic_impl.h @@ -0,0 +1,439 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2014 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2010-2014 Cisco Systems, Inc. All rights reserved. + * Copyright (c) 2012-2015 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +/* Inline C implementation of the functions defined in atomic.h */ + +#include + +/********************************************************************** + * + * Atomic math operations + * + * All the architectures provide a compare_and_set atomic operations. If + * they dont provide atomic additions and/or substractions then we can + * define these operations using the atomic compare_and_set. + * + * Some architectures do not provide support for the 64 bits + * atomic operations. Until we find a better solution let's just + * undefine all those functions if there is no 64 bit cmpset + * + *********************************************************************/ +#if PMIX_HAVE_ATOMIC_CMPSET_32 + +#if !defined(PMIX_HAVE_ATOMIC_SWAP_32) +#define PMIX_HAVE_ATOMIC_SWAP_32 1 +static inline int32_t pmix_atomic_swap_32(volatile int32_t *addr, + int32_t newval) +{ + int32_t old; + do { + old = *addr; + } while (0 == pmix_atomic_cmpset_32(addr, old, newval)); + + return old; +} +#endif /* PMIX_HAVE_ATOMIC_SWAP_32 */ + +#if !defined(PMIX_HAVE_ATOMIC_ADD_32) +#define PMIX_HAVE_ATOMIC_ADD_32 1 +static inline int32_t +pmix_atomic_add_32(volatile int32_t *addr, int delta) +{ + int32_t oldval; + + do { + oldval = *addr; + } while (0 == pmix_atomic_cmpset_32(addr, oldval, oldval + delta)); + return (oldval + delta); +} +#endif /* PMIX_HAVE_ATOMIC_ADD_32 */ + + +#if !defined(PMIX_HAVE_ATOMIC_SUB_32) +#define PMIX_HAVE_ATOMIC_SUB_32 1 +static inline int32_t +pmix_atomic_sub_32(volatile int32_t *addr, int delta) +{ + int32_t oldval; + + do { + oldval = *addr; + } while (0 == pmix_atomic_cmpset_32(addr, oldval, oldval - delta)); + return (oldval - delta); +} +#endif /* PMIX_HAVE_ATOMIC_SUB_32 */ + +#endif /* PMIX_HAVE_ATOMIC_CMPSET_32 */ + + +#if PMIX_HAVE_ATOMIC_CMPSET_64 + +#if !defined(PMIX_HAVE_ATOMIC_SWAP_64) +#define PMIX_HAVE_ATOMIC_SWAP_64 1 +static inline int64_t pmix_atomic_swap_64(volatile int64_t *addr, + int64_t newval) +{ + int64_t old; + do { + old = *addr; + } while (0 == pmix_atomic_cmpset_64(addr, old, newval)); + return old; +} +#endif /* PMIX_HAVE_ATOMIC_SWAP_32 */ + +#if !defined(PMIX_HAVE_ATOMIC_ADD_64) +#define PMIX_HAVE_ATOMIC_ADD_64 1 +static inline int64_t +pmix_atomic_add_64(volatile int64_t *addr, int64_t delta) +{ + int64_t oldval; + + do { + oldval = *addr; + } while (0 == pmix_atomic_cmpset_64(addr, oldval, oldval + delta)); + return (oldval + delta); +} +#endif /* PMIX_HAVE_ATOMIC_ADD_64 */ + + +#if !defined(PMIX_HAVE_ATOMIC_SUB_64) +#define PMIX_HAVE_ATOMIC_SUB_64 1 +static inline int64_t +pmix_atomic_sub_64(volatile int64_t *addr, int64_t delta) +{ + int64_t oldval; + + do { + oldval = *addr; + } while (0 == pmix_atomic_cmpset_64(addr, oldval, oldval - delta)); + return (oldval - delta); +} +#endif /* PMIX_HAVE_ATOMIC_SUB_64 */ + +#else + +#if !defined(PMIX_HAVE_ATOMIC_ADD_64) +#define PMIX_HAVE_ATOMIC_ADD_64 0 +#endif + +#if !defined(PMIX_HAVE_ATOMIC_SUB_64) +#define PMIX_HAVE_ATOMIC_SUB_64 0 +#endif + +#endif /* PMIX_HAVE_ATOMIC_CMPSET_64 */ + + +#if (PMIX_HAVE_ATOMIC_CMPSET_32 || PMIX_HAVE_ATOMIC_CMPSET_64) + +static inline int +pmix_atomic_cmpset_xx(volatile void* addr, int64_t oldval, + int64_t newval, size_t length) +{ + switch( length ) { +#if PMIX_HAVE_ATOMIC_CMPSET_32 + case 4: + return pmix_atomic_cmpset_32( (volatile int32_t*)addr, + (int32_t)oldval, (int32_t)newval ); +#endif /* PMIX_HAVE_ATOMIC_CMPSET_32 */ + +#if PMIX_HAVE_ATOMIC_CMPSET_64 + case 8: + return pmix_atomic_cmpset_64( (volatile int64_t*)addr, + (int64_t)oldval, (int64_t)newval ); +#endif /* PMIX_HAVE_ATOMIC_CMPSET_64 */ + } + abort(); + /* This should never happen, so deliberately abort (hopefully + leaving a corefile for analysis) */ +} + + +static inline int +pmix_atomic_cmpset_acq_xx(volatile void* addr, int64_t oldval, + int64_t newval, size_t length) +{ + switch( length ) { +#if PMIX_HAVE_ATOMIC_CMPSET_32 + case 4: + return pmix_atomic_cmpset_acq_32( (volatile int32_t*)addr, + (int32_t)oldval, (int32_t)newval ); +#endif /* PMIX_HAVE_ATOMIC_CMPSET_32 */ + +#if PMIX_HAVE_ATOMIC_CMPSET_64 + case 8: + return pmix_atomic_cmpset_acq_64( (volatile int64_t*)addr, + (int64_t)oldval, (int64_t)newval ); +#endif /* PMIX_HAVE_ATOMIC_CMPSET_64 */ + } + /* This should never happen, so deliberately abort (hopefully + leaving a corefile for analysis) */ + abort(); +} + + +static inline int +pmix_atomic_cmpset_rel_xx(volatile void* addr, int64_t oldval, + int64_t newval, size_t length) +{ + switch( length ) { +#if PMIX_HAVE_ATOMIC_CMPSET_32 + case 4: + return pmix_atomic_cmpset_rel_32( (volatile int32_t*)addr, + (int32_t)oldval, (int32_t)newval ); +#endif /* PMIX_HAVE_ATOMIC_CMPSET_32 */ + +#if PMIX_HAVE_ATOMIC_CMPSET_64 + case 8: + return pmix_atomic_cmpset_rel_64( (volatile int64_t*)addr, + (int64_t)oldval, (int64_t)newval ); +#endif /* PMIX_HAVE_ATOMIC_CMPSET_64 */ + } + /* This should never happen, so deliberately abort (hopefully + leaving a corefile for analysis) */ + abort(); +} + + +static inline int +pmix_atomic_cmpset_ptr(volatile void* addr, + void* oldval, + void* newval) +{ +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_CMPSET_32 + return pmix_atomic_cmpset_32((int32_t*) addr, (unsigned long) oldval, + (unsigned long) newval); +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_CMPSET_64 + return pmix_atomic_cmpset_64((int64_t*) addr, (unsigned long) oldval, + (unsigned long) newval); +#else + abort(); +#endif +} + + +static inline int +pmix_atomic_cmpset_acq_ptr(volatile void* addr, + void* oldval, + void* newval) +{ +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_CMPSET_32 + return pmix_atomic_cmpset_acq_32((int32_t*) addr, (unsigned long) oldval, + (unsigned long) newval); +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_CMPSET_64 + return pmix_atomic_cmpset_acq_64((int64_t*) addr, (unsigned long) oldval, + (unsigned long) newval); +#else + abort(); +#endif +} + + +static inline int pmix_atomic_cmpset_rel_ptr(volatile void* addr, + void* oldval, + void* newval) +{ +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_CMPSET_32 + return pmix_atomic_cmpset_rel_32((int32_t*) addr, (unsigned long) oldval, + (unsigned long) newval); +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_CMPSET_64 + return pmix_atomic_cmpset_rel_64((int64_t*) addr, (unsigned long) oldval, + (unsigned long) newval); +#else + abort(); +#endif +} + +#endif /* (PMIX_HAVE_ATOMIC_CMPSET_32 || PMIX_HAVE_ATOMIC_CMPSET_64) */ + +#if (PMIX_HAVE_ATOMIC_SWAP_32 || PMIX_HAVE_ATOMIC_SWAP_64) + +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_SWAP_32 +#define pmix_atomic_swap_ptr(addr, value) (void *) pmix_atomic_swap_32((int32_t *) addr, (int32_t) value) +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_SWAP_64 +#define pmix_atomic_swap_ptr(addr, value) (void *) pmix_atomic_swap_64((int64_t *) addr, (int64_t) value) +#endif + +#endif /* (PMIX_HAVE_ATOMIC_SWAP_32 || PMIX_HAVE_ATOMIC_SWAP_64) */ + +#if (PMIX_HAVE_ATOMIC_LLSC_32 || PMIX_HAVE_ATOMIC_LLSC_64) + +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_LLSC_32 + +#define pmix_atomic_ll_ptr(addr) (void *) pmix_atomic_ll_32((int32_t *) addr) +#define pmix_atomic_sc_ptr(addr, newval) pmix_atomic_sc_32((int32_t *) addr, (int32_t) newval) + +#define PMIX_HAVE_ATOMIC_LLSC_PTR 1 + +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_LLSC_64 + +#define pmix_atomic_ll_ptr(addr) (void *) pmix_atomic_ll_64((int64_t *) addr) +#define pmix_atomic_sc_ptr(addr, newval) pmix_atomic_sc_64((int64_t *) addr, (int64_t) newval) + +#define PMIX_HAVE_ATOMIC_LLSC_PTR 1 + +#endif + +#endif /* (PMIX_HAVE_ATOMIC_LLSC_32 || PMIX_HAVE_ATOMIC_LLSC_64)*/ + +#if !defined(PMIX_HAVE_ATOMIC_LLSC_PTR) +#define PMIX_HAVE_ATOMIC_LLSC_PTR 0 +#endif + +#if PMIX_HAVE_ATOMIC_MATH_32 || PMIX_HAVE_ATOMIC_MATH_64 + + +static inline void +pmix_atomic_add_xx(volatile void* addr, int32_t value, size_t length) +{ + switch( length ) { +#if PMIX_HAVE_ATOMIC_ADD_32 + case 4: + pmix_atomic_add_32( (volatile int32_t*)addr, (int32_t)value ); + break; +#endif /* PMIX_HAVE_ATOMIC_CMPSET_32 */ + +#if PMIX_HAVE_ATOMIC_ADD_64 + case 8: + pmix_atomic_add_64( (volatile int64_t*)addr, (int64_t)value ); + break; +#endif /* PMIX_HAVE_ATOMIC_ADD_64 */ + default: + /* This should never happen, so deliberately abort (hopefully + leaving a corefile for analysis) */ + abort(); + } +} + + +static inline void +pmix_atomic_sub_xx(volatile void* addr, int32_t value, size_t length) +{ + switch( length ) { +#if PMIX_HAVE_ATOMIC_SUB_32 + case 4: + pmix_atomic_sub_32( (volatile int32_t*)addr, (int32_t)value ); + break; +#endif /* PMIX_HAVE_ATOMIC_SUB_32 */ + +#if PMIX_HAVE_ATOMIC_SUB_64 + case 8: + pmix_atomic_sub_64( (volatile int64_t*)addr, (int64_t)value ); + break; +#endif /* PMIX_HAVE_ATOMIC_SUB_64 */ + default: + /* This should never happen, so deliberately abort (hopefully + leaving a corefile for analysis) */ + abort(); + } +} + +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_ADD_32 +static inline int32_t pmix_atomic_add_ptr( volatile void* addr, + void* delta ) +{ + return pmix_atomic_add_32((int32_t*) addr, (unsigned long) delta); +} +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_ADD_64 +static inline int64_t pmix_atomic_add_ptr( volatile void* addr, + void* delta ) +{ + return pmix_atomic_add_64((int64_t*) addr, (unsigned long) delta); +} +#else +static inline int32_t pmix_atomic_add_ptr( volatile void* addr, + void* delta ) +{ + abort(); + return 0; +} +#endif + +#if SIZEOF_VOID_P == 4 && PMIX_HAVE_ATOMIC_SUB_32 +static inline int32_t pmix_atomic_sub_ptr( volatile void* addr, + void* delta ) +{ + return pmix_atomic_sub_32((int32_t*) addr, (unsigned long) delta); +} +#elif SIZEOF_VOID_P == 8 && PMIX_HAVE_ATOMIC_SUB_32 +static inline int64_t pmix_atomic_sub_ptr( volatile void* addr, + void* delta ) +{ + return pmix_atomic_sub_64((int64_t*) addr, (unsigned long) delta); +} +#else +static inline int32_t pmix_atomic_sub_ptr( volatile void* addr, + void* delta ) +{ + abort(); + return 0; +} +#endif + +#endif /* PMIX_HAVE_ATOMIC_MATH_32 || PMIX_HAVE_ATOMIC_MATH_64 */ + +/********************************************************************** + * + * Atomic spinlocks + * + *********************************************************************/ +#ifdef PMIX_NEED_INLINE_ATOMIC_SPINLOCKS + +/* + * Lock initialization function. It set the lock to UNLOCKED. + */ +static inline void +pmix_atomic_init( pmix_atomic_lock_t* lock, int32_t value ) +{ + lock->u.lock = value; +} + + +static inline int +pmix_atomic_trylock(pmix_atomic_lock_t *lock) +{ + int ret = pmix_atomic_cmpset_acq_32( &(lock->u.lock), + PMIX_ATOMIC_UNLOCKED, PMIX_ATOMIC_LOCKED); + return (ret == 0) ? 1 : 0; +} + + +static inline void +pmix_atomic_lock(pmix_atomic_lock_t *lock) +{ + while( !pmix_atomic_cmpset_acq_32( &(lock->u.lock), + PMIX_ATOMIC_UNLOCKED, PMIX_ATOMIC_LOCKED) ) { + while (lock->u.lock == PMIX_ATOMIC_LOCKED) { + /* spin */ ; + } + } +} + + +static inline void +pmix_atomic_unlock(pmix_atomic_lock_t *lock) +{ + pmix_atomic_wmb(); + lock->u.lock=PMIX_ATOMIC_UNLOCKED; +} + +#endif /* PMIX_HAVE_ATOMIC_SPINLOCKS */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/cma.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/cma.h new file mode 100644 index 00000000000..df5bdb79d37 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/cma.h @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2011-2012 IBM Corporation. All rights reserved. + * Copyright (c) 2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + */ + +/** @file + * + * Cross Memory Attach syscall definitions. + * + * These are only needed temporarily until these new syscalls + * are incorporated into glibc + */ + +#ifndef PMIX_SYS_CMA_H +#define PMIX_SYS_CMA_H 1 + +#if !defined(PMIX_ASSEMBLY_ARCH) +/* need pmix_config.h for the assembly architecture */ +#include "pmix_config.h" +#endif + +#include "src/atomics/sys/architecture.h" + +#ifdef HAVE_SYS_TYPES_H +#include +#endif + +#ifdef HAVE_UNISTD_H +#include +#endif + +#ifdef __linux__ + +/* Cross Memory Attach is so far only supported under linux */ + +#if PMIX_ASSEMBLY_ARCH == PMIX_X86_64 +#define __NR_process_vm_readv 310 +#define __NR_process_vm_writev 311 +#elif PMIX_ASSEMBLY_ARCH == PMIX_IA32 +#define __NR_process_vm_readv 347 +#define __NR_process_vm_writev 348 +#elif PMIX_ASSEMBLY_ARCH == PMIX_IA64 +#define __NR_process_vm_readv 1332 +#define __NR_process_vm_writev 1333 +#elif PMIX_ASSEMBLY_ARCH == PMIX_POWERPC32 +#define __NR_process_vm_readv 351 +#define __NR_process_vm_writev 352 +#elif PMIX_ASSEMBLY_ARCH == PMIX_POWERPC64 +#define __NR_process_vm_readv 351 +#define __NR_process_vm_writev 352 +#elif PMIX_ASSEMBLY_ARCH == PMIX_ARM + +#define __NR_process_vm_readv 376 +#define __NR_process_vm_writev 377 + +#elif PMIX_ASSEMBLY_ARCH == PMIX_ARM64 + +/* ARM64 uses the asm-generic syscall numbers */ + +#define __NR_process_vm_readv 270 +#define __NR_process_vm_writev 271 + +#elif PMIX_ASSEMBLY_ARCH == PMIX_MIPS + +#if _MIPS_SIM == _MIPS_SIM_ABI64 + +#define __NR_process_vm_readv 5304 +#define __NR_process_vm_writev 5305 + +#elif _MIPS_SIM == _MIPS_SIM_NABI32 + +#define __NR_process_vm_readv 6309 +#define __NR_process_vm_writev 6310 + +#else + +#error "Unsupported MIPS architecture for process_vm_readv and process_vm_writev syscalls" + +#endif + +#elif PMIX_ASSEMBLY_ARCH == PMIX_S390 + +#define __NR_process_vm_readv 340 +#define __NR_process_vm_writev 341 + +#elif PMIX_ASSEMBLY_ARCH == PMIX_S390X + +#define __NR_process_vm_readv 340 +#define __NR_process_vm_writev 341 + +#else +#error "Unsupported architecture for process_vm_readv and process_vm_writev syscalls" +#endif + + +static inline ssize_t +process_vm_readv(pid_t pid, + const struct iovec *lvec, + unsigned long liovcnt, + const struct iovec *rvec, + unsigned long riovcnt, + unsigned long flags) +{ + return syscall(__NR_process_vm_readv, pid, lvec, liovcnt, rvec, riovcnt, flags); +} + +static inline ssize_t +process_vm_writev(pid_t pid, + const struct iovec *lvec, + unsigned long liovcnt, + const struct iovec *rvec, + unsigned long riovcnt, + unsigned long flags) +{ + return syscall(__NR_process_vm_writev, pid, lvec, liovcnt, rvec, riovcnt, flags); +} + +#endif /* __linux__ */ + +#endif /* PMIX_SYS_CMA_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/gcc_builtin/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/gcc_builtin/Makefile.include new file mode 100644 index 00000000000..233c8dd1b20 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/gcc_builtin/Makefile.include @@ -0,0 +1,26 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2009 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2011 Sandia National Laboratories. All rights reserved. +# Copyright (c) 2016 Los Alamos National Security, LLC. All rights +# reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/gcc_builtin/atomic.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/gcc_builtin/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/gcc_builtin/atomic.h new file mode 100644 index 00000000000..097cab377fd --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/gcc_builtin/atomic.h @@ -0,0 +1,232 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2013 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2011 Sandia National Laboratories. All rights reserved. + * Copyright (c) 2014-2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2016 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * Copyright (c) 2017 IBM Corporation. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +#include + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_MATH_32 1 +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +#define PMIX_HAVE_ATOMIC_ADD_32 1 +#define PMIX_HAVE_ATOMIC_SUB_32 1 +#define PMIX_HAVE_ATOMIC_SWAP_32 1 +#define PMIX_HAVE_ATOMIC_MATH_64 1 +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 +#define PMIX_HAVE_ATOMIC_ADD_64 1 +#define PMIX_HAVE_ATOMIC_SUB_64 1 +#define PMIX_HAVE_ATOMIC_SWAP_64 1 + + +static inline void pmix_atomic_mb(void) +{ + __atomic_thread_fence (__ATOMIC_SEQ_CST); +} + +static inline void pmix_atomic_rmb(void) +{ + __atomic_thread_fence (__ATOMIC_ACQUIRE); +} + +static inline void pmix_atomic_wmb(void) +{ + __atomic_thread_fence (__ATOMIC_RELEASE); +} + +#define PMIXMB() pmix_atomic_mb() +#define PMIXRMB() pmix_atomic_rmb() +#define PMIXWMB() pmix_atomic_wmb() + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ + +/* + * Suppress numerous (spurious ?) warnings from Oracle Studio compilers + * see https://community.oracle.com/thread/3968347 + */ +#if defined(__SUNPRO_C) || defined(__SUNPRO_CC) +#pragma error_messages(off, E_ARG_INCOMPATIBLE_WITH_ARG_L) +#endif + +static inline int pmix_atomic_cmpset_acq_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); +} + + +static inline int pmix_atomic_cmpset_rel_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_RELEASE, __ATOMIC_RELAXED); +} + +static inline int pmix_atomic_cmpset_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); +} + +static inline int32_t pmix_atomic_swap_32 (volatile int32_t *addr, int32_t newval) +{ + int32_t oldval; + __atomic_exchange (addr, &newval, &oldval, __ATOMIC_RELAXED); + return oldval; +} + +static inline int32_t pmix_atomic_add_32(volatile int32_t *addr, int32_t delta) +{ + return __atomic_add_fetch (addr, delta, __ATOMIC_RELAXED); +} + +static inline int32_t pmix_atomic_sub_32(volatile int32_t *addr, int32_t delta) +{ + return __atomic_sub_fetch (addr, delta, __ATOMIC_RELAXED); +} + +static inline int pmix_atomic_cmpset_acq_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); +} + +static inline int pmix_atomic_cmpset_rel_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_RELEASE, __ATOMIC_RELAXED); +} + + +static inline int pmix_atomic_cmpset_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); +} + +static inline int64_t pmix_atomic_swap_64 (volatile int64_t *addr, int64_t newval) +{ + int64_t oldval; + __atomic_exchange (addr, &newval, &oldval, __ATOMIC_RELAXED); + return oldval; +} + +static inline int64_t pmix_atomic_add_64(volatile int64_t *addr, int64_t delta) +{ + return __atomic_add_fetch (addr, delta, __ATOMIC_RELAXED); +} + +static inline int64_t pmix_atomic_sub_64(volatile int64_t *addr, int64_t delta) +{ + return __atomic_sub_fetch (addr, delta, __ATOMIC_RELAXED); +} + +#if PMIX_HAVE_GCC_BUILTIN_CSWAP_INT128 + +#define PMIX_HAVE_ATOMIC_CMPSET_128 1 + +static inline int pmix_atomic_cmpset_128 (volatile pmix_int128_t *addr, + pmix_int128_t oldval, pmix_int128_t newval) +{ + return __atomic_compare_exchange_n (addr, &oldval, newval, false, + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); +} + +#elif defined(PMIX_HAVE_SYNC_BUILTIN_CSWAP_INT128) && PMIX_HAVE_SYNC_BUILTIN_CSWAP_INT128 + +#define PMIX_HAVE_ATOMIC_CMPSET_128 1 + +/* __atomic version is not lock-free so use legacy __sync version */ + +static inline int pmix_atomic_cmpset_128 (volatile pmix_int128_t *addr, + pmix_int128_t oldval, pmix_int128_t newval) +{ + return __sync_bool_compare_and_swap (addr, oldval, newval); +} + +#endif + +#if defined(__HLE__) + +#include + +#define PMIX_HAVE_ATOMIC_SPINLOCKS 1 + +static inline void pmix_atomic_init (pmix_atomic_lock_t* lock, int32_t value) +{ + lock->u.lock = value; +} + +static inline int pmix_atomic_trylock(pmix_atomic_lock_t *lock) +{ + int ret = __atomic_exchange_n (&lock->u.lock, PMIX_ATOMIC_LOCKED, + __ATOMIC_ACQUIRE | __ATOMIC_HLE_ACQUIRE); + if (PMIX_ATOMIC_LOCKED == ret) { + /* abort the transaction */ + _mm_pause (); + return 1; + } + + return 0; +} + +static inline void pmix_atomic_lock (pmix_atomic_lock_t *lock) +{ + while (PMIX_ATOMIC_LOCKED == __atomic_exchange_n (&lock->u.lock, PMIX_ATOMIC_LOCKED, + __ATOMIC_ACQUIRE | __ATOMIC_HLE_ACQUIRE)) { + /* abort the transaction */ + _mm_pause (); + } +} + +static inline void pmix_atomic_unlock (pmix_atomic_lock_t *lock) +{ + __atomic_store_n (&lock->u.lock, PMIX_ATOMIC_UNLOCKED, + __ATOMIC_RELEASE | __ATOMIC_HLE_RELEASE); +} + +#endif + +#if defined(__SUNPRO_C) || defined(__SUNPRO_CC) +#pragma error_messages(default, E_ARG_INCOMPATIBLE_WITH_ARG_L) +#endif + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/Makefile.include new file mode 100644 index 00000000000..aa95ac1ae91 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/ia32/atomic.h \ + src/atomics/sys/ia32/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/atomic.h new file mode 100644 index 00000000000..85693ad996b --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/atomic.h @@ -0,0 +1,223 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2010 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2007-2010 Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2015 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2015 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +/* + * On ia32, we use cmpxchg. + */ + +#define PMIXSMPLOCK "lock; " +#define PMIXMB() __asm__ __volatile__("": : :"memory") + + +/********************************************************************** + * + * Define constants for IA32 + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 + +#define PMIX_HAVE_ATOMIC_MATH_32 1 +#define PMIX_HAVE_ATOMIC_ADD_32 1 +#define PMIX_HAVE_ATOMIC_SUB_32 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 + +#undef PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 +#define PMIX_HAVE_INLINE_ATOMIC_CMPSET_64 0 + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline void pmix_atomic_mb(void) +{ + PMIXMB(); +} + + +static inline void pmix_atomic_rmb(void) +{ + PMIXMB(); +} + + +static inline void pmix_atomic_wmb(void) +{ + PMIXMB(); +} + +static inline void pmix_atomic_isync(void) +{ +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_32(volatile int32_t *addr, + int32_t oldval, + int32_t newval) +{ + unsigned char ret; + __asm__ __volatile__ ( + PMIXSMPLOCK "cmpxchgl %3,%2 \n\t" + "sete %0 \n\t" + : "=qm" (ret), "+a" (oldval), "+m" (*addr) + : "q"(newval) + : "memory", "cc"); + + return (int)ret; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#define pmix_atomic_cmpset_acq_32 pmix_atomic_cmpset_32 +#define pmix_atomic_cmpset_rel_32 pmix_atomic_cmpset_32 + +#if PMIX_GCC_INLINE_ASSEMBLY + +#if 0 + +/* some versions of GCC won't let you use ebx period (even though they + should be able to save / restore for the life of the inline + assembly). For the beta, just use the non-inline version */ + +#ifndef ll_low /* GLIBC provides these somewhere, so protect */ +#define ll_low(x) *(((unsigned int*)&(x))+0) +#define ll_high(x) *(((unsigned int*)&(x))+1) +#endif + +/* On Linux the EBX register is used by the shared libraries + * to keep the global offset. In same time this register is + * required by the cmpxchg8b instruction (as an input parameter). + * This conflict force us to save the EBX before the cmpxchg8b + * and to restore it afterward. + */ +static inline int pmix_atomic_cmpset_64(volatile int64_t *addr, + int64_t oldval, + int64_t newval) +{ + /* + * Compare EDX:EAX with m64. If equal, set ZF and load ECX:EBX into + * m64. Else, clear ZF and load m64 into EDX:EAX. + */ + unsigned char ret; + + __asm__ __volatile__( + "push %%ebx \n\t" + "movl %4, %%ebx \n\t" + SMPLOCK "cmpxchg8b (%1) \n\t" + "sete %0 \n\t" + "pop %%ebx \n\t" + : "=qm"(ret) + : "D"(addr), "a"(ll_low(oldval)), "d"(ll_high(oldval)), + "r"(ll_low(newval)), "c"(ll_high(newval)) + : "cc", "memory", "ebx"); + return (int) ret; +} +#endif /* if 0 */ + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#define pmix_atomic_cmpset_acq_64 pmix_atomic_cmpset_64 +#define pmix_atomic_cmpset_rel_64 pmix_atomic_cmpset_64 + +#if PMIX_GCC_INLINE_ASSEMBLY + +#define PMIX_HAVE_ATOMIC_SWAP_32 1 + +static inline int32_t pmix_atomic_swap_32( volatile int32_t *addr, + int32_t newval) +{ + int32_t oldval; + + __asm__ __volatile__("xchg %1, %0" : + "=r" (oldval), "=m" (*addr) : + "0" (newval), "m" (*addr) : + "memory"); + return oldval; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +#if PMIX_GCC_INLINE_ASSEMBLY + +/** + * atomic_add - add integer to atomic variable + * @i: integer value to add + * @v: pointer of type int + * + * Atomically adds @i to @v. + */ +static inline int32_t pmix_atomic_add_32(volatile int32_t* v, int i) +{ + int ret = i; + __asm__ __volatile__( + PMIXSMPLOCK "xaddl %1,%0" + :"+m" (*v), "+r" (ret) + : + :"memory", "cc" + ); + return (ret+i); +} + + +/** + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type int + * + * Atomically subtracts @i from @v. + */ +static inline int32_t pmix_atomic_sub_32(volatile int32_t* v, int i) +{ + int ret = -i; + __asm__ __volatile__( + PMIXSMPLOCK "xaddl %1,%0" + :"+m" (*v), "+r" (ret) + : + :"memory", "cc" + ); + return (ret-i); +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/timer.h new file mode 100644 index 00000000000..5be92d4902d --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia32/timer.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2014 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + + +typedef uint64_t pmix_timer_t; + +/* Using RDTSC(P) results in non-monotonic timers across cores */ +#undef PMIX_TIMER_MONOTONIC +#define PMIX_TIMER_MONOTONIC 0 + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + int tmp; + + __asm__ __volatile__( + "xchgl %%ebx, %1\n" + "cpuid\n" + "xchgl %%ebx, %1\n" + "rdtsc\n" + : "=A"(ret), "=r"(tmp) + :: "ecx"); + + return ret; +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#else + +pmix_timer_t pmix_sys_timer_get_cycles(void); + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/Makefile.include new file mode 100644 index 00000000000..3f1aafe022b --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/ia64/atomic.h \ + src/atomics/sys/ia64/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/atomic.h new file mode 100644 index 00000000000..ca8ce8dfdde --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/atomic.h @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +/* + * On ia64, we use cmpxchg, which supports acquire/release semantics natively. + */ + + +#define PMIXMB() __asm__ __volatile__("mf": : :"memory") + + +/********************************************************************** + * + * Define constants for IA64 + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline void pmix_atomic_mb(void) +{ + PMIXMB(); +} + + +static inline void pmix_atomic_rmb(void) +{ + PMIXMB(); +} + + +static inline void pmix_atomic_wmb(void) +{ + PMIXMB(); +} + +static inline void pmix_atomic_isync(void) +{ +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +#define ia64_cmpxchg4_acq(ptr, new, old) \ +({ \ + __u64 ia64_intri_res; \ + ia64_intri_res; \ +}) + +static inline int pmix_atomic_cmpset_acq_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int64_t ret; + + __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval)); + __asm__ __volatile__ ("cmpxchg4.acq %0=[%1],%2,ar.ccv": + "=r"(ret) : "r"(addr), "r"(newval) : "memory"); + + return ((int32_t)ret == oldval); +} + + +static inline int pmix_atomic_cmpset_rel_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int64_t ret; + + __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval)); + __asm__ __volatile__ ("cmpxchg4.rel %0=[%1],%2,ar.ccv": + "=r"(ret) : "r"(addr), "r"(newval) : "memory"); + + return ((int32_t)ret == oldval); +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +#define pmix_atomic_cmpset_32 pmix_atomic_cmpset_acq_32 + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_acq_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + + __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval)); + __asm__ __volatile__ ("cmpxchg8.acq %0=[%1],%2,ar.ccv": + "=r"(ret) : "r"(addr), "r"(newval) : "memory"); + + return (ret == oldval); +} + + +static inline int pmix_atomic_cmpset_rel_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + + __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval)); + __asm__ __volatile__ ("cmpxchg8.rel %0=[%1],%2,ar.ccv": + "=r"(ret) : "r"(addr), "r"(newval) : "memory"); + + return (ret == oldval); +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#define pmix_atomic_cmpset_64 pmix_atomic_cmpset_acq_64 + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/timer.h new file mode 100644 index 00000000000..5a33236592d --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/ia64/timer.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + + +typedef uint64_t pmix_timer_t; + + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + + __asm__ __volatile__ ("mov %0=ar.itc" : "=r"(ret)); + + return ret; +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#else + +pmix_timer_t pmix_sys_timer_get_cycles(void); + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/Makefile.include new file mode 100644 index 00000000000..3a0d838421e --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2008 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/mips/atomic.h \ + src/atomics/sys/mips/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/atomic.h new file mode 100644 index 00000000000..2e0765d9e2f --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/atomic.h @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + + +/* BWB - FIX ME! */ +#ifdef __linux__ +#define PMIXMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory") +#define PMIXRMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory") +#define PMIXWMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory") +#define PMIXSMP_SYNC ".set mips2; sync; .set mips0" +#else +#define PMIXMB() __asm__ __volatile__("sync": : :"memory") +#define PMIXRMB() __asm__ __volatile__("sync": : :"memory") +#define PMIXWMB() __asm__ __volatile__("sync": : :"memory") +#define PMIXSMP_SYNC "sync" +#endif + + +/********************************************************************** + * + * Define constants for MIPS + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 + +#ifdef __mips64 +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 +#endif + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline +void pmix_atomic_mb(void) +{ + PMIXMB(); +} + + +static inline +void pmix_atomic_rmb(void) +{ + PMIXRMB(); +} + + +static inline +void pmix_atomic_wmb(void) +{ + PMIXWMB(); +} + +static inline +void pmix_atomic_isync(void) +{ +} + +#endif + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int32_t ret; + + __asm__ __volatile__ (".set noreorder \n" + ".set noat \n" + "1: \n" +#ifdef __linux__ + ".set mips2 \n\t" +#endif + "ll %0, %2 \n" /* load *addr into ret */ + "bne %0, %z3, 2f \n" /* done if oldval != ret */ + "or $1, %z4, 0 \n" /* tmp = newval (delay slot) */ + "sc $1, %2 \n" /* store tmp in *addr */ +#ifdef __linux__ + ".set mips0 \n\t" +#endif + /* note: ret will be 0 if failed, 1 if succeeded */ + "beqz $1, 1b \n" /* if 0 jump back to 1b */ + "nop \n" /* fill delay slots */ + "2: \n" + ".set reorder \n" + : "=&r"(ret), "=m"(*addr) + : "m"(*addr), "r"(oldval), "r"(newval) + : "cc", "memory"); + return (ret == oldval); +} + + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_32 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_32(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_32(addr, oldval, newval); +} + +#ifdef PMIX_HAVE_ATOMIC_CMPSET_64 +static inline int pmix_atomic_cmpset_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + + __asm__ __volatile__ (".set noreorder \n" + ".set noat \n" + "1: \n\t" + "lld %0, %2 \n\t" /* load *addr into ret */ + "bne %0, %z3, 2f \n\t" /* done if oldval != ret */ + "or $1, %4, 0 \n\t" /* tmp = newval (delay slot) */ + "scd $1, %2 \n\t" /* store tmp in *addr */ + /* note: ret will be 0 if failed, 1 if succeeded */ + "beqz $1, 1b \n\t" /* if 0 jump back to 1b */ + "nop \n\t" /* fill delay slot */ + "2: \n\t" + ".set reorder \n" + : "=&r" (ret), "=m" (*addr) + : "m" (*addr), "r" (oldval), "r" (newval) + : "cc", "memory"); + + return (ret == oldval); +} + + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_64 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_64(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_64(addr, oldval, newval); +} +#endif /* PMIX_HAVE_ATOMIC_CMPSET_64 */ + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/timer.h new file mode 100644 index 00000000000..65532ac8a77 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/mips/timer.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2008 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + +#include + +typedef uint64_t pmix_timer_t; + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + struct tms accurate_clock; + + times(&accurate_clock); + ret = accurate_clock.tms_utime + accurate_clock.tms_stime; + + return ret; +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/Makefile.include new file mode 100644 index 00000000000..38d524c27c5 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/powerpc/atomic.h \ + src/atomics/sys/powerpc/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/atomic.h new file mode 100644 index 00000000000..9682b9e62af --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/atomic.h @@ -0,0 +1,462 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2010-2017 IBM Corporation. All rights reserved. + * Copyright (c) 2015-2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +/* + * On powerpc ... + */ + +#define PMIXMB() __asm__ __volatile__ ("sync" : : : "memory") +#define PMIXRMB() __asm__ __volatile__ ("lwsync" : : : "memory") +#define PMIXWMB() __asm__ __volatile__ ("lwsync" : : : "memory") +#define PMIXISYNC() __asm__ __volatile__ ("isync" : : : "memory") + + +/********************************************************************** + * + * Define constants for PowerPC 32 + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +#define PMIX_HAVE_ATOMIC_SWAP_32 1 +#define PMIX_HAVE_ATOMIC_LLSC_32 1 + +#define PMIX_HAVE_ATOMIC_MATH_32 1 +#define PMIX_HAVE_ATOMIC_ADD_32 1 +#define PMIX_HAVE_ATOMIC_SUB_32 1 + + +#if (PMIX_ASSEMBLY_ARCH == PMIX_POWERPC64) || PMIX_ASM_SUPPORT_64BIT +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 +#define PMIX_HAVE_ATOMIC_SWAP_64 1 +#define PMIX_HAVE_ATOMIC_LLSC_64 1 +#define PMIX_HAVE_ATOMIC_MATH_64 1 +#define PMIX_HAVE_ATOMIC_ADD_64 1 +#define PMIX_HAVE_ATOMIC_SUB_64 1 +#endif + + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline +void pmix_atomic_mb(void) +{ + PMIXMB(); +} + + +static inline +void pmix_atomic_rmb(void) +{ + PMIXRMB(); +} + + +static inline +void pmix_atomic_wmb(void) +{ + PMIXRMB(); +} + +static inline +void pmix_atomic_isync(void) +{ + PMIXISYNC(); +} + +#elif PMIX_XLC_INLINE_ASSEMBLY /* end PMIX_GCC_INLINE_ASSEMBLY */ + +/* Yeah, I don't know who thought this was a reasonable syntax for + * inline assembly. Do these because they are used so often and they + * are fairly simple (aka: there is a tech pub on IBM's web site + * containing the right hex for the instructions). + */ + +#undef PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER +#define PMIX_HAVE_INLINE_ATOMIC_MEM_BARRIER 0 + +#pragma mc_func pmix_atomic_mb { "7c0004ac" } /* sync */ +#pragma reg_killed_by pmix_atomic_mb /* none */ + +#pragma mc_func pmix_atomic_rmb { "7c2004ac" } /* lwsync */ +#pragma reg_killed_by pmix_atomic_rmb /* none */ + +#pragma mc_func pmix_atomic_wmb { "7c0006ac" } /* eieio */ +#pragma reg_killed_by pmix_atomic_wmb /* none */ + +#endif + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +#ifdef __xlC__ +/* work-around bizzare xlc bug in which it sign-extends + a pointer to a 32-bit signed integer */ +#define PMIX_ASM_ADDR(a) ((uintptr_t)a) +#else +#define PMIX_ASM_ADDR(a) (a) +#endif + +#if defined(__PGI) +/* work-around for bug in PGI 16.5-16.7 where the compiler fails to + * correctly emit load instructions for 64-bit operands. without this + * it will emit lwz instead of ld to load the 64-bit operand. */ +#define PMIX_ASM_VALUE64(x) (void *)(intptr_t) (x) +#else +#define PMIX_ASM_VALUE64(x) x +#endif + + +static inline int pmix_atomic_cmpset_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int32_t ret; + + __asm__ __volatile__ ( + "1: lwarx %0, 0, %2 \n\t" + " cmpw 0, %0, %3 \n\t" + " bne- 2f \n\t" + " stwcx. %4, 0, %2 \n\t" + " bne- 1b \n\t" + "2:" + : "=&r" (ret), "=m" (*addr) + : "r" PMIX_ASM_ADDR(addr), "r" (oldval), "r" (newval), "m" (*addr) + : "cc", "memory"); + + return (ret == oldval); +} + +static inline int32_t pmix_atomic_ll_32 (volatile int32_t *addr) +{ + int32_t ret; + + __asm__ __volatile__ ("lwarx %0, 0, %1 \n\t" + : "=&r" (ret) + : "r" (addr) + ); + return ret; +} + +static inline int pmix_atomic_sc_32 (volatile int32_t *addr, int32_t newval) +{ + int32_t ret, foo; + + __asm__ __volatile__ (" stwcx. %4, 0, %3 \n\t" + " li %0,0 \n\t" + " bne- 1f \n\t" + " ori %0,%0,1 \n\t" + "1:" + : "=r" (ret), "=m" (*addr), "=r" (foo) + : "r" (addr), "r" (newval) + : "cc", "memory"); + return ret; +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_32 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_32(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_32(volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_32(addr, oldval, newval); +} + +static inline int32_t pmix_atomic_swap_32(volatile int32_t *addr, int32_t newval) +{ + int32_t ret; + + __asm__ __volatile__ ("1: lwarx %0, 0, %2 \n\t" + " stwcx. %3, 0, %2 \n\t" + " bne- 1b \n\t" + : "=&r" (ret), "=m" (*addr) + : "r" (addr), "r" (newval) + : "cc", "memory"); + + return ret; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +#if (PMIX_ASSEMBLY_ARCH == PMIX_POWERPC64) + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int64_t pmix_atomic_add_64 (volatile int64_t* v, int64_t inc) +{ + int64_t t; + + __asm__ __volatile__("1: ldarx %0, 0, %3 \n\t" + " add %0, %2, %0 \n\t" + " stdcx. %0, 0, %3 \n\t" + " bne- 1b \n\t" + : "=&r" (t), "=m" (*v) + : "r" (PMIX_ASM_VALUE64(inc)), "r" PMIX_ASM_ADDR(v), "m" (*v) + : "cc"); + + return t; +} + + +static inline int64_t pmix_atomic_sub_64 (volatile int64_t* v, int64_t dec) +{ + int64_t t; + + __asm__ __volatile__( + "1: ldarx %0,0,%3 \n\t" + " subf %0,%2,%0 \n\t" + " stdcx. %0,0,%3 \n\t" + " bne- 1b \n\t" + : "=&r" (t), "=m" (*v) + : "r" (PMIX_ASM_VALUE64(dec)), "r" PMIX_ASM_ADDR(v), "m" (*v) + : "cc"); + + return t; +} + +static inline int pmix_atomic_cmpset_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int64_t ret; + + __asm__ __volatile__ ( + "1: ldarx %0, 0, %2 \n\t" + " cmpd 0, %0, %3 \n\t" + " bne- 2f \n\t" + " stdcx. %4, 0, %2 \n\t" + " bne- 1b \n\t" + "2:" + : "=&r" (ret), "=m" (*addr) + : "r" (addr), "r" (PMIX_ASM_VALUE64(oldval)), "r" (PMIX_ASM_VALUE64(newval)), "m" (*addr) + : "cc", "memory"); + + return (ret == oldval); +} + +static inline int64_t pmix_atomic_ll_64(volatile int64_t *addr) +{ + int64_t ret; + + __asm__ __volatile__ ("ldarx %0, 0, %1 \n\t" + : "=&r" (ret) + : "r" (addr) + ); + return ret; +} + +static inline int pmix_atomic_sc_64(volatile int64_t *addr, int64_t newval) +{ + int32_t ret; + + __asm__ __volatile__ (" stdcx. %2, 0, %1 \n\t" + " li %0,0 \n\t" + " bne- 1f \n\t" + " ori %0,%0,1 \n\t" + "1:" + : "=r" (ret) + : "r" (addr), "r" (PMIX_ASM_VALUE64(newval)) + : "cc", "memory"); + return ret; +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_64 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_64(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_64(addr, oldval, newval); +} + +static inline int64_t pmix_atomic_swap_64(volatile int64_t *addr, int64_t newval) +{ + int64_t ret; + + __asm__ __volatile__ ("1: ldarx %0, 0, %2 \n\t" + " stdcx. %3, 0, %2 \n\t" + " bne- 1b \n\t" + : "=&r" (ret), "=m" (*addr) + : "r" (addr), "r" (PMIX_ASM_VALUE64(newval)) + : "cc", "memory"); + + return ret; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#elif (PMIX_ASSEMBLY_ARCH == PMIX_POWERPC32) && PMIX_ASM_SUPPORT_64BIT + +#ifndef ll_low /* GLIBC provides these somewhere, so protect */ +#define ll_low(x) *(((unsigned int*)&(x))+0) +#define ll_high(x) *(((unsigned int*)&(x))+1) +#endif + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int ret; + + /* + * We force oldval and newval into memory because PPC doesn't + * appear to have a way to do a move register with offset. Since + * this is 32-bit code, a 64 bit integer will be loaded into two + * registers (assuming no inlining, addr will be in r3, oldval + * will be in r4 and r5, and newval will be r6 and r7. We need + * to load the whole thing into one register. So we have the + * compiler push the values into memory and load the double word + * into registers. We use r4,r5 so that the main block of code + * is very similar to the pure 64 bit version. + */ + __asm__ __volatile__ ( + "ld r4,%2 \n\t" + "ld r5,%3 \n\t" + "1: ldarx r9, 0, %1 \n\t" + " cmpd 0, r9, r4 \n\t" + " bne- 2f \n\t" + " stdcx. r5, 0, %1 \n\t" + " bne- 1b \n\t" + "2: \n\t" + "xor r5,r4,r9 \n\t" + "subfic r9,r5,0 \n\t" + "adde %0,r9,r5 \n\t" + : "=&r" (ret) + : "r"PMIX_ASM_ADDR(addr), + "m"(oldval), "m"(newval) + : "r4", "r5", "r9", "cc", "memory"); + + return ret; +} + +/* these two functions aren't inlined in the non-gcc case because then + there would be two function calls (since neither cmpset_64 nor + atomic_?mb can be inlined). Instead, we "inline" them by hand in + the assembly, meaning there is one function call overhead instead + of two */ +static inline int pmix_atomic_cmpset_acq_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_64(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_64(volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_64(addr, oldval, newval); +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* PMIX_ASM_SUPPORT_64BIT */ + + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int32_t pmix_atomic_add_32(volatile int32_t* v, int inc) +{ + int32_t t; + + __asm__ __volatile__( + "1: lwarx %0, 0, %3 \n\t" + " add %0, %2, %0 \n\t" + " stwcx. %0, 0, %3 \n\t" + " bne- 1b \n\t" + : "=&r" (t), "=m" (*v) + : "r" (inc), "r" PMIX_ASM_ADDR(v), "m" (*v) + : "cc"); + + return t; +} + + +static inline int32_t pmix_atomic_sub_32(volatile int32_t* v, int dec) +{ + int32_t t; + + __asm__ __volatile__( + "1: lwarx %0,0,%3 \n\t" + " subf %0,%2,%0 \n\t" + " stwcx. %0,0,%3 \n\t" + " bne- 1b \n\t" + : "=&r" (t), "=m" (*v) + : "r" (dec), "r" PMIX_ASM_ADDR(v), "m" (*v) + : "cc"); + + return t; +} + + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/timer.h new file mode 100644 index 00000000000..dd8c3ffe1b6 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/powerpc/timer.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + + +typedef uint64_t pmix_timer_t; + + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + unsigned int tbl, tbu0, tbu1; + + do { + __asm__ __volatile__ ("mftbu %0" : "=r"(tbu0)); + __asm__ __volatile__ ("mftb %0" : "=r"(tbl)); + __asm__ __volatile__ ("mftbu %0" : "=r"(tbu1)); + } while (tbu0 != tbu1); + + return (((unsigned long long)tbu0) << 32) | tbl; +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#else + +pmix_timer_t pmix_sys_timer_get_cycles(void); + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/Makefile.include new file mode 100644 index 00000000000..870bfbb7a47 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/sparcv9/atomic.h \ + src/atomics/sys/sparcv9/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/atomic.h new file mode 100644 index 00000000000..9d41bde0a44 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/atomic.h @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2007 Sun Microsystems, Inc. All rights reserverd. + * Copyright (c) 2016 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +/* + * On sparc v9, use casa and casxa (compare and swap) instructions. + */ + +#define PMIXASI_P "0x80" + +#define PMIXMEMBAR(type) __asm__ __volatile__ ("membar " type : : : "memory") + + +/********************************************************************** + * + * Define constants for Sparc v9 (Ultra Sparc) + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 + + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline void pmix_atomic_mb(void) +{ + PMIXMEMBAR("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad"); +} + + +static inline void pmix_atomic_rmb(void) +{ + PMIXMEMBAR("#LoadLoad"); +} + + +static inline void pmix_atomic_wmb(void) +{ + PMIXMEMBAR("#StoreStore"); +} + +static inline void pmix_atomic_isync(void) +{ +} + + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + /* casa [reg(rs1)] %asi, reg(rs2), reg(rd) + * + * if (*(reg(rs1)) == reg(rs2) ) + * swap reg(rd), *(reg(rs1)) + * else + * reg(rd) = *(reg(rs1)) + */ + + int32_t ret = newval; + + __asm__ __volatile__("casa [%1] " PMIXASI_P ", %2, %0" + : "+r" (ret) + : "r" (addr), "r" (oldval)); + return (ret == oldval); +} + + +static inline int pmix_atomic_cmpset_acq_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_32(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_32(addr, oldval, newval); +} + + +#if PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_64 + +static inline int pmix_atomic_cmpset_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + /* casa [reg(rs1)] %asi, reg(rs2), reg(rd) + * + * if (*(reg(rs1)) == reg(rs1) ) + * swap reg(rd), *(reg(rs1)) + * else + * reg(rd) = *(reg(rs1)) + */ + int64_t ret = newval; + + __asm__ __volatile__("casxa [%1] " PMIXASI_P ", %2, %0" + : "+r" (ret) + : "r" (addr), "r" (oldval)); + return (ret == oldval); +} + +#else /* PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_64 */ + +static inline int pmix_atomic_cmpset_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + /* casa [reg(rs1)] %asi, reg(rs2), reg(rd) + * + * if (*(reg(rs1)) == reg(rs1) ) + * swap reg(rd), *(reg(rs1)) + * else + * reg(rd) = *(reg(rs1)) + * + */ + long long ret = newval; + + __asm__ __volatile__( + "ldx %0, %%g1 \n\t" /* g1 = ret */ + "ldx %2, %%g2 \n\t" /* g2 = oldval */ + "casxa [%1] " PMIXASI_P ", %%g2, %%g1 \n\t" + "stx %%g1, %0 \n" + : "+m"(ret) + : "r"(addr), "m"(oldval) + : "%g1", "%g2" + ); + + return (ret == oldval); +} + +#endif /* PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_64 */ + +static inline int pmix_atomic_cmpset_acq_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + int rc; + + rc = pmix_atomic_cmpset_64(addr, oldval, newval); + pmix_atomic_rmb(); + + return rc; +} + + +static inline int pmix_atomic_cmpset_rel_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + pmix_atomic_wmb(); + return pmix_atomic_cmpset_64(addr, oldval, newval); +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/timer.h new file mode 100644 index 00000000000..395ea986014 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sparcv9/timer.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2005 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + +typedef uint64_t pmix_timer_t; + +#if PMIX_GCC_INLINE_ASSEMBLY + + +#if PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_64 + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + + __asm__ __volatile__("rd %%tick, %0" : "=r"(ret)); + + return ret; +} + +#else /* PMIX_SPARCV9_32 */ + +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + pmix_timer_t ret; + int a, b; + + __asm__ __volatile__("rd %%tick, %0 \n" + "srlx %0, 32, %1 " : + "=r"(a), "=r"(b) + ); + + ret = (0x00000000FFFFFFFF & a) | (((pmix_timer_t) b) << 32); + + return ret; +} + +#endif + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#else + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 0 + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sync_builtin/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sync_builtin/Makefile.include new file mode 100644 index 00000000000..e683abc0ea3 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sync_builtin/Makefile.include @@ -0,0 +1,24 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2009 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2011 Sandia National Laboratories. All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/sync_builtin/atomic.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sync_builtin/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sync_builtin/atomic.h new file mode 100644 index 00000000000..51a9a1409b7 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/sync_builtin/atomic.h @@ -0,0 +1,137 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2013 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2011 Sandia National Laboratories. All rights reserved. + * Copyright (c) 2014-2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +static inline void pmix_atomic_mb(void) +{ + __sync_synchronize(); +} + +static inline void pmix_atomic_rmb(void) +{ + __sync_synchronize(); +} + +static inline void pmix_atomic_wmb(void) +{ + __sync_synchronize(); +} + +#define MB() pmix_atomic_mb() + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 +static inline int pmix_atomic_cmpset_acq_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval); +} + + +static inline int pmix_atomic_cmpset_rel_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval);} + +static inline int pmix_atomic_cmpset_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval); +} + +#define PMIX_HAVE_ATOMIC_MATH_32 1 + +#define PMIX_HAVE_ATOMIC_ADD_32 1 +static inline int32_t pmix_atomic_add_32(volatile int32_t *addr, int32_t delta) +{ + return __sync_add_and_fetch(addr, delta); +} + +#define PMIX_HAVE_ATOMIC_SUB_32 1 +static inline int32_t pmix_atomic_sub_32(volatile int32_t *addr, int32_t delta) +{ + return __sync_sub_and_fetch(addr, delta); +} + +#if PMIX_ASM_SYNC_HAVE_64BIT + +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 +static inline int pmix_atomic_cmpset_acq_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval); +} + +static inline int pmix_atomic_cmpset_rel_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval);} + + +static inline int pmix_atomic_cmpset_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval); +} + +#define PMIX_HAVE_ATOMIC_MATH_64 1 +#define PMIX_HAVE_ATOMIC_ADD_64 1 +static inline int64_t pmix_atomic_add_64(volatile int64_t *addr, int64_t delta) +{ + return __sync_add_and_fetch(addr, delta); +} + +#define PMIX_HAVE_ATOMIC_SUB_64 1 +static inline int64_t pmix_atomic_sub_64(volatile int64_t *addr, int64_t delta) +{ + return __sync_sub_and_fetch(addr, delta); +} + +#endif + +#if PMIX_HAVE_SYNC_BUILTIN_CSWAP_INT128 +static inline int pmix_atomic_cmpset_128 (volatile pmix_int128_t *addr, + pmix_int128_t oldval, pmix_int128_t newval) +{ + return __sync_bool_compare_and_swap(addr, oldval, newval); +} + +#define PMIX_HAVE_ATOMIC_CMPSET_128 1 + +#endif + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/timer.h new file mode 100644 index 00000000000..a364f61cc8f --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/timer.h @@ -0,0 +1,131 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2014 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2016 Broadcom Limited. All rights reserved. + * Copyright (c) 2016 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +/** @file + * + * Cycle counter reading instructions. Do not use directly - see the + * timer interface instead + */ + +#ifndef PMIX_SYS_TIMER_H +#define PMIX_SYS_TIMER_H 1 + +#include "pmix_config.h" + +#include "src/atomics/sys/architecture.h" + +#ifdef HAVE_SYS_TYPES_H +#include +#endif + +/* do some quick #define cleanup in cases where we are doing + testing... */ +#ifdef PMIX_DISABLE_INLINE_ASM +#undef PMIX_C_GCC_INLINE_ASSEMBLY +#define PMIX_C_GCC_INLINE_ASSEMBLY 0 +#undef PMIX_CXX_GCC_INLINE_ASSEMBLY +#define PMIX_CXX_GCC_INLINE_ASSEMBLY 0 +#undef PMIX_C_DEC_INLINE_ASSEMBLY +#define PMIX_C_DEC_INLINE_ASSEMBLY 0 +#undef PMIX_CXX_DEC_INLINE_ASSEMBLY +#define PMIX_CXX_DEC_INLINE_ASSEMBLY 0 +#undef PMIX_C_XLC_INLINE_ASSEMBLY +#define PMIX_C_XLC_INLINE_ASSEMBLY 0 +#undef PMIX_CXX_XLC_INLINE_ASSEMBLY +#define PMIX_CXX_XLC_INLINE_ASSEMBLY 0 +#endif + +/* define PMIX_{GCC,DEC,XLC}_INLINE_ASSEMBLY based on the + PMIX_{C,CXX}_{GCC,DEC,XLC}_INLINE_ASSEMBLY defines and whether we + are in C or C++ */ +#if defined(c_plusplus) || defined(__cplusplus) +#define PMIX_GCC_INLINE_ASSEMBLY PMIX_CXX_GCC_INLINE_ASSEMBLY +#define PMIX_DEC_INLINE_ASSEMBLY PMIX_CXX_DEC_INLINE_ASSEMBLY +#define PMIX_XLC_INLINE_ASSEMBLY PMIX_CXX_XLC_INLINE_ASSEMBLY +#else +#define PMIX_GCC_INLINE_ASSEMBLY PMIX_C_GCC_INLINE_ASSEMBLY +#define PMIX_DEC_INLINE_ASSEMBLY PMIX_C_DEC_INLINE_ASSEMBLY +#define PMIX_XLC_INLINE_ASSEMBLY PMIX_C_XLC_INLINE_ASSEMBLY +#endif + +/********************************************************************** + * + * Load the appropriate architecture files and set some reasonable + * default values for our support + * + *********************************************************************/ + +/* By default we suppose all timers are monotonic per node. */ +#define PMIX_TIMER_MONOTONIC 1 + +BEGIN_C_DECLS + +/* If you update this list, you probably also want to update + src/mca/timer/linux/configure.m4. Or not. */ + +#if defined(DOXYGEN) +/* don't include system-level gorp when generating doxygen files */ +#elif PMIX_ASSEMBLY_ARCH == PMIX_X86_64 +#include "src/atomics/sys/x86_64/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_ARM +#include "src/atomics/sys/arm/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_ARM64 +#include "src/atomics/sys/arm64/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_IA32 +#include "src/atomics/sys/ia32/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_IA64 +#include "src/atomics/sys/ia64/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_POWERPC32 +#include "src/atomics/sys/powerpc/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_POWERPC64 +#include "src/atomics/sys/powerpc/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_32 +#include "src/atomics/sys/sparcv9/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_SPARCV9_64 +#include "src/atomics/sys/sparcv9/timer.h" +#elif PMIX_ASSEMBLY_ARCH == PMIX_MIPS +#include "src/atomics/sys/mips/timer.h" +#endif + +#ifndef DOXYGEN +#ifndef PMIX_HAVE_SYS_TIMER_GET_CYCLES +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 0 + +typedef long pmix_timer_t; +#endif +#endif + +#ifndef PMIX_HAVE_SYS_TIMER_IS_MONOTONIC + +#define PMIX_HAVE_SYS_TIMER_IS_MONOTONIC 1 + +static inline bool pmix_sys_timer_is_monotonic (void) +{ + return PMIX_TIMER_MONOTONIC; +} + +#endif + +END_C_DECLS + +#endif /* PMIX_SYS_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/Makefile.include b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/Makefile.include new file mode 100644 index 00000000000..5773686f94a --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/Makefile.include @@ -0,0 +1,26 @@ +# +# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana +# University Research and Technology +# Corporation. All rights reserved. +# Copyright (c) 2004-2005 The University of Tennessee and The University +# of Tennessee Research Foundation. All rights +# reserved. +# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, +# University of Stuttgart. All rights reserved. +# Copyright (c) 2004-2005 The Regents of the University of California. +# All rights reserved. +# Copyright (c) 2017 Research Organization for Information Science +# and Technology (RIST). All rights reserved. +# Copyright (c) 2017 Intel, Inc. All rights reserved. +# $COPYRIGHT$ +# +# Additional copyrights may follow +# +# $HEADER$ +# + +# This makefile.am does not stand on its own - it is included from pmix/include/Makefile.am + +headers += \ + src/atomics/sys/x86_64/atomic.h \ + src/atomics/sys/x86_64/timer.h diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/atomic.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/atomic.h new file mode 100644 index 00000000000..aa71aae3646 --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/atomic.h @@ -0,0 +1,281 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2010 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2007 Sun Microsystems, Inc. All rights reserverd. + * Copyright (c) 2012-2014 Los Alamos National Security, LLC. All rights + * reserved. + * Copyright (c) 2016-2017 Research Organization for Information Science + * and Technology (RIST). All rights reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ +#ifndef PMIX_SYS_ARCH_ATOMIC_H +#define PMIX_SYS_ARCH_ATOMIC_H 1 + +/* + * On x86_64, we use cmpxchg. + */ + + +#define PMIXSMPLOCK "lock; " +#define PMIXMB() __asm__ __volatile__("": : :"memory") + + +/********************************************************************** + * + * Define constants for AMD64 / x86_64 / EM64T / ... + * + *********************************************************************/ +#define PMIX_HAVE_ATOMIC_MEM_BARRIER 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_32 1 + +#define PMIX_HAVE_ATOMIC_CMPSET_64 1 + +/********************************************************************** + * + * Memory Barriers + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline void pmix_atomic_mb(void) +{ + PMIXMB(); +} + + +static inline void pmix_atomic_rmb(void) +{ + PMIXMB(); +} + + +static inline void pmix_atomic_wmb(void) +{ + PMIXMB(); +} + +static inline void pmix_atomic_isync(void) +{ +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +/********************************************************************** + * + * Atomic math operations + * + *********************************************************************/ +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_32( volatile int32_t *addr, + int32_t oldval, int32_t newval) +{ + unsigned char ret; + __asm__ __volatile__ ( + PMIXSMPLOCK "cmpxchgl %3,%2 \n\t" + "sete %0 \n\t" + : "=qm" (ret), "+a" (oldval), "+m" (*addr) + : "q"(newval) + : "memory", "cc"); + + return (int)ret; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#define pmix_atomic_cmpset_acq_32 pmix_atomic_cmpset_32 +#define pmix_atomic_cmpset_rel_32 pmix_atomic_cmpset_32 + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int pmix_atomic_cmpset_64( volatile int64_t *addr, + int64_t oldval, int64_t newval) +{ + unsigned char ret; + __asm__ __volatile__ ( + PMIXSMPLOCK "cmpxchgq %3,%2 \n\t" + "sete %0 \n\t" + : "=qm" (ret), "+a" (oldval), "+m" (*((volatile long*)addr)) + : "q"(newval) + : "memory", "cc" + ); + + return (int)ret; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#define pmix_atomic_cmpset_acq_64 pmix_atomic_cmpset_64 +#define pmix_atomic_cmpset_rel_64 pmix_atomic_cmpset_64 + +#if PMIX_GCC_INLINE_ASSEMBLY && PMIX_HAVE_CMPXCHG16B && HAVE_PMIX_INT128_T + +static inline int pmix_atomic_cmpset_128 (volatile pmix_int128_t *addr, pmix_int128_t oldval, + pmix_int128_t newval) +{ + unsigned char ret; + + /* cmpxchg16b compares the value at the address with eax:edx (low:high). if the values are + * the same the contents of ebx:ecx are stores at the address. in all cases the value stored + * at the address is returned in eax:edx. */ + __asm__ __volatile__ (PMIXSMPLOCK "cmpxchg16b (%%rsi) \n\t" + "sete %0 \n\t" + : "=qm" (ret) + : "S" (addr), "b" (((int64_t *)&newval)[0]), "c" (((int64_t *)&newval)[1]), + "a" (((int64_t *)&oldval)[0]), "d" (((int64_t *)&oldval)[1]) + : "memory", "cc"); + + return (int) ret; +} + +#define PMIX_HAVE_ATOMIC_CMPSET_128 1 + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + +#if PMIX_GCC_INLINE_ASSEMBLY + +#define PMIX_HAVE_ATOMIC_SWAP_32 1 + +#define PMIX_HAVE_ATOMIC_SWAP_64 1 + +static inline int32_t pmix_atomic_swap_32( volatile int32_t *addr, + int32_t newval) +{ + int32_t oldval; + + __asm__ __volatile__("xchg %1, %0" : + "=r" (oldval), "+m" (*addr) : + "0" (newval) : + "memory"); + return oldval; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#if PMIX_GCC_INLINE_ASSEMBLY + +static inline int64_t pmix_atomic_swap_64( volatile int64_t *addr, + int64_t newval) +{ + int64_t oldval; + + __asm__ __volatile__("xchgq %1, %0" : + "=r" (oldval), "+m" (*addr) : + "0" (newval) : + "memory"); + return oldval; +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + + + +#if PMIX_GCC_INLINE_ASSEMBLY + +#define PMIX_HAVE_ATOMIC_MATH_32 1 +#define PMIX_HAVE_ATOMIC_MATH_64 1 + +#define PMIX_HAVE_ATOMIC_ADD_32 1 + +/** + * atomic_add - add integer to atomic variable + * @i: integer value to add + * @v: pointer of type int + * + * Atomically adds @i to @v. + */ +static inline int32_t pmix_atomic_add_32(volatile int32_t* v, int i) +{ + int ret = i; + __asm__ __volatile__( + PMIXSMPLOCK "xaddl %1,%0" + :"+m" (*v), "+r" (ret) + : + :"memory", "cc" + ); + return (ret+i); +} + +#define PMIX_HAVE_ATOMIC_ADD_64 1 + +/** + * atomic_add - add integer to atomic variable + * @i: integer value to add + * @v: pointer of type int + * + * Atomically adds @i to @v. + */ +static inline int64_t pmix_atomic_add_64(volatile int64_t* v, int64_t i) +{ + int64_t ret = i; + __asm__ __volatile__( + PMIXSMPLOCK "xaddq %1,%0" + :"+m" (*v), "+r" (ret) + : + :"memory", "cc" + ); + return (ret+i); +} + +#define PMIX_HAVE_ATOMIC_SUB_32 1 + +/** + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type int + * + * Atomically subtracts @i from @v. + */ +static inline int32_t pmix_atomic_sub_32(volatile int32_t* v, int i) +{ + int ret = -i; + __asm__ __volatile__( + PMIXSMPLOCK "xaddl %1,%0" + :"+m" (*v), "+r" (ret) + : + :"memory", "cc" + ); + return (ret-i); +} + +#define PMIX_HAVE_ATOMIC_SUB_64 1 + +/** + * atomic_sub - subtract the atomic variable + * @i: integer value to subtract + * @v: pointer of type int + * + * Atomically subtracts @i from @v. + */ +static inline int64_t pmix_atomic_sub_64(volatile int64_t* v, int64_t i) +{ + int64_t ret = -i; + __asm__ __volatile__( + PMIXSMPLOCK "xaddq %1,%0" + :"+m" (*v), "+r" (ret) + : + :"memory", "cc" + ); + return (ret-i); +} + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_ATOMIC_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/timer.h b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/timer.h new file mode 100644 index 00000000000..0d6019c36fc --- /dev/null +++ b/opal/mca/pmix/pmix112/pmix/src/atomics/sys/x86_64/timer.h @@ -0,0 +1,75 @@ +/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ +/* + * Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana + * University Research and Technology + * Corporation. All rights reserved. + * Copyright (c) 2004-2014 The University of Tennessee and The University + * of Tennessee Research Foundation. All rights + * reserved. + * Copyright (c) 2004-2005 High Performance Computing Center Stuttgart, + * University of Stuttgart. All rights reserved. + * Copyright (c) 2004-2005 The Regents of the University of California. + * All rights reserved. + * Copyright (c) 2016 Los Alamos National Security, LLC. ALl rights + * reserved. + * Copyright (c) 2017 Intel, Inc. All rights reserved. + * $COPYRIGHT$ + * + * Additional copyrights may follow + * + * $HEADER$ + */ + +#ifndef PMIX_SYS_ARCH_TIMER_H +#define PMIX_SYS_ARCH_TIMER_H 1 + + +typedef uint64_t pmix_timer_t; + +/* Using RDTSC(P) results in non-monotonic timers across cores */ +#undef PMIX_TIMER_MONOTONIC +#define PMIX_TIMER_MONOTONIC 0 + +#if PMIX_GCC_INLINE_ASSEMBLY + +/* TODO: add AMD mfence version and dispatch at init */ +static inline pmix_timer_t +pmix_sys_timer_get_cycles(void) +{ + uint32_t l, h; + __asm__ __volatile__ ("lfence\n\t" + "rdtsc\n\t" + : "=a" (l), "=d" (h)); + return ((pmix_timer_t)l) | (((pmix_timer_t)h) << 32); +} + +static inline bool pmix_sys_timer_is_monotonic (void) +{ + int64_t tmp; + int32_t cpuid1, cpuid2; + const int32_t level = 0x80000007; + + /* cpuid clobbers ebx but it must be restored for -fPIC so save + * then restore ebx */ + __asm__ volatile ("xchg %%rbx, %2\n" + "cpuid\n" + "xchg %%rbx, %2\n": + "=a" (cpuid1), "=d" (cpuid2), "=r" (tmp) : + "a" (level) : + "ecx", "ebx"); + /* bit 8 of edx contains the invariant tsc flag */ + return !!(cpuid2 & (1 << 8)); +} + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 +#define PMIX_HAVE_SYS_TIMER_IS_MONOTONIC 1 + +#else + +pmix_timer_t pmix_sys_timer_get_cycles(void); + +#define PMIX_HAVE_SYS_TIMER_GET_CYCLES 1 + +#endif /* PMIX_GCC_INLINE_ASSEMBLY */ + +#endif /* ! PMIX_SYS_ARCH_TIMER_H */ diff --git a/opal/mca/pmix/pmix112/pmix/src/class/pmix_object.h b/opal/mca/pmix/pmix112/pmix/src/class/pmix_object.h index 068e24d277d..092c935525b 100644 --- a/opal/mca/pmix/pmix112/pmix/src/class/pmix_object.h +++ b/opal/mca/pmix/pmix112/pmix/src/class/pmix_object.h @@ -119,6 +119,7 @@ #define PMIX_OBJECT_H #include +#include #include #ifdef HAVE_STDLIB_H @@ -173,6 +174,7 @@ struct pmix_class_t { #else #define PMIX_PMIX_STATIC_INIT(BASE_CLASS) { PMIX_CLASS(BASE_CLASS), 1 } #endif +#define PMIX_OBJ_STATIC_INIT(BASE_CLASS) PMIX_PMIX_STATIC_INIT(BASE_CLASS) /** * Base object. diff --git a/opal/mca/pmix/pmix112/pmix/src/client/Makefile.am b/opal/mca/pmix/pmix112/pmix/src/client/Makefile.am index 3b288a7f903..6e878ca3ff5 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/Makefile.am +++ b/opal/mca/pmix/pmix112/pmix/src/client/Makefile.am @@ -20,7 +20,7 @@ sources += \ src/client/pmix_client_spawn.c \ src/client/pmix_client_connect.c -if WANT_PMIX_BACKWARD +if WANT_PMI_BACKWARD sources += \ src/client/pmi1.c \ src/client/pmi2.c diff --git a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client.c b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client.c index 892e81ac4d7..56d20948591 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client.c +++ b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2016 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -168,6 +168,7 @@ static void wait_cbfunc(struct pmix_peer_t *pr, pmix_usock_hdr_t *hdr, "pmix:client recv callback activated with %d bytes", (NULL == buf) ? -1 : (int)buf->bytes_used); + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -184,6 +185,9 @@ static void job_data(struct pmix_peer_t *pr, pmix_usock_hdr_t *hdr, * unpack it to maintain sequence */ if (PMIX_SUCCESS != (rc = pmix_bfrop.unpack(buf, &nspace, &cnt, PMIX_STRING))) { PMIX_ERROR_LOG(rc); + cb->status = PMIX_ERROR; + PMIX_POST_OBJECT(cb); + cb->active = false; return; } /* decode it */ @@ -191,6 +195,7 @@ static void job_data(struct pmix_peer_t *pr, pmix_usock_hdr_t *hdr, pmix_job_data_htable_store(nspace, buf); #endif cb->status = PMIX_SUCCESS; + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -390,7 +395,6 @@ PMIX_EXPORT pmix_status_t PMIx_Init(pmix_proc_t *proc) pmix_output_finalize(); pmix_class_finalize(); return -1; - } /* setup an object to track server connection */ @@ -501,7 +505,7 @@ PMIX_EXPORT pmix_status_t PMIx_Finalize(void) } PMIX_EXPORT pmix_status_t PMIx_Abort(int flag, const char msg[], - pmix_proc_t procs[], size_t nprocs) + pmix_proc_t procs[], size_t nprocs) { pmix_buffer_t *bfr; pmix_cmd_t cmd = PMIX_ABORT_CMD; @@ -577,6 +581,9 @@ static void _putfn(int sd, short args, void *cbdata) pmix_kval_t *kv; pmix_nspace_t *ns; + /* need to acquire the cb object from its originating thread */ + PMIX_ACQUIRE_OBJECT(cb); + /* setup to xfer the data */ kv = PMIX_NEW(pmix_kval_t); kv->key = strdup(cb->key); // need to copy as the input belongs to the user @@ -627,6 +634,8 @@ static void _putfn(int sd, short args, void *cbdata) done: PMIX_RELEASE(kv); // maintain accounting cb->pstatus = rc; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -669,6 +678,9 @@ static void _commitfn(int sd, short args, void *cbdata) pmix_buffer_t *msgout; pmix_cmd_t cmd=PMIX_COMMIT_CMD; + /* need to acquire the cb object from its originating thread */ + PMIX_ACQUIRE_OBJECT(cb); + msgout = PMIX_NEW(pmix_buffer_t); /* pack the cmd */ if (PMIX_SUCCESS != (rc = pmix_bfrop.pack(msgout, &cmd, 1, PMIX_CMD))) { @@ -714,6 +726,8 @@ static void _commitfn(int sd, short args, void *cbdata) done: cb->pstatus = rc; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -760,6 +774,9 @@ static void _peersfn(int sd, short args, void *cbdata) #endif size_t i; + /* need to acquire the cb object from its originating thread */ + PMIX_ACQUIRE_OBJECT(cb); + /* cycle across our known nspaces */ tmp = NULL; #if defined(PMIX_ENABLE_DSTORE) && (PMIX_ENABLE_DSTORE == 1) @@ -814,6 +831,8 @@ static void _peersfn(int sd, short args, void *cbdata) done: cb->pstatus = rc; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -860,6 +879,9 @@ static void _nodesfn(int sd, short args, void *cbdata) pmix_nspace_t *nsptr; pmix_nrec_t *nptr; + /* need to acquire the cb object from its originating thread */ + PMIX_ACQUIRE_OBJECT(cb); + /* cycle across our known nspaces */ tmp = NULL; PMIX_LIST_FOREACH(nsptr, &pmix_globals.nspaces, pmix_nspace_t) { @@ -879,6 +901,8 @@ static void _nodesfn(int sd, short args, void *cbdata) } cb->pstatus = rc; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -1180,8 +1204,8 @@ static void regevents_cbfunc(struct pmix_peer_t *peer, pmix_usock_hdr_t *hdr, /* unpack the status code */ cnt = 1; if ((PMIX_SUCCESS != (rc = pmix_bfrop.unpack(buf, &ret, &cnt, PMIX_INT))) || - (PMIX_SUCCESS != ret)) { - /* This is not an actual error since the server may not support registration events */ + (PMIX_SUCCESS != ret)) { + /* This is not an actual error since the server may not support registration events */ /* remove the err handler and call the error handler reg completion callback fn.*/ rc = pmix_remove_errhandler(cb->errhandler_ref); /* call the callback with error */ diff --git a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_connect.c b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_connect.c index fe0cb669f94..e286627f24a 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_connect.c +++ b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_connect.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2015 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -335,5 +335,7 @@ static void op_cbfunc(pmix_status_t status, void *cbdata) pmix_cb_t *cb = (pmix_cb_t*)cbdata; cb->status = status; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } diff --git a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_fence.c b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_fence.c index ac1b1b093b5..036ceca874b 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_fence.c +++ b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_fence.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2015 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -251,6 +251,7 @@ static void op_cbfunc(pmix_status_t status, void *cbdata) pmix_cb_t *cb = (pmix_cb_t*)cbdata; cb->status = status; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } - diff --git a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_get.c b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_get.c index a2d9f4a726a..1f506b177b1 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_get.c +++ b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_get.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2015 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -179,12 +179,16 @@ static void _value_cbfunc(pmix_status_t status, pmix_value_t *kv, void *cbdata) pmix_cb_t *cb = (pmix_cb_t*)cbdata; pmix_status_t rc; + PMIX_ACQUIRE_OBJECT(cb); + cb->status = status; if (PMIX_SUCCESS == status) { if (PMIX_SUCCESS != (rc = pmix_bfrop.copy((void**)&cb->value, kv, PMIX_VALUE))) { PMIX_ERROR_LOG(rc); } } + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -409,6 +413,9 @@ static void _getnbfn(int fd, short flags, void *cbdata) pmix_nspace_t *ns, *nptr; size_t n, nvals; + /* need to acquire the cb object from its originating thread */ + PMIX_ACQUIRE_OBJECT(cb); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix: getnbfn value for proc %s:%d key %s", cb->nspace, cb->rank, diff --git a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_pub.c b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_pub.c index 2de2b3f20d9..95a48833e7c 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_pub.c +++ b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_pub.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2015 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -406,6 +406,8 @@ static void wait_cbfunc(struct pmix_peer_t *pr, pmix_usock_hdr_t *hdr, int ret; int32_t cnt; + PMIX_ACQUIRE_OBJECT(cb); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:client recv callback activated with %d bytes", (NULL == buf) ? -1 : (int)buf->bytes_used); @@ -426,6 +428,8 @@ static void op_cbfunc(pmix_status_t status, void *cbdata) pmix_cb_t *cb = (pmix_cb_t*)cbdata; cb->status = status; + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } @@ -438,6 +442,8 @@ static void wait_lookup_cbfunc(struct pmix_peer_t *pr, pmix_usock_hdr_t *hdr, pmix_pdata_t *pdata; size_t ndata; + PMIX_ACQUIRE_OBJECT(cb); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:client recv callback activated with %d bytes", (NULL == buf) ? -1 : (int)buf->bytes_used); @@ -502,6 +508,8 @@ static void lookup_cbfunc(pmix_status_t status, pmix_pdata_t pdata[], size_t nda pmix_pdata_t *tgt = (pmix_pdata_t*)cb->cbdata; size_t i, j; + PMIX_ACQUIRE_OBJECT(cb); + cb->status = status; if (PMIX_SUCCESS == status) { /* find the matching key in the provided info array - error if not found */ @@ -519,5 +527,7 @@ static void lookup_cbfunc(pmix_status_t status, pmix_pdata_t pdata[], size_t nda } } + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } diff --git a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_spawn.c b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_spawn.c index 05577f212dd..633fda21d09 100644 --- a/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_spawn.c +++ b/opal/mca/pmix/pmix112/pmix/src/client/pmix_client_spawn.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -185,6 +185,8 @@ static void wait_cbfunc(struct pmix_peer_t *pr, pmix_usock_hdr_t *hdr, pmix_status_t rc, ret; int32_t cnt; + PMIX_ACQUIRE_OBJECT(cb); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:client recv callback activated with %d bytes", (NULL == buf) ? -1 : (int)buf->bytes_used); @@ -224,10 +226,13 @@ static void spawn_cbfunc(pmix_status_t status, char nspace[], void *cbdata) { pmix_cb_t *cb = (pmix_cb_t*)cbdata; + PMIX_ACQUIRE_OBJECT(cb); + cb->status = status; if (NULL != nspace) { (void)strncpy(cb->nspace, nspace, PMIX_MAX_NSLEN); } + /* post the data so the receiving thread can acquire it */ + PMIX_POST_OBJECT(cb); cb->active = false; } - diff --git a/opal/mca/pmix/pmix112/pmix/src/common/pmix_common.c b/opal/mca/pmix/pmix112/pmix/src/common/pmix_common.c index f3de30c799c..09ba8f33543 100644 --- a/opal/mca/pmix/pmix112/pmix/src/common/pmix_common.c +++ b/opal/mca/pmix/pmix112/pmix/src/common/pmix_common.c @@ -1,6 +1,6 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. * Copyright (c) 2016 IBM Corporation, All rights reserved. @@ -28,9 +28,9 @@ #include "src/include/pmix_globals.h" PMIX_EXPORT void PMIx_Register_errhandler(pmix_info_t info[], size_t ninfo, - pmix_notification_fn_t errhandler, - pmix_errhandler_reg_cbfunc_t cbfunc, - void *cbdata) + pmix_notification_fn_t errhandler, + pmix_errhandler_reg_cbfunc_t cbfunc, + void *cbdata) { if (NULL != cbfunc) { cbfunc(PMIX_ERR_NOT_SUPPORTED, -1, cbdata); @@ -38,8 +38,8 @@ PMIX_EXPORT void PMIx_Register_errhandler(pmix_info_t info[], size_t ninfo, } PMIX_EXPORT void PMIx_Deregister_errhandler(int errhandler_ref, - pmix_op_cbfunc_t cbfunc, - void *cbdata) + pmix_op_cbfunc_t cbfunc, + void *cbdata) { if (NULL != cbfunc) { cbfunc(PMIX_ERR_NOT_SUPPORTED, cbdata); @@ -47,10 +47,10 @@ PMIX_EXPORT void PMIx_Deregister_errhandler(int errhandler_ref, } PMIX_EXPORT pmix_status_t PMIx_Notify_error(pmix_status_t status, - pmix_proc_t procs[], size_t nprocs, - pmix_proc_t error_procs[], size_t error_nprocs, - pmix_info_t info[], size_t ninfo, - pmix_op_cbfunc_t cbfunc, void *cbdata) + pmix_proc_t procs[], size_t nprocs, + pmix_proc_t error_procs[], size_t error_nprocs, + pmix_info_t info[], size_t ninfo, + pmix_op_cbfunc_t cbfunc, void *cbdata) { return PMIX_ERR_NOT_SUPPORTED; diff --git a/opal/mca/pmix/pmix112/pmix/src/include/pmix_globals.h b/opal/mca/pmix/pmix112/pmix/src/include/pmix_globals.h index 6fc26f7c4f9..3e5c1ac4a6f 100644 --- a/opal/mca/pmix/pmix112/pmix/src/include/pmix_globals.h +++ b/opal/mca/pmix/pmix112/pmix/src/include/pmix_globals.h @@ -9,7 +9,8 @@ * University of Stuttgart. All rights reserved. * Copyright (c) 2004-2005 The Regents of the University of California. * All rights reserved. - * Copyright (c) 2014-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. + * Copyright (c) 2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -36,6 +37,7 @@ #include "src/class/pmix_hash_table.h" #include "src/class/pmix_list.h" #include "src/class/pmix_value_array.h" +#include "src/atomics/sys/atomic.h" BEGIN_C_DECLS @@ -290,11 +292,24 @@ typedef struct { } pmix_job_data_caddy_t; PMIX_CLASS_DECLARATION(pmix_job_data_caddy_t); -#define PMIX_THREADSHIFT(r, c) \ +/* provide a macro for forward-proofing the shifting + * of objects between threads - at some point, we + * may revamp our threading model */ + +/* post an object to another thread - for now, we + * only have a memory barrier */ +#define PMIX_POST_OBJECT(o) pmix_atomic_wmb() + +/* acquire an object from another thread - for now, + * we only have a memory barrier */ +#define PMIX_ACQUIRE_OBJECT(o) pmix_atomic_rmb() + +#define PMIX_THREADSHIFT(r, c) \ do { \ (r)->active = true; \ event_assign(&((r)->ev), pmix_globals.evbase, \ -1, EV_WRITE, (c), (r)); \ + PMIX_POST_OBJECT((r)); \ event_active(&((r)->ev), EV_WRITE, 1); \ } while (0) @@ -304,6 +319,7 @@ PMIX_CLASS_DECLARATION(pmix_job_data_caddy_t); while ((a)) { \ usleep(10); \ } \ + PMIX_ACQUIRE_OBJECT((a)); \ } while (0) diff --git a/opal/mca/pmix/pmix112/pmix/src/server/pmix_server.c b/opal/mca/pmix/pmix112/pmix/src/server/pmix_server.c index ace475674a0..04d93795cf2 100644 --- a/opal/mca/pmix/pmix112/pmix/src/server/pmix_server.c +++ b/opal/mca/pmix/pmix112/pmix/src/server/pmix_server.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014-2015 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -450,6 +450,8 @@ static void _register_nspace(int sd, short args, void *cbdata) int32_t cnt; #endif + PMIX_ACQUIRE_OBJECT(caddy); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:server _register_nspace %s", cd->proc.nspace); @@ -661,6 +663,8 @@ static void _deregister_nspace(int sd, short args, void *cbdata) pmix_peer_t *peer; pmix_status_t rc = PMIX_SUCCESS; + PMIX_ACQUIRE_OBJECT(cd); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:server _deregister_nspace %s", cd->proc.nspace); @@ -728,6 +732,8 @@ void pmix_server_execute_collective(int sd, short args, void *cbdata) pmix_rank_info_t *info; pmix_value_t *val; + PMIX_ACQUIRE_OBJECT(tcd); + /* we don't need to check for non-NULL APIs here as * that was already done when the tracker was created */ if (PMIX_FENCENB_CMD == trk->type) { @@ -809,6 +815,8 @@ static void _register_client(int sd, short args, void *cbdata) bool all_def; size_t i; + PMIX_ACQUIRE_OBJECT(cd); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:server _register_client for nspace %s rank %d", cd->proc.nspace, cd->proc.rank); @@ -948,6 +956,8 @@ static void _deregister_client(int sd, short args, void *cbdata) int i; pmix_peer_t *peer; + PMIX_ACQUIRE_OBJECT(cd); + pmix_output_verbose(2, pmix_globals.debug_output, "pmix:server _deregister_client for nspace %s rank %d", cd->proc.nspace, cd->proc.rank); @@ -1054,6 +1064,8 @@ static void _dmodex_req(int sd, short args, void *cbdata) pmix_dmdx_remote_t *dcd; pmix_status_t rc; + PMIX_ACQUIRE_OBJECT(cd); + pmix_output_verbose(2, pmix_globals.debug_output, "DMODX LOOKING FOR %s:%d", cd->proc.nspace, cd->proc.rank); @@ -1118,11 +1130,11 @@ static void _dmodex_req(int sd, short args, void *cbdata) * may not be a contribution */ if (PMIX_SUCCESS == (rc = pmix_hash_fetch(&nptr->server->myremote, info->rank, "modex", &val)) && NULL != val) { - data = val->data.bo.bytes; - sz = val->data.bo.size; - /* protect the data */ - val->data.bo.bytes = NULL; - val->data.bo.size = 0; + data = val->data.bo.bytes; + sz = val->data.bo.size; + /* protect the data */ + val->data.bo.bytes = NULL; + val->data.bo.size = 0; PMIX_VALUE_RELEASE(val); } @@ -1131,6 +1143,7 @@ static void _dmodex_req(int sd, short args, void *cbdata) if (NULL != data) { free(data); } + PMIX_POST_OBJECT(cd); cd->active = false; } @@ -1387,6 +1400,7 @@ static void reg_errhandler(int sd, short args, void *cbdata) "pmix_server_register_errhandler - success index =%d", index); cd->cbfunc.errregcbfn(rc, index, cd->cbdata); } + PMIX_POST_OBJECT(cd); cd->active = false; PMIX_RELEASE(cd); } @@ -1421,6 +1435,7 @@ static void dereg_errhandler(int sd, short args, void *cbdata) if (NULL != cd->cbfunc.opcbfn) { cd->cbfunc.opcbfn(rc, cd->cbdata); } + PMIX_POST_OBJECT(cd); cd->active = false; } @@ -1446,6 +1461,8 @@ static void _store_internal(int sd, short args, void *cbdata) pmix_shift_caddy_t *cd = (pmix_shift_caddy_t*)cbdata; pmix_nspace_t *ns, *nsptr; + PMIX_ACQUIRE_OBJECT(cd); + ns = NULL; PMIX_LIST_FOREACH(nsptr, &pmix_globals.nspaces, pmix_nspace_t) { if (0 == strncmp(cd->nspace, nsptr->nspace, PMIX_MAX_NSLEN)) { @@ -1459,11 +1476,12 @@ static void _store_internal(int sd, short args, void *cbdata) } else { cd->status = pmix_hash_store(&ns->internal, cd->rank, cd->kv); } + PMIX_POST_OBJECT(cd); cd->active = false; } -PMIX_EXPORT pmix_status_t PMIx_Store_internal(const pmix_proc_t *proc, - const char *key, pmix_value_t *val) + PMIX_EXPORT pmix_status_t PMIx_Store_internal(const pmix_proc_t *proc, + const char *key, pmix_value_t *val) { pmix_shift_caddy_t *cd; pmix_status_t rc; @@ -1879,12 +1897,15 @@ static void _spcb(int sd, short args, void *cbdata) pmix_buffer_t *reply; pmix_status_t rc; + PMIX_ACQUIRE_OBJECT(cd); + /* setup the reply with the returned status */ reply = PMIX_NEW(pmix_buffer_t); if (PMIX_SUCCESS != (rc = pmix_bfrop.pack(reply, &cd->status, 1, PMIX_INT))) { PMIX_ERROR_LOG(rc); PMIX_RELEASE(cd->cd); cd->active = false; + PMIX_POST_OBJECT(cd); return; } if (PMIX_SUCCESS == cd->status) { @@ -1911,6 +1932,7 @@ static void _spcb(int sd, short args, void *cbdata) PMIX_SERVER_QUEUE_REPLY(cd->cd->peer, cd->cd->hdr.tag, reply); /* cleanup */ PMIX_RELEASE(cd->cd); + PMIX_POST_OBJECT(cd); cd->active = false; } @@ -1980,6 +2002,8 @@ static void _mdxcbfunc(int sd, short argc, void *cbdata) int32_t cnt = 1; char byte; + PMIX_ACQUIRE_OBJECT(scd); + /* pass the blobs being returned */ PMIX_CONSTRUCT(&xfer, pmix_buffer_t); @@ -2238,6 +2262,8 @@ static void _cnct(int sd, short args, void *cbdata) pmix_nspace_t *nptr; pmix_buffer_t *job_info_ptr; + PMIX_ACQUIRE_OBJECT(cd); + /* setup the reply, starting with the returned status */ reply = PMIX_NEW(pmix_buffer_t); if (PMIX_SUCCESS != (rc = pmix_bfrop.pack(reply, &scd->status, 1, PMIX_INT))) { diff --git a/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_get.c b/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_get.c index 8b83242dba3..5f411ee0a65 100644 --- a/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_get.c +++ b/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_get.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2015 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014-2015 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -66,6 +66,7 @@ extern pmix_server_module_t pmix_host_server; typedef struct { pmix_object_t super; pmix_event_t ev; + volatile bool active; pmix_status_t status; const char *data; size_t ndata; @@ -518,6 +519,9 @@ static void _process_dmdx_reply(int fd, short args, void *cbdata) pmix_nspace_t *ns, *nptr; pmix_status_t rc; + /* need to acquire the cb object from its originating thread */ + PMIX_ACQUIRE_OBJECT(caddy); + pmix_output_verbose(2, pmix_globals.debug_output, "[%s:%d] process dmdx reply from %s:%d", __FILE__, __LINE__, @@ -603,9 +607,5 @@ static void dmdx_cbfunc(pmix_status_t status, "[%s:%d] queue dmdx reply for %s:%d", __FILE__, __LINE__, caddy->lcd->proc.nspace, caddy->lcd->proc.rank); - event_assign(&caddy->ev, pmix_globals.evbase, -1, EV_WRITE, - _process_dmdx_reply, caddy); - event_priority_set(&caddy->ev, 0); - event_active(&caddy->ev, EV_WRITE, 1); + PMIX_THREADSHIFT(caddy, _process_dmdx_reply); } - diff --git a/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_ops.c b/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_ops.c index 10ff4d704f9..4f7895fd456 100644 --- a/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_ops.c +++ b/opal/mca/pmix/pmix112/pmix/src/server/pmix_server_ops.c @@ -1,13 +1,13 @@ /* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */ /* - * Copyright (c) 2014-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2014-2015 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -138,7 +138,6 @@ pmix_status_t pmix_server_commit(pmix_peer_t *peer, pmix_buffer_t *buf) pmix_nspace_t *nptr; pmix_rank_info_t *info; pmix_dmdx_remote_t *dcd, *dcdnext; - pmix_buffer_t *pbkt; pmix_value_t *val; char *data; size_t sz; @@ -237,16 +236,19 @@ pmix_status_t pmix_server_commit(pmix_peer_t *peer, pmix_buffer_t *buf) if (dcd->cd->proc.rank == info->rank) { /* we can now fulfill this request - collect the * remote/global data from this proc */ - pbkt = PMIX_NEW(pmix_buffer_t); /* get any remote contribution - note that there * may not be a contribution */ + data = NULL; + sz = 0; if (PMIX_SUCCESS == pmix_hash_fetch(&nptr->server->myremote, info->rank, "modex", &val) && NULL != val) { - PMIX_LOAD_BUFFER(pbkt, val->data.bo.bytes, val->data.bo.size); + data = val->data.bo.bytes; + sz = val->data.bo.size; + /* protect the data */ + val->data.bo.bytes = NULL; + val->data.bo.size = 0; PMIX_VALUE_RELEASE(val); } - PMIX_UNLOAD_BUFFER(pbkt, data, sz); - PMIX_RELEASE(pbkt); /* execute the callback */ dcd->cd->cbfunc(PMIX_SUCCESS, data, sz, dcd->cd->cbdata); if (NULL != data) { @@ -1222,6 +1224,7 @@ static void scadcon(pmix_setup_caddy_t *p) p->nlocalprocs = 0; p->info = NULL; p->ninfo = 0; + p->opcbfunc = NULL; p->cbfunc = NULL; p->cbdata = NULL; } diff --git a/opal/mca/pmix/pmix112/pmix/src/usock/usock.h b/opal/mca/pmix/pmix112/pmix/src/usock/usock.h index 6df1e8feaeb..678883a82dc 100644 --- a/opal/mca/pmix/pmix112/pmix/src/usock/usock.h +++ b/opal/mca/pmix/pmix112/pmix/src/usock/usock.h @@ -13,14 +13,14 @@ * All rights reserved. * Copyright (c) 2009-2012 Cisco Systems, Inc. All rights reserved. * Copyright (c) 2011 Oak Ridge National Labs. All rights reserved. - * Copyright (c) 2013-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2013-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014-2015 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2015 Research Organization for Information Science * and Technology (RIST). All rights reserved. * Copyright (c) 2016 Mellanox Technologies, Inc. * All rights reserved. - * Copyright (c) 2016 IBM Corporation. All rights reserved. + * Copyright (c) 2016-2017 IBM Corporation. All rights reserved. * $COPYRIGHT$ * * Additional copyrights may follow @@ -136,6 +136,7 @@ PMIX_CLASS_DECLARATION(pmix_timer_t); EV_WRITE, pmix_usock_send_recv, (ms)); \ pmix_output_verbose(10, pmix_globals.debug_output, \ "event_assign returned %d", rc); \ + PMIX_POST_OBJECT(d); \ event_active(&((ms)->ev), EV_WRITE, 1); \ } while (0) @@ -146,6 +147,7 @@ PMIX_CLASS_DECLARATION(pmix_timer_t); __FILE__, __LINE__); \ event_assign(&((ms)->ev), pmix_globals.evbase, -1, \ EV_WRITE, pmix_usock_process_msg, (ms)); \ + PMIX_POST_OBJECT(ms); \ event_active(&((ms)->ev), EV_WRITE, 1); \ } while (0) diff --git a/opal/mca/pmix/pmix112/pmix/src/usock/usock_sendrecv.c b/opal/mca/pmix/pmix112/pmix/src/usock/usock_sendrecv.c index 18d7a0749f0..4c1cda30912 100644 --- a/opal/mca/pmix/pmix112/pmix/src/usock/usock_sendrecv.c +++ b/opal/mca/pmix/pmix112/pmix/src/usock/usock_sendrecv.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2016 Intel, Inc. All rights reserved. + * Copyright (c) 2014-2017 Intel, Inc. All rights reserved. * Copyright (c) 2014 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2015-2016 Research Organization for Information Science @@ -53,6 +53,9 @@ static void lost_connection(pmix_peer_t *peer, pmix_status_t err) pmix_server_trkr_t *trk; pmix_rank_info_t *rinfo, *rnext; pmix_trkr_caddy_t *tcd; + pmix_usock_posted_recv_t *rcv; + pmix_buffer_t buf; + pmix_usock_hdr_t hdr; /* stop all events */ if (peer->recv_ev_active) { @@ -112,6 +115,21 @@ static void lost_connection(pmix_peer_t *peer, pmix_status_t err) /* if I am a client, there is only * one connection we can have */ pmix_globals.connected = false; + /* it is possible that we have sendrecv's in progress where + * we are waiting for a response to arrive. Since we have + * lost connection to the server, that will never happen. + * Thus, to preclude any chance of hanging, cycle thru + * the list of posted recvs and complete any that are + * the return call from a sendrecv - i.e., any that are + * waiting on dynamic tags */ + PMIX_CONSTRUCT(&buf, pmix_buffer_t); + hdr.nbytes = 0; // initialize the hdr to something safe + PMIX_LIST_FOREACH(rcv, &pmix_usock_globals.posted_recvs, pmix_usock_posted_recv_t) { + if (UINT_MAX != rcv->tag && NULL != rcv->cbfunc) { + rcv->cbfunc(peer, &hdr, &buf, rcv->cbdata); + } + } + PMIX_DESTRUCT(&buf); } PMIX_REPORT_ERROR(err); } diff --git a/opal/mca/pmix/pmix112/pmix/src/util/basename.h b/opal/mca/pmix/pmix112/pmix/src/util/basename.h index a293e3d8abd..945c9f5640c 100644 --- a/opal/mca/pmix/pmix112/pmix/src/util/basename.h +++ b/opal/mca/pmix/pmix112/pmix/src/util/basename.h @@ -27,7 +27,7 @@ #define PMIX_BASENAME_H #include - +#include BEGIN_C_DECLS diff --git a/opal/mca/pmix/pmix112/pmix/src/util/crc.h b/opal/mca/pmix/pmix112/pmix/src/util/crc.h index 3438de6e292..398423bac0b 100644 --- a/opal/mca/pmix/pmix112/pmix/src/util/crc.h +++ b/opal/mca/pmix/pmix112/pmix/src/util/crc.h @@ -24,7 +24,7 @@ #define _PMIX_CRC_H_ #include - +#include #include diff --git a/opal/mca/pmix/pmix112/pmix/src/util/os_path.h b/opal/mca/pmix/pmix112/pmix/src/util/os_path.h index d7785bd3946..d954f9e3025 100644 --- a/opal/mca/pmix/pmix112/pmix/src/util/os_path.h +++ b/opal/mca/pmix/pmix112/pmix/src/util/os_path.h @@ -43,7 +43,7 @@ #define PMIX_OS_PATH_H #include - +#include #include #include diff --git a/opal/mca/pmix/pmix112/pmix/src/util/printf.h b/opal/mca/pmix/pmix112/pmix/src/util/printf.h index 828dcdd9632..c96d081ec56 100644 --- a/opal/mca/pmix/pmix112/pmix/src/util/printf.h +++ b/opal/mca/pmix/pmix112/pmix/src/util/printf.h @@ -26,7 +26,7 @@ #define PMIX_PRINTF_H #include - +#include #include #include diff --git a/opal/mca/pmix/pmix112/pmix/test/Makefile.am b/opal/mca/pmix/pmix112/pmix/test/Makefile.am index 91348993127..e87319c899a 100644 --- a/opal/mca/pmix/pmix112/pmix/test/Makefile.am +++ b/opal/mca/pmix/pmix112/pmix/test/Makefile.am @@ -35,7 +35,7 @@ noinst_PROGRAMS = noinst_SCRIPTS = pmix_client_otheruser.sh -if WANT_PMIX_BACKWARD +if WANT_PMI_BACKWARD noinst_PROGRAMS += pmi_client pmi2_client endif @@ -49,7 +49,7 @@ pmix_test_LDFLAGS = $(PMIX_PKG_CONFIG_LDFLAGS) pmix_test_LDADD = \ $(top_builddir)/libpmix.la -if WANT_PMIX_BACKWARD +if WANT_PMI_BACKWARD pmi_client_SOURCES = $(headers) \ pmi_client.c pmi_client_LDFLAGS = $(PMIX_PKG_CONFIG_LDFLAGS) diff --git a/opal/mca/pmix/pmix112/pmix/test/test_common.c b/opal/mca/pmix/pmix112/pmix/test/test_common.c index d78ff1973db..48a7c523062 100644 --- a/opal/mca/pmix/pmix112/pmix/test/test_common.c +++ b/opal/mca/pmix/pmix112/pmix/test/test_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2015 Intel, Inc. All rights reserved. + * Copyright (c) 2013-2017 Intel, Inc. All rights reserved. * Copyright (c) 2015 Artem Y. Polyakov . * All rights reserved. * Copyright (c) 2015-2017 Mellanox Technologies, Inc. @@ -547,8 +547,12 @@ int parse_replace(char *replace_param, int store, int *key_num) { while(NULL != pch) { pch++; ech = strchr(pch, ','); - if (NULL != ech || (strlen(pch) > 0)) { - snprintf(tmp_str, ech - pch + 1, "%s", pch); + if (strlen(pch) > 0) { + if (NULL != ech) { + snprintf(tmp_str, ech - pch + 1, "%s", pch); + } else { + snprintf(tmp_str, strlen(pch) + 1, "%s", pch); + } if ((0 == is_digit(tmp_str)) || ((atoi(tmp_str) + 1) > cnt)) { ret = 1; break; @@ -627,4 +631,3 @@ int get_all_ranks_from_namespace(test_params params, char *nspace, pmix_proc_t * } return PMIX_SUCCESS; } -