From 87a6753928eda38442bea5eaffe8f755f7c2a383 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 12:36:20 +0800
Subject: [PATCH 01/16] remove hasConflict() assertions

---
 llvm/include/llvm/Support/KnownBits.h | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/llvm/include/llvm/Support/KnownBits.h b/llvm/include/llvm/Support/KnownBits.h
index ba4a5f01036ca..c206bd77d5880 100644
--- a/llvm/include/llvm/Support/KnownBits.h
+++ b/llvm/include/llvm/Support/KnownBits.h
@@ -48,7 +48,6 @@ struct KnownBits {
 
   /// Returns true if we know the value of all bits.
   bool isConstant() const {
-    assert(!hasConflict() && "KnownBits conflict!");
     return Zero.popcount() + One.popcount() == getBitWidth();
   }
 
@@ -74,16 +73,10 @@ struct KnownBits {
   }
 
   /// Returns true if value is all zero.
-  bool isZero() const {
-    assert(!hasConflict() && "KnownBits conflict!");
-    return Zero.isAllOnes();
-  }
+  bool isZero() const { return Zero.isAllOnes(); }
 
   /// Returns true if value is all one bits.
-  bool isAllOnes() const {
-    assert(!hasConflict() && "KnownBits conflict!");
-    return One.isAllOnes();
-  }
+  bool isAllOnes() const { return One.isAllOnes(); }
 
   /// Make all bits known to be zero and discard any previous information.
   void setAllZero() {

From 98b33682838ee8b407457fc0de2f5563823720c0 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 16:06:21 +0800
Subject: [PATCH 02/16] remove more assert

---
 llvm/lib/Analysis/ValueTracking.cpp           |  1 -
 .../lib/CodeGen/GlobalISel/GISelKnownBits.cpp |  1 -
 .../lib/CodeGen/SelectionDAG/SelectionDAG.cpp |  1 -
 .../CodeGen/SelectionDAG/TargetLowering.cpp   | 22 +-----------------
 llvm/lib/IR/ConstantRange.cpp                 |  2 --
 llvm/lib/Support/KnownBits.cpp                | 23 +++----------------
 llvm/lib/Target/X86/X86ISelLowering.cpp       |  5 ----
 .../InstCombineSimplifyDemanded.cpp           | 21 ++---------------
 8 files changed, 6 insertions(+), 70 deletions(-)

diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 08138a5e2f2d9..357a5917c725b 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1158,7 +1158,6 @@ static void computeKnownBitsFromOperator(const Operator *I,
           Known.makeNonNegative();
       }
 
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
       break;
     }
 
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index 32d607cfd71a7..2988fa45b2e33 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -607,7 +607,6 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
   }
   }
 
-  assert(!Known.hasConflict() && "Bits known to be one AND zero?");
   LLVM_DEBUG(dumpResult(MI, Known, Depth));
 
   // Update the cache.
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 09cdec8adb275..ef87882591f19 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4212,7 +4212,6 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
     break;
   }
 
-  assert(!Known.hasConflict() && "Bits known to be one AND zero?");
   return Known;
 }
 
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index f856c8a51984e..1867b22f60f05 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1436,11 +1436,9 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op1, DemandedBits, DemandedElts, Known, TLO,
                              Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     if (SimplifyDemandedBits(Op0, ~Known.Zero & DemandedBits, DemandedElts,
                              Known2, TLO, Depth + 1))
       return true;
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // If all of the demanded bits are known one on one side, return the other.
     // These bits cannot contribute to the result of the 'and'.
@@ -1488,7 +1486,7 @@ bool TargetLowering::SimplifyDemandedBits(
       }
       return true;
     }
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
+
     if (SimplifyDemandedBits(Op0, ~Known.One & DemandedBits, DemandedElts,
                              Known2, TLO, Depth + 1)) {
       if (Flags.hasDisjoint()) {
@@ -1497,7 +1495,6 @@ bool TargetLowering::SimplifyDemandedBits(
       }
       return true;
     }
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // If all of the demanded bits are known zero on one side, return the other.
     // These bits cannot contribute to the result of the 'or'.
@@ -1563,11 +1560,9 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op1, DemandedBits, DemandedElts, Known, TLO,
                              Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     if (SimplifyDemandedBits(Op0, DemandedBits, DemandedElts, Known2, TLO,
                              Depth + 1))
       return true;
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // If all of the demanded bits are known zero on one side, return the other.
     // These bits cannot contribute to the result of the 'xor'.
@@ -1663,8 +1658,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op.getOperand(1), DemandedBits, DemandedElts,
                              Known2, TLO, Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // If the operands are constants, see if we can simplify them.
     if (ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO))
@@ -1680,8 +1673,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op.getOperand(1), DemandedBits, DemandedElts,
                              Known2, TLO, Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // Only known if known in both the LHS and RHS.
     Known = Known.intersectWith(Known2);
@@ -1693,8 +1684,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op.getOperand(2), DemandedBits, DemandedElts,
                              Known2, TLO, Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // If the operands are constants, see if we can simplify them.
     if (ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO))
@@ -1819,7 +1808,6 @@ bool TargetLowering::SimplifyDemandedBits(
         }
         return true;
       }
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
       Known.Zero <<= ShAmt;
       Known.One <<= ShAmt;
       // low bits known zero.
@@ -1993,7 +1981,6 @@ bool TargetLowering::SimplifyDemandedBits(
       if (SimplifyDemandedBits(Op0, InDemandedMask, DemandedElts, Known, TLO,
                                Depth + 1))
         return true;
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
       Known.Zero.lshrInPlace(ShAmt);
       Known.One.lshrInPlace(ShAmt);
       // High bits known zero.
@@ -2090,7 +2077,6 @@ bool TargetLowering::SimplifyDemandedBits(
       if (SimplifyDemandedBits(Op0, InDemandedMask, DemandedElts, Known, TLO,
                                Depth + 1))
         return true;
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
       Known.Zero.lshrInPlace(ShAmt);
       Known.One.lshrInPlace(ShAmt);
 
@@ -2385,7 +2371,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op0, InputDemandedBits, DemandedElts, Known, TLO,
                              Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
 
     // If the sign bit of the input is known set or clear, then we know the
     // top bits of the result.
@@ -2458,7 +2443,6 @@ bool TargetLowering::SimplifyDemandedBits(
       }
       return true;
     }
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     assert(Known.getBitWidth() == InBits && "Src width has changed?");
     Known = Known.zext(BitWidth);
 
@@ -2508,7 +2492,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Src, InDemandedBits, InDemandedElts, Known, TLO,
                              Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     assert(Known.getBitWidth() == InBits && "Src width has changed?");
 
     // If the sign bit is known one, the top bits match.
@@ -2554,7 +2537,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Src, InDemandedBits, InDemandedElts, Known, TLO,
                              Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     assert(Known.getBitWidth() == InBits && "Src width has changed?");
     Known = Known.anyext(BitWidth);
 
@@ -2620,7 +2602,6 @@ bool TargetLowering::SimplifyDemandedBits(
       break;
     }
 
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     break;
   }
   case ISD::AssertZext: {
@@ -2631,7 +2612,6 @@ bool TargetLowering::SimplifyDemandedBits(
     if (SimplifyDemandedBits(Op.getOperand(0), ~InMask | DemandedBits, Known,
                              TLO, Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
 
     Known.Zero |= ~InMask;
     Known.One &= (~Known.Zero);
diff --git a/llvm/lib/IR/ConstantRange.cpp b/llvm/lib/IR/ConstantRange.cpp
index c3bde48b982ce..76ea26b753d19 100644
--- a/llvm/lib/IR/ConstantRange.cpp
+++ b/llvm/lib/IR/ConstantRange.cpp
@@ -58,8 +58,6 @@ ConstantRange::ConstantRange(APInt L, APInt U)
 
 ConstantRange ConstantRange::fromKnownBits(const KnownBits &Known,
                                            bool IsSigned) {
-  assert(!Known.hasConflict() && "Expected valid KnownBits");
-
   if (Known.isUnknown())
     return getFull(Known.getBitWidth());
 
diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index d6012a8eea8a6..0f99e6c58b876 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -608,14 +608,12 @@ KnownBits KnownBits::abs(bool IntMinIsPoison) const {
     }
   }
 
-  assert(!KnownAbs.hasConflict() && "Bad Output");
   return KnownAbs;
 }
 
 static KnownBits computeForSatAddSub(bool Add, bool Signed,
                                      const KnownBits &LHS,
                                      const KnownBits &RHS) {
-  assert(!LHS.hasConflict() && !RHS.hasConflict() && "Bad inputs");
   // We don't see NSW even for sadd/ssub as we want to check if the result has
   // signed overflow.
   KnownBits Res =
@@ -715,7 +713,6 @@ static KnownBits computeForSatAddSub(bool Add, bool Signed,
     // We know whether or not we overflowed.
     if (!(*Overflow)) {
       // No overflow.
-      assert(!Res.hasConflict() && "Bad Output");
       return Res;
     }
 
@@ -737,7 +734,6 @@ static KnownBits computeForSatAddSub(bool Add, bool Signed,
 
     Res.One = C;
     Res.Zero = ~C;
-    assert(!Res.hasConflict() && "Bad Output");
     return Res;
   }
 
@@ -757,7 +753,6 @@ static KnownBits computeForSatAddSub(bool Add, bool Signed,
     Res.One.clearAllBits();
   }
 
-  assert(!Res.hasConflict() && "Bad Output");
   return Res;
 }
 
@@ -808,8 +803,7 @@ KnownBits KnownBits::avgCeilU(const KnownBits &LHS, const KnownBits &RHS) {
 KnownBits KnownBits::mul(const KnownBits &LHS, const KnownBits &RHS,
                          bool NoUndefSelfMultiply) {
   unsigned BitWidth = LHS.getBitWidth();
-  assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
-         !RHS.hasConflict() && "Operand mismatch");
+  assert(BitWidth == RHS.getBitWidth() && "Operand mismatch");
   assert((!NoUndefSelfMultiply || LHS == RHS) &&
          "Self multiplication knownbits mismatch");
 
@@ -905,8 +899,7 @@ KnownBits KnownBits::mul(const KnownBits &LHS, const KnownBits &RHS,
 
 KnownBits KnownBits::mulhs(const KnownBits &LHS, const KnownBits &RHS) {
   unsigned BitWidth = LHS.getBitWidth();
-  assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
-         !RHS.hasConflict() && "Operand mismatch");
+  assert(BitWidth == RHS.getBitWidth() && "Operand mismatch");
   KnownBits WideLHS = LHS.sext(2 * BitWidth);
   KnownBits WideRHS = RHS.sext(2 * BitWidth);
   return mul(WideLHS, WideRHS).extractBits(BitWidth, BitWidth);
@@ -914,8 +907,7 @@ KnownBits KnownBits::mulhs(const KnownBits &LHS, const KnownBits &RHS) {
 
 KnownBits KnownBits::mulhu(const KnownBits &LHS, const KnownBits &RHS) {
   unsigned BitWidth = LHS.getBitWidth();
-  assert(BitWidth == RHS.getBitWidth() && !LHS.hasConflict() &&
-         !RHS.hasConflict() && "Operand mismatch");
+  assert(BitWidth == RHS.getBitWidth() && "Operand mismatch");
   KnownBits WideLHS = LHS.zext(2 * BitWidth);
   KnownBits WideRHS = RHS.zext(2 * BitWidth);
   return mul(WideLHS, WideRHS).extractBits(BitWidth, BitWidth);
@@ -964,7 +956,6 @@ KnownBits KnownBits::sdiv(const KnownBits &LHS, const KnownBits &RHS,
     return udiv(LHS, RHS, Exact);
 
   unsigned BitWidth = LHS.getBitWidth();
-  assert(!LHS.hasConflict() && !RHS.hasConflict() && "Bad inputs");
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
@@ -1011,15 +1002,12 @@ KnownBits KnownBits::sdiv(const KnownBits &LHS, const KnownBits &RHS,
   }
 
   Known = divComputeLowBit(Known, LHS, RHS, Exact);
-
-  assert(!Known.hasConflict() && "Bad Output");
   return Known;
 }
 
 KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
                           bool Exact) {
   unsigned BitWidth = LHS.getBitWidth();
-  assert(!LHS.hasConflict() && !RHS.hasConflict());
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
@@ -1041,7 +1029,6 @@ KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
   Known.Zero.setHighBits(LeadZ);
   Known = divComputeLowBit(Known, LHS, RHS, Exact);
 
-  assert(!Known.hasConflict() && "Bad Output");
   return Known;
 }
 
@@ -1059,8 +1046,6 @@ KnownBits KnownBits::remGetLowBits(const KnownBits &LHS, const KnownBits &RHS) {
 }
 
 KnownBits KnownBits::urem(const KnownBits &LHS, const KnownBits &RHS) {
-  assert(!LHS.hasConflict() && !RHS.hasConflict());
-
   KnownBits Known = remGetLowBits(LHS, RHS);
   if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
     // NB: Low bits set in `remGetLowBits`.
@@ -1078,8 +1063,6 @@ KnownBits KnownBits::urem(const KnownBits &LHS, const KnownBits &RHS) {
 }
 
 KnownBits KnownBits::srem(const KnownBits &LHS, const KnownBits &RHS) {
-  assert(!LHS.hasConflict() && !RHS.hasConflict());
-
   KnownBits Known = remGetLowBits(LHS, RHS);
   if (RHS.isConstant() && RHS.getConstant().isPowerOf2()) {
     // NB: Low bits are set in `remGetLowBits`.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index af1e45d25aac4..0882ea3fdaca3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -42445,12 +42445,10 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
     if (SimplifyDemandedBits(Op1, OriginalDemandedBits, OriginalDemandedElts,
                              Known, TLO, Depth + 1))
       return true;
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
 
     if (SimplifyDemandedBits(Op0, ~Known.Zero & OriginalDemandedBits,
                              OriginalDemandedElts, Known2, TLO, Depth + 1))
       return true;
-    assert(!Known2.hasConflict() && "Bits known to be one AND zero?");
 
     // If the RHS is a constant, see if we can simplify it.
     if (ShrinkDemandedConstant(Op, ~Known2.One & OriginalDemandedBits,
@@ -42501,7 +42499,6 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
                              TLO, Depth + 1))
       return true;
 
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     Known.Zero <<= ShAmt;
     Known.One <<= ShAmt;
 
@@ -42520,7 +42517,6 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
                              OriginalDemandedElts, Known, TLO, Depth + 1))
       return true;
 
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     Known.Zero.lshrInPlace(ShAmt);
     Known.One.lshrInPlace(ShAmt);
 
@@ -42561,7 +42557,6 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
                              TLO, Depth + 1))
       return true;
 
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     Known.Zero.lshrInPlace(ShAmt);
     Known.One.lshrInPlace(ShAmt);
 
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 6739b8745d74e..e538d78d908c5 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -209,8 +209,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
         SimplifyDemandedBits(I, 0, DemandedMask & ~RHSKnown.Zero, LHSKnown,
                              Depth + 1))
       return I;
-    assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
-    assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
 
     Known = analyzeKnownBitsFromAndXorOr(cast<Operator>(I), LHSKnown, RHSKnown,
                                          Depth, SQ.getWithInstruction(CxtI));
@@ -242,8 +240,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
       I->dropPoisonGeneratingFlags();
       return I;
     }
-    assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
-    assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
 
     Known = analyzeKnownBitsFromAndXorOr(cast<Operator>(I), LHSKnown, RHSKnown,
                                          Depth, SQ.getWithInstruction(CxtI));
@@ -291,9 +287,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
       return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop, Xor);
     }
 
-    assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
-    assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
-
     Known = analyzeKnownBitsFromAndXorOr(cast<Operator>(I), LHSKnown, RHSKnown,
                                          Depth, SQ.getWithInstruction(CxtI));
 
@@ -375,8 +368,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
     if (SimplifyDemandedBits(I, 2, DemandedMask, RHSKnown, Depth + 1) ||
         SimplifyDemandedBits(I, 1, DemandedMask, LHSKnown, Depth + 1))
       return I;
-    assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
-    assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
 
     // If the operands are constants, see if we can simplify them.
     // This is similar to ShrinkDemandedConstant, but for a select we want to
@@ -455,7 +446,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
       InputKnown.makeNonNegative();
     Known = InputKnown.zextOrTrunc(BitWidth);
 
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
     break;
   }
   case Instruction::SExt: {
@@ -485,9 +475,8 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
 
     // If the sign bit of the input is known set or clear, then we know the
     // top bits of the result.
-    Known = InputKnown.sext(BitWidth);
-    assert(!Known.hasConflict() && "Bits known to be one AND zero?");
-    break;
+     Known = InputKnown.sext(BitWidth);
+     break;
   }
   case Instruction::Add: {
     if ((DemandedMask & 1) == 0) {
@@ -696,7 +685,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
 
       if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
         return I;
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
 
       Known = KnownBits::shl(Known,
                              KnownBits::makeConstant(APInt(BitWidth, ShiftAmt)),
@@ -772,7 +760,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
         I->dropPoisonGeneratingFlags();
         return I;
       }
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
       Known.Zero.lshrInPlace(ShiftAmt);
       Known.One.lshrInPlace(ShiftAmt);
       if (ShiftAmt)
@@ -819,7 +806,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
         return I;
       }
 
-      assert(!Known.hasConflict() && "Bits known to be one AND zero?");
       // Compute the new bits that are at the top now plus sign bits.
       APInt HighBits(APInt::getHighBitsSet(
           BitWidth, std::min(SignBits + ShiftAmt - 1, BitWidth)));
@@ -900,7 +886,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
         if (LHSKnown.isNegative() && LowBits.intersects(LHSKnown.One))
           Known.One |= ~LowBits;
 
-        assert(!Known.hasConflict() && "Bits known to be one AND zero?");
         break;
       }
     }
@@ -978,8 +963,6 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
 
         // TODO: Should be 1-extend
         RHSKnown = RHSKnown.anyextOrTrunc(BitWidth);
-        assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
-        assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
 
         Known = LHSKnown & RHSKnown;
         KnownBitsComputed = true;

From 5878f2421c3d313758e50389f4854d26c7f4867c Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 16:11:35 +0800
Subject: [PATCH 03/16] clang-format

---
 .../Transforms/InstCombine/InstCombineSimplifyDemanded.cpp  | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index e538d78d908c5..b3eebee0d0d8c 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -471,12 +471,12 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
       CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy);
       NewCast->takeName(I);
       return InsertNewInstWith(NewCast, I->getIterator());
-     }
+    }
 
     // If the sign bit of the input is known set or clear, then we know the
     // top bits of the result.
-     Known = InputKnown.sext(BitWidth);
-     break;
+    Known = InputKnown.sext(BitWidth);
+    break;
   }
   case Instruction::Add: {
     if ((DemandedMask & 1) == 0) {

From 3726812c748c1df4354b4fcc5588b1b7da5118a8 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 18:55:09 +0800
Subject: [PATCH 04/16] address CR comment

---
 llvm/lib/Analysis/ValueTracking.cpp | 2 --
 llvm/lib/IR/ConstantRange.cpp       | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 357a5917c725b..c7e0c49fd5ccb 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2054,8 +2054,6 @@ void computeKnownBits(const Value *V, const APInt &DemandedElts,
 
   // Check whether we can determine known bits from context such as assumes.
   computeKnownBitsFromContext(V, Known, Depth, Q);
-
-  assert((Known.Zero & Known.One) == 0 && "Bits known to be one AND zero?");
 }
 
 /// Try to detect a recurrence that the value of the induction variable is
diff --git a/llvm/lib/IR/ConstantRange.cpp b/llvm/lib/IR/ConstantRange.cpp
index 76ea26b753d19..08041c96ffe5a 100644
--- a/llvm/lib/IR/ConstantRange.cpp
+++ b/llvm/lib/IR/ConstantRange.cpp
@@ -58,6 +58,8 @@ ConstantRange::ConstantRange(APInt L, APInt U)
 
 ConstantRange ConstantRange::fromKnownBits(const KnownBits &Known,
                                            bool IsSigned) {
+  if (Known.hasConflict())
+    return getEmpty(Known.getBitWidth());
   if (Known.isUnknown())
     return getFull(Known.getBitWidth());
 

From 10b083781f66bb1e3bed63034b8f8e1299515352 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 20:53:50 +0800
Subject: [PATCH 05/16] pass test

---
 llvm/lib/Support/KnownBits.cpp           | 47 ++++--------------------
 llvm/unittests/Support/KnownBitsTest.cpp | 44 ++++++++++++++++------
 llvm/unittests/Support/KnownBitsTest.h   |  3 --
 3 files changed, 40 insertions(+), 54 deletions(-)

diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index 0f99e6c58b876..4bf8224401cd0 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -18,11 +18,8 @@
 
 using namespace llvm;
 
-static KnownBits computeForAddCarry(
-    const KnownBits &LHS, const KnownBits &RHS,
-    bool CarryZero, bool CarryOne) {
-  assert(!(CarryZero && CarryOne) &&
-         "Carry can't be zero and one at the same time");
+static KnownBits computeForAddCarry(const KnownBits &LHS, const KnownBits &RHS,
+                                    bool CarryZero, bool CarryOne) {
 
   APInt PossibleSumZero = LHS.getMaxValue() + RHS.getMaxValue() + !CarryZero;
   APInt PossibleSumOne = LHS.getMinValue() + RHS.getMinValue() + CarryOne;
@@ -37,9 +34,6 @@ static KnownBits computeForAddCarry(
   APInt CarryKnownUnion = std::move(CarryKnownZero) | CarryKnownOne;
   APInt Known = std::move(LHSKnownUnion) & RHSKnownUnion & CarryKnownUnion;
 
-  assert((PossibleSumZero & Known) == (PossibleSumOne & Known) &&
-         "known bits of sum differ");
-
   // Compute known bits of the result.
   KnownBits KnownOut;
   KnownOut.Zero = ~std::move(PossibleSumZero) & Known;
@@ -134,9 +128,6 @@ KnownBits KnownBits::computeForAddSub(bool Add, bool NSW, bool NUW,
     }
   }
 
-  // Just return 0 if the nsw/nuw is violated and we have poison.
-  if (KnownOut.hasConflict())
-    KnownOut.setAllZero();
   return KnownOut;
 }
 
@@ -367,9 +358,6 @@ KnownBits KnownBits::shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW,
       break;
   }
 
-  // All shift amounts may result in poison.
-  if (Known.hasConflict())
-    Known.setAllZero();
   return Known;
 }
 
@@ -403,8 +391,7 @@ KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS,
   if (Exact) {
     unsigned FirstOne = LHS.countMaxTrailingZeros();
     if (FirstOne < MinShiftAmount) {
-      // Always poison. Return zero because we don't like returning conflict.
-      Known.setAllZero();
+      // Always poison.
       return Known;
     }
     MaxShiftAmount = std::min(MaxShiftAmount, FirstOne);
@@ -425,9 +412,6 @@ KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS,
       break;
   }
 
-  // All shift amounts may result in poison.
-  if (Known.hasConflict())
-    Known.setAllZero();
   return Known;
 }
 
@@ -448,8 +432,7 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
     MinShiftAmount = 1;
   if (LHS.isUnknown()) {
     if (MinShiftAmount == BitWidth) {
-      // Always poison. Return zero because we don't like returning conflict.
-      Known.setAllZero();
+      // Always poison.
       return Known;
     }
     return Known;
@@ -463,8 +446,7 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
   if (Exact) {
     unsigned FirstOne = LHS.countMaxTrailingZeros();
     if (FirstOne < MinShiftAmount) {
-      // Always poison. Return zero because we don't like returning conflict.
-      Known.setAllZero();
+      // Always poison.
       return Known;
     }
     MaxShiftAmount = std::min(MaxShiftAmount, FirstOne);
@@ -485,9 +467,6 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
       break;
   }
 
-  // All shift amounts may result in poison.
-  if (Known.hasConflict())
-    Known.setAllZero();
   return Known;
 }
 
@@ -936,16 +915,8 @@ static KnownBits divComputeLowBit(KnownBits Known, const KnownBits &LHS,
       // Result has exactly MinTZ trailing zeros.
       Known.One.setBit(MinTZ);
     }
-  } else if (MaxTZ < 0) {
-    // Poison Result
-    Known.setAllZero();
   }
 
-  // In the KnownBits exhaustive tests, we have poison inputs for exact values
-  // a LOT. If we have a conflict, just return all zeros.
-  if (Known.hasConflict())
-    Known.setAllZero();
-
   return Known;
 }
 
@@ -959,9 +930,7 @@ KnownBits KnownBits::sdiv(const KnownBits &LHS, const KnownBits &RHS,
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
-    // Result is either known Zero or UB. Return Zero either way.
-    // Checking this earlier saves us a lot of special cases later on.
-    Known.setAllZero();
+    // Result is either known Zero or UB.
     return Known;
   }
 
@@ -1011,9 +980,7 @@ KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
-    // Result is either known Zero or UB. Return Zero either way.
-    // Checking this earlier saves us a lot of special cases later on.
-    Known.setAllZero();
+    // Result is either known Zero or UB.
     return Known;
   }
 
diff --git a/llvm/unittests/Support/KnownBitsTest.cpp b/llvm/unittests/Support/KnownBitsTest.cpp
index 824cf7501fd44..18090dea74101 100644
--- a/llvm/unittests/Support/KnownBitsTest.cpp
+++ b/llvm/unittests/Support/KnownBitsTest.cpp
@@ -68,8 +68,9 @@ static void testUnaryOpExhaustive(StringRef Name, UnaryBitsFn BitsFn,
         }
       });
 
-      EXPECT_TRUE(!Computed.hasConflict());
-      EXPECT_TRUE(checkResult(Name, Exact, Computed, Known, CheckOptimality));
+      if (!Exact.hasConflict()) {
+        EXPECT_TRUE(checkResult(Name, Exact, Computed, Known, CheckOptimality));
+      }
     });
   }
 }
@@ -95,13 +96,9 @@ static void testBinaryOpExhaustive(StringRef Name, BinaryBitsFn BitsFn,
           });
         });
 
-        EXPECT_TRUE(!Computed.hasConflict());
-        EXPECT_TRUE(checkResult(Name, Exact, Computed, {Known1, Known2},
-                                CheckOptimality));
-        // In some cases we choose to return zero if the result is always
-        // poison.
-        if (RefinePoisonToZero && Exact.hasConflict()) {
-          EXPECT_TRUE(Computed.isZero());
+        if (!Exact.hasConflict()) {
+          EXPECT_TRUE(checkResult(Name, Exact, Computed, {Known1, Known2},
+                                  CheckOptimality));
         }
       });
     });
@@ -135,7 +132,9 @@ TEST(KnownBitsTest, AddCarryExhaustive) {
 
         KnownBits Computed =
             KnownBits::computeForAddCarry(Known1, Known2, KnownCarry);
-        EXPECT_EQ(Exact, Computed);
+        if (!Exact.hasConflict()) {
+          EXPECT_EQ(Exact, Computed);
+        }
       });
     });
   });
@@ -246,7 +245,9 @@ TEST(KnownBitsTest, SubBorrowExhaustive) {
 
         KnownBits Computed =
             KnownBits::computeForSubBorrow(Known1, Known2, KnownBorrow);
-        EXPECT_EQ(Exact, Computed);
+        if (!Exact.hasConflict()) {
+          EXPECT_EQ(Exact, Computed);
+        }
       });
     });
   });
@@ -561,6 +562,9 @@ TEST(KnownBitsTest, ICmpExhaustive) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known1) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known2) {
+      if (Known1.hasConflict() || Known2.hasConflict())
+        return;
+
       bool AllEQ = true, NoneEQ = true;
       bool AllNE = true, NoneNE = true;
       bool AllUGT = true, NoneUGT = true;
@@ -647,6 +651,9 @@ TEST(KnownBitsTest, ICmpExhaustive) {
 TEST(KnownBitsTest, GetMinMaxVal) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+    if (Known.hasConflict())
+      return;
+
     APInt Min = APInt::getMaxValue(Bits);
     APInt Max = APInt::getMinValue(Bits);
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
@@ -661,6 +668,9 @@ TEST(KnownBitsTest, GetMinMaxVal) {
 TEST(KnownBitsTest, GetSignedMinMaxVal) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+    if (Known.hasConflict())
+      return;
+
     APInt Min = APInt::getSignedMaxValue(Bits);
     APInt Max = APInt::getSignedMinValue(Bits);
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
@@ -675,6 +685,9 @@ TEST(KnownBitsTest, GetSignedMinMaxVal) {
 TEST(KnownBitsTest, CountMaxActiveBits) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+    if (Known.hasConflict())
+      return;
+
     unsigned Expected = 0;
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
       Expected = std::max(Expected, N.getActiveBits());
@@ -686,6 +699,9 @@ TEST(KnownBitsTest, CountMaxActiveBits) {
 TEST(KnownBitsTest, CountMaxSignificantBits) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+    if (Known.hasConflict())
+      return;
+
     unsigned Expected = 0;
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
       Expected = std::max(Expected, N.getSignificantBits());
@@ -726,6 +742,9 @@ TEST(KnownBitsTest, SExtInReg) {
   unsigned Bits = 4;
   for (unsigned FromBits = 1; FromBits <= Bits; ++FromBits) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+      if (Known.hasConflict())
+        return;
+
       APInt CommonOne = APInt::getAllOnes(Bits);
       APInt CommonZero = APInt::getAllOnes(Bits);
       unsigned ExtBits = Bits - FromBits;
@@ -746,6 +765,9 @@ TEST(KnownBitsTest, CommonBitsSet) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known1) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known2) {
+      if (Known1.hasConflict() || Known2.hasConflict())
+        return;
+
       bool HasCommonBitsSet = false;
       ForeachNumInKnownBits(Known1, [&](const APInt &N1) {
         ForeachNumInKnownBits(Known2, [&](const APInt &N2) {
diff --git a/llvm/unittests/Support/KnownBitsTest.h b/llvm/unittests/Support/KnownBitsTest.h
index bc291898814bd..556da2b9ecdad 100644
--- a/llvm/unittests/Support/KnownBitsTest.h
+++ b/llvm/unittests/Support/KnownBitsTest.h
@@ -26,9 +26,6 @@ template <typename FnTy> void ForeachKnownBits(unsigned Bits, FnTy Fn) {
     for (unsigned One = 0; One < Max; ++One) {
       Known.Zero = Zero;
       Known.One = One;
-      if (Known.hasConflict())
-        continue;
-
       Fn(Known);
     }
   }

From 7cfe894781e2f1280794a25db9ff3d7593815e28 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 21:02:26 +0800
Subject: [PATCH 06/16] remove a test arg

---
 llvm/unittests/Support/KnownBitsTest.cpp | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/llvm/unittests/Support/KnownBitsTest.cpp b/llvm/unittests/Support/KnownBitsTest.cpp
index 18090dea74101..1a81b1b928808 100644
--- a/llvm/unittests/Support/KnownBitsTest.cpp
+++ b/llvm/unittests/Support/KnownBitsTest.cpp
@@ -77,8 +77,7 @@ static void testUnaryOpExhaustive(StringRef Name, UnaryBitsFn BitsFn,
 
 static void testBinaryOpExhaustive(StringRef Name, BinaryBitsFn BitsFn,
                                    BinaryIntFn IntFn,
-                                   bool CheckOptimality = true,
-                                   bool RefinePoisonToZero = false) {
+                                   bool CheckOptimality = true) {
   for (unsigned Bits : {1, 4}) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known1) {
       ForeachKnownBits(Bits, [&](const KnownBits &Known2) {
@@ -395,7 +394,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return N1.shl(N2);
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "ushl_ov",
       [](const KnownBits &Known1, const KnownBits &Known2) {
@@ -408,7 +407,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return Res;
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "shl nsw",
       [](const KnownBits &Known1, const KnownBits &Known2) {
@@ -421,7 +420,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return Res;
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "shl nuw",
       [](const KnownBits &Known1, const KnownBits &Known2) {
@@ -435,7 +434,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return Res;
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
 
   testBinaryOpExhaustive(
       "lshr",
@@ -447,7 +446,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return N1.lshr(N2);
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "lshr exact",
       [](const KnownBits &Known1, const KnownBits &Known2) {
@@ -461,7 +460,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return N1.lshr(N2);
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "ashr",
       [](const KnownBits &Known1, const KnownBits &Known2) {
@@ -472,7 +471,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return N1.ashr(N2);
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "ashr exact",
       [](const KnownBits &Known1, const KnownBits &Known2) {
@@ -486,7 +485,7 @@ TEST(KnownBitsTest, BinaryExhaustive) {
           return std::nullopt;
         return N1.ashr(N2);
       },
-      /*CheckOptimality=*/true, /* RefinePoisonToZero */ true);
+      /*CheckOptimality=*/true);
   testBinaryOpExhaustive(
       "mul",
       [](const KnownBits &Known1, const KnownBits &Known2) {

From 4e550dc64e61cd938944219b9a66ff25f30c6a43 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Thu, 6 Jun 2024 23:21:45 +0800
Subject: [PATCH 07/16] fix test in DemandBitsTest

---
 llvm/unittests/IR/DemandedBitsTest.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/unittests/IR/DemandedBitsTest.cpp b/llvm/unittests/IR/DemandedBitsTest.cpp
index 4d15e81899612..aa7607c3dc81a 100644
--- a/llvm/unittests/IR/DemandedBitsTest.cpp
+++ b/llvm/unittests/IR/DemandedBitsTest.cpp
@@ -38,8 +38,10 @@ static void TestBinOpExhaustive(Fn1 PropagateFn, Fn2 EvalFn) {
 
           APInt AB1R = PropagateFn(0, AOut, Known1Redacted, Known2Redacted);
           APInt AB2R = PropagateFn(1, AOut, Known1Redacted, Known2Redacted);
-          EXPECT_EQ(AB1, AB1R);
-          EXPECT_EQ(AB2, AB2R);
+          if (!Known1Redacted.hasConflict() && !Known2Redacted.hasConflict()) {
+              EXPECT_EQ(AB1, AB1R);
+              EXPECT_EQ(AB2, AB2R);
+          }
         }
         ForeachNumInKnownBits(Known1, [&](APInt Value1) {
           ForeachNumInKnownBits(Known2, [&](APInt Value2) {

From 5896305102a49063193ead4c436f875cdd73abe2 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 00:01:26 +0800
Subject: [PATCH 08/16] adjust ValueTrackingTest(revert D150648)

---
 llvm/unittests/Analysis/ValueTrackingTest.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/unittests/Analysis/ValueTrackingTest.cpp b/llvm/unittests/Analysis/ValueTrackingTest.cpp
index a30db468c7729..d24cacc6f53a5 100644
--- a/llvm/unittests/Analysis/ValueTrackingTest.cpp
+++ b/llvm/unittests/Analysis/ValueTrackingTest.cpp
@@ -694,7 +694,7 @@ TEST_F(ValueTrackingTest, ComputeNumSignBits_PR32045) {
       "  %A = ashr i32 %a, -1\n"
       "  ret i32 %A\n"
       "}\n");
-  EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 32u);
+  EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 1u);
 }
 
 // No guarantees for canonical IR in this analysis, so this just bails out.

From afd21236d986d52c16f0a01f6201b5dd9e90712b Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 00:11:32 +0800
Subject: [PATCH 09/16] clang-format

---
 llvm/unittests/IR/DemandedBitsTest.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/unittests/IR/DemandedBitsTest.cpp b/llvm/unittests/IR/DemandedBitsTest.cpp
index aa7607c3dc81a..b52173412a99a 100644
--- a/llvm/unittests/IR/DemandedBitsTest.cpp
+++ b/llvm/unittests/IR/DemandedBitsTest.cpp
@@ -39,8 +39,8 @@ static void TestBinOpExhaustive(Fn1 PropagateFn, Fn2 EvalFn) {
           APInt AB1R = PropagateFn(0, AOut, Known1Redacted, Known2Redacted);
           APInt AB2R = PropagateFn(1, AOut, Known1Redacted, Known2Redacted);
           if (!Known1Redacted.hasConflict() && !Known2Redacted.hasConflict()) {
-              EXPECT_EQ(AB1, AB1R);
-              EXPECT_EQ(AB2, AB2R);
+            EXPECT_EQ(AB1, AB1R);
+            EXPECT_EQ(AB2, AB2R);
           }
         }
         ForeachNumInKnownBits(Known1, [&](APInt Value1) {

From 3faba75f2903d9958fec9dfdf38e1f942c251ce5 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 12:48:11 +0800
Subject: [PATCH 10/16] regen test

---
 llvm/test/Analysis/ScalarEvolution/ashr.ll           |  2 +-
 llvm/test/Analysis/ScalarEvolution/pr76234.ll        |  4 ++--
 .../form-bitfield-extract-from-sextinreg.mir         |  9 ++++-----
 llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll            |  8 ++++----
 .../Transforms/InstCombine/select-obo-peo-ops.ll     | 12 ++++++++++--
 .../lsr-term-fold-negative-testcase.ll               |  2 +-
 6 files changed, 22 insertions(+), 15 deletions(-)

diff --git a/llvm/test/Analysis/ScalarEvolution/ashr.ll b/llvm/test/Analysis/ScalarEvolution/ashr.ll
index 07e23cc1dcabe..7861ae32cba2b 100644
--- a/llvm/test/Analysis/ScalarEvolution/ashr.ll
+++ b/llvm/test/Analysis/ScalarEvolution/ashr.ll
@@ -51,7 +51,7 @@ define i32 @t4(i32 %x, i32 %y) {
 ; CHECK-LABEL: 't4'
 ; CHECK-NEXT:  Classifying expressions for: @t4
 ; CHECK-NEXT:    %i0 = ashr exact i32 %x, 32
-; CHECK-NEXT:    --> %i0 U: [0,1) S: [0,1)
+; CHECK-NEXT:    --> %i0 U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @t4
 ;
   %i0 = ashr exact i32 %x, 32
diff --git a/llvm/test/Analysis/ScalarEvolution/pr76234.ll b/llvm/test/Analysis/ScalarEvolution/pr76234.ll
index bdc5a4ce3d583..85d4e5f2cb1b1 100644
--- a/llvm/test/Analysis/ScalarEvolution/pr76234.ll
+++ b/llvm/test/Analysis/ScalarEvolution/pr76234.ll
@@ -6,9 +6,9 @@ define i32 @PR76234() {
 ; CHECK-LABEL: 'PR76234'
 ; CHECK-NEXT:  Classifying expressions for: @PR76234
 ; CHECK-NEXT:    %B9 = shl i896 0, -264147265567832623176169892458258303259423663018060761063980354513336951278362429737208627943828593947337197496628564339441173779751342768625269489231469788454193341999502542084365758838213220526512116454105594202074014146375780869419198449383518238244769290448868999168
-; CHECK-NEXT:    --> %B9 U: [0,1) S: [0,1)
+; CHECK-NEXT:    --> %B9 U: full-set S: full-set
 ; CHECK-NEXT:    %B39 = ashr i896 %B9, 1
-; CHECK-NEXT:    --> %B39 U: [0,1) S: [0,1) Exits: <<Unknown>> LoopDispositions: { %1: Variant }
+; CHECK-NEXT:    --> %B39 U: [-132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584,132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584) S: [-132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584,132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584) Exits: <<Unknown>> LoopDispositions: { %1: Variant }
 ; CHECK-NEXT:  Determining loop execution counts for: @PR76234
 ; CHECK-NEXT:  Loop %1: <multiple exits> Unpredictable backedge-taken count.
 ; CHECK-NEXT:  Loop %1: Unpredictable constant max backedge-taken count.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
index 8f9ca8ec538d1..16f3f13cc0cd0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
@@ -60,7 +60,6 @@ legalized: true
 body:             |
   bb.0:
     liveins: $w0
-    ; AArch64 needs a constant on the shift for this combine.
 
     ; CHECK-LABEL: name: dont_apply_no_constant
     ; CHECK: liveins: $w0
@@ -87,7 +86,6 @@ body:             |
   bb.0:
     liveins: $w0
 
-    ; LSB must be in 0-31.
 
     ; CHECK-LABEL: name: dont_apply_shift_imm_too_large
     ; CHECK: liveins: $w0
@@ -95,7 +93,8 @@ body:             |
     ; CHECK-NEXT: %x:_(s32) = COPY $w0
     ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 32
     ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)
-    ; CHECK-NEXT: $w0 = COPY %shift(s32)
+    ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1
+    ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)
     ; CHECK-NEXT: RET_ReallyLR implicit $w0
     %x:_(s32) = COPY $w0
     %lsb:_(s32) = G_CONSTANT i32 32
@@ -113,7 +112,6 @@ body:             |
   bb.0:
     liveins: $w0
 
-    ; LSB must be in 0-31.
 
     ; CHECK-LABEL: name: dont_apply_negative_shift_imm
     ; CHECK: liveins: $w0
@@ -121,7 +119,8 @@ body:             |
     ; CHECK-NEXT: %x:_(s32) = COPY $w0
     ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 -1
     ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)
-    ; CHECK-NEXT: $w0 = COPY %shift(s32)
+    ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1
+    ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)
     ; CHECK-NEXT: RET_ReallyLR implicit $w0
     %x:_(s32) = COPY $w0
     %lsb:_(s32) = G_CONSTANT i32 -1
diff --git a/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll b/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
index 7b9b130e1cf79..40546494ad5e0 100644
--- a/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
+++ b/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
@@ -138,7 +138,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; CI-NEXT:    s_load_dword s0, s[0:1], 0x0
 ; CI-NEXT:    s_mov_b64 vcc, 0
 ; CI-NEXT:    v_mov_b32_e32 v1, 0x7b
-; CI-NEXT:    v_mov_b32_e32 v2, 0
+; CI-NEXT:    v_mov_b32_e32 v2, -1
 ; CI-NEXT:    s_mov_b32 m0, -1
 ; CI-NEXT:    s_waitcnt lgkmcnt(0)
 ; CI-NEXT:    v_mov_b32_e32 v0, s0
@@ -157,7 +157,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; GFX9-NEXT:    s_load_dword s0, s[0:1], 0x0
 ; GFX9-NEXT:    s_mov_b64 vcc, 0
 ; GFX9-NEXT:    v_mov_b32_e32 v3, 0x7b
-; GFX9-NEXT:    v_mov_b32_e32 v4, 0
+; GFX9-NEXT:    v_mov_b32_e32 v4, -1
 ; GFX9-NEXT:    ds_write_b32 v4, v3
 ; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX9-NEXT:    v_mov_b32_e32 v0, s0
@@ -174,7 +174,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; GFX10-NEXT:    s_mov_b32 vcc_lo, 0
 ; GFX10-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-NEXT:    v_mov_b32_e32 v2, 0x7b
-; GFX10-NEXT:    v_mov_b32_e32 v3, 0
+; GFX10-NEXT:    v_mov_b32_e32 v3, -1
 ; GFX10-NEXT:    v_mov_b32_e32 v1, 0
 ; GFX10-NEXT:    ds_write_b32 v3, v2
 ; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
@@ -188,7 +188,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; GFX11-NEXT:    s_load_b32 s0, s[0:1], 0x0
 ; GFX11-NEXT:    s_mov_b32 vcc_lo, 0
 ; GFX11-NEXT:    v_mov_b32_e32 v0, 0
-; GFX11-NEXT:    v_dual_mov_b32 v2, 0x7b :: v_dual_mov_b32 v3, 0
+; GFX11-NEXT:    v_dual_mov_b32 v2, 0x7b :: v_dual_mov_b32 v3, -1
 ; GFX11-NEXT:    v_mov_b32_e32 v1, 0
 ; GFX11-NEXT:    ds_store_b32 v3, v2
 ; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
diff --git a/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll b/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll
index 4bc94d26e8758..bb24fbf036423 100644
--- a/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll
+++ b/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll
@@ -139,7 +139,11 @@ define i64 @test_shl__nuw_is_safe(i32 %x, i64 %y) {
 
 define i32 @test_shl_nuw_nsw__nsw_is_safe(i32 %x) {
 ; CHECK-LABEL: @test_shl_nuw_nsw__nsw_is_safe(
-; CHECK-NEXT:    ret i32 0
+; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[X:%.*]], -83886080
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], -83886079
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[TMP2]], i32 335544316, i32 1
+; CHECK-NEXT:    [[DOTNEG1:%.*]] = mul i32 [[DOTNEG]], [[TMP1]]
+; CHECK-NEXT:    ret i32 [[DOTNEG1]]
 ;
   %1 = or i32 %x, -83886080
   %2 = icmp eq i32 %1, -83886079
@@ -152,7 +156,11 @@ define i32 @test_shl_nuw_nsw__nsw_is_safe(i32 %x) {
 
 define i32 @test_shl_nuw__nsw_is_safe(i32 %x) {
 ; CHECK-LABEL: @test_shl_nuw__nsw_is_safe(
-; CHECK-NEXT:    ret i32 0
+; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[X:%.*]], -83886080
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], -83886079
+; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[TMP2]], i32 335544316, i32 1
+; CHECK-NEXT:    [[DOTNEG1:%.*]] = mul i32 [[DOTNEG]], [[TMP1]]
+; CHECK-NEXT:    ret i32 [[DOTNEG1]]
 ;
   %1 = or i32 %x, -83886080
   %2 = icmp eq i32 %1, -83886079
diff --git a/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll b/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
index 2d3d3a4b72a1a..7c0b57708a721 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
@@ -370,7 +370,7 @@ define i64 @alac_seek(ptr %0) {
 ; CHECK-SAME: (ptr [[TMP0:%.*]]) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[DIV:%.*]] = udiv i64 1, 0
-; CHECK-NEXT:    [[TMP1:%.*]] = add nuw nsw i64 [[DIV]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[DIV]], 1
 ; CHECK-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, ptr [[TMP0]], i64 12
 ; CHECK-NEXT:    br label [[FOR_BODY_I:%.*]]
 ; CHECK:       for.body.i:

From 1f7034cf24cea65f653cd0be0db1f667bfc70593 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 14:32:51 +0800
Subject: [PATCH 11/16] refactor test

---
 llvm/unittests/Support/KnownBitsTest.cpp | 56 +++++++++++-------------
 1 file changed, 25 insertions(+), 31 deletions(-)

diff --git a/llvm/unittests/Support/KnownBitsTest.cpp b/llvm/unittests/Support/KnownBitsTest.cpp
index 1a81b1b928808..51e780c42af27 100644
--- a/llvm/unittests/Support/KnownBitsTest.cpp
+++ b/llvm/unittests/Support/KnownBitsTest.cpp
@@ -561,9 +561,6 @@ TEST(KnownBitsTest, ICmpExhaustive) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known1) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known2) {
-      if (Known1.hasConflict() || Known2.hasConflict())
-        return;
-
       bool AllEQ = true, NoneEQ = true;
       bool AllNE = true, NoneNE = true;
       bool AllUGT = true, NoneUGT = true;
@@ -611,6 +608,9 @@ TEST(KnownBitsTest, ICmpExhaustive) {
       std::optional<bool> KnownSLT = KnownBits::slt(Known1, Known2);
       std::optional<bool> KnownSLE = KnownBits::sle(Known1, Known2);
 
+      if (Known1.hasConflict() || Known2.hasConflict())
+        return;
+
       EXPECT_EQ(AllEQ || NoneEQ, KnownEQ.has_value());
       EXPECT_EQ(AllNE || NoneNE, KnownNE.has_value());
       EXPECT_EQ(AllUGT || NoneUGT, KnownUGT.has_value());
@@ -650,62 +650,58 @@ TEST(KnownBitsTest, ICmpExhaustive) {
 TEST(KnownBitsTest, GetMinMaxVal) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
-    if (Known.hasConflict())
-      return;
-
     APInt Min = APInt::getMaxValue(Bits);
     APInt Max = APInt::getMinValue(Bits);
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
       Min = APIntOps::umin(Min, N);
       Max = APIntOps::umax(Max, N);
     });
-    EXPECT_EQ(Min, Known.getMinValue());
-    EXPECT_EQ(Max, Known.getMaxValue());
+    if (!Known.hasConflict()) {
+      EXPECT_EQ(Min, Known.getMinValue());
+      EXPECT_EQ(Max, Known.getMaxValue());
+    }
   });
 }
 
 TEST(KnownBitsTest, GetSignedMinMaxVal) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
-    if (Known.hasConflict())
-      return;
-
     APInt Min = APInt::getSignedMaxValue(Bits);
     APInt Max = APInt::getSignedMinValue(Bits);
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
       Min = APIntOps::smin(Min, N);
       Max = APIntOps::smax(Max, N);
     });
-    EXPECT_EQ(Min, Known.getSignedMinValue());
-    EXPECT_EQ(Max, Known.getSignedMaxValue());
+    if (!Known.hasConflict()) {
+      EXPECT_EQ(Min, Known.getSignedMinValue());
+      EXPECT_EQ(Max, Known.getSignedMaxValue());
+    }
   });
 }
 
 TEST(KnownBitsTest, CountMaxActiveBits) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
-    if (Known.hasConflict())
-      return;
-
     unsigned Expected = 0;
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
       Expected = std::max(Expected, N.getActiveBits());
     });
-    EXPECT_EQ(Expected, Known.countMaxActiveBits());
+    if (!Known.hasConflict()) {
+      EXPECT_EQ(Expected, Known.countMaxActiveBits());
+    }
   });
 }
 
 TEST(KnownBitsTest, CountMaxSignificantBits) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known) {
-    if (Known.hasConflict())
-      return;
-
     unsigned Expected = 0;
     ForeachNumInKnownBits(Known, [&](const APInt &N) {
       Expected = std::max(Expected, N.getSignificantBits());
     });
-    EXPECT_EQ(Expected, Known.countMaxSignificantBits());
+    if (!Known.hasConflict()) {
+      EXPECT_EQ(Expected, Known.countMaxSignificantBits());
+    }
   });
 }
 
@@ -741,9 +737,6 @@ TEST(KnownBitsTest, SExtInReg) {
   unsigned Bits = 4;
   for (unsigned FromBits = 1; FromBits <= Bits; ++FromBits) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known) {
-      if (Known.hasConflict())
-        return;
-
       APInt CommonOne = APInt::getAllOnes(Bits);
       APInt CommonZero = APInt::getAllOnes(Bits);
       unsigned ExtBits = Bits - FromBits;
@@ -754,8 +747,10 @@ TEST(KnownBitsTest, SExtInReg) {
         CommonZero &= ~Ext;
       });
       KnownBits KnownSExtInReg = Known.sextInReg(FromBits);
-      EXPECT_EQ(CommonOne, KnownSExtInReg.One);
-      EXPECT_EQ(CommonZero, KnownSExtInReg.Zero);
+      if (!Known.hasConflict()) {
+        EXPECT_EQ(CommonOne, KnownSExtInReg.One);
+        EXPECT_EQ(CommonZero, KnownSExtInReg.Zero);
+      }
     });
   }
 }
@@ -764,17 +759,16 @@ TEST(KnownBitsTest, CommonBitsSet) {
   unsigned Bits = 4;
   ForeachKnownBits(Bits, [&](const KnownBits &Known1) {
     ForeachKnownBits(Bits, [&](const KnownBits &Known2) {
-      if (Known1.hasConflict() || Known2.hasConflict())
-        return;
-
       bool HasCommonBitsSet = false;
       ForeachNumInKnownBits(Known1, [&](const APInt &N1) {
         ForeachNumInKnownBits(Known2, [&](const APInt &N2) {
           HasCommonBitsSet |= N1.intersects(N2);
         });
       });
-      EXPECT_EQ(!HasCommonBitsSet,
-                KnownBits::haveNoCommonBitsSet(Known1, Known2));
+      if (!Known1.hasConflict() && !Known2.hasConflict()) {
+        EXPECT_EQ(!HasCommonBitsSet,
+                  KnownBits::haveNoCommonBitsSet(Known1, Known2));
+      }
     });
   });
 }

From 4c9696ad1e93b65bb7bbbb12eeef86eb639480b8 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 18:21:10 +0800
Subject: [PATCH 12/16] revert some setZero

---
 llvm/lib/Support/KnownBits.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index 4bf8224401cd0..fca48ed44ca25 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -391,7 +391,8 @@ KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS,
   if (Exact) {
     unsigned FirstOne = LHS.countMaxTrailingZeros();
     if (FirstOne < MinShiftAmount) {
-      // Always poison.
+      // Always poison. Return zero because we don't like returning conflict.
+        Known.setAllZero();
       return Known;
     }
     MaxShiftAmount = std::min(MaxShiftAmount, FirstOne);
@@ -980,7 +981,8 @@ KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
-    // Result is either known Zero or UB.
+      // Result is either known Zero or UB. Return Zero either way.
+      Known.setAllZero();
     return Known;
   }
 

From 7f965e2643f57285b0f6465bddddc211393335d3 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 18:24:38 +0800
Subject: [PATCH 13/16] format

---
 llvm/lib/Support/KnownBits.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index fca48ed44ca25..4bd65635f1ba0 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -392,7 +392,7 @@ KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS,
     unsigned FirstOne = LHS.countMaxTrailingZeros();
     if (FirstOne < MinShiftAmount) {
       // Always poison. Return zero because we don't like returning conflict.
-        Known.setAllZero();
+      Known.setAllZero();
       return Known;
     }
     MaxShiftAmount = std::min(MaxShiftAmount, FirstOne);
@@ -981,8 +981,8 @@ KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
-      // Result is either known Zero or UB. Return Zero either way.
-      Known.setAllZero();
+    // Result is either known Zero or UB. Return Zero either way.
+    Known.setAllZero();
     return Known;
   }
 

From 6f48b468d65d9bb970d856238b76a0c46eefdcc9 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 18:30:38 +0800
Subject: [PATCH 14/16] revert some setZero

---
 llvm/lib/Support/KnownBits.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index 4bd65635f1ba0..67eeefe904665 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -433,7 +433,8 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
     MinShiftAmount = 1;
   if (LHS.isUnknown()) {
     if (MinShiftAmount == BitWidth) {
-      // Always poison.
+      // Always poison. Return zero because we don't like returning conflict.
+      Known.setAllZero();
       return Known;
     }
     return Known;
@@ -447,7 +448,8 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
   if (Exact) {
     unsigned FirstOne = LHS.countMaxTrailingZeros();
     if (FirstOne < MinShiftAmount) {
-      // Always poison.
+      // Always poison. Return zero because we don't like returning conflict.
+      Known.setAllZero();
       return Known;
     }
     MaxShiftAmount = std::min(MaxShiftAmount, FirstOne);

From cfe28788bf43d1ef58eec239458eec4b970a6b62 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 18:33:54 +0800
Subject: [PATCH 15/16] revert testcase

---
 llvm/test/Analysis/ScalarEvolution/ashr.ll           |  2 +-
 llvm/test/Analysis/ScalarEvolution/pr76234.ll        |  4 ++--
 .../form-bitfield-extract-from-sextinreg.mir         |  9 +++++----
 llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll            |  8 ++++----
 .../Transforms/InstCombine/select-obo-peo-ops.ll     | 12 ++----------
 .../lsr-term-fold-negative-testcase.ll               |  2 +-
 6 files changed, 15 insertions(+), 22 deletions(-)

diff --git a/llvm/test/Analysis/ScalarEvolution/ashr.ll b/llvm/test/Analysis/ScalarEvolution/ashr.ll
index 7861ae32cba2b..07e23cc1dcabe 100644
--- a/llvm/test/Analysis/ScalarEvolution/ashr.ll
+++ b/llvm/test/Analysis/ScalarEvolution/ashr.ll
@@ -51,7 +51,7 @@ define i32 @t4(i32 %x, i32 %y) {
 ; CHECK-LABEL: 't4'
 ; CHECK-NEXT:  Classifying expressions for: @t4
 ; CHECK-NEXT:    %i0 = ashr exact i32 %x, 32
-; CHECK-NEXT:    --> %i0 U: full-set S: full-set
+; CHECK-NEXT:    --> %i0 U: [0,1) S: [0,1)
 ; CHECK-NEXT:  Determining loop execution counts for: @t4
 ;
   %i0 = ashr exact i32 %x, 32
diff --git a/llvm/test/Analysis/ScalarEvolution/pr76234.ll b/llvm/test/Analysis/ScalarEvolution/pr76234.ll
index 85d4e5f2cb1b1..bdc5a4ce3d583 100644
--- a/llvm/test/Analysis/ScalarEvolution/pr76234.ll
+++ b/llvm/test/Analysis/ScalarEvolution/pr76234.ll
@@ -6,9 +6,9 @@ define i32 @PR76234() {
 ; CHECK-LABEL: 'PR76234'
 ; CHECK-NEXT:  Classifying expressions for: @PR76234
 ; CHECK-NEXT:    %B9 = shl i896 0, -264147265567832623176169892458258303259423663018060761063980354513336951278362429737208627943828593947337197496628564339441173779751342768625269489231469788454193341999502542084365758838213220526512116454105594202074014146375780869419198449383518238244769290448868999168
-; CHECK-NEXT:    --> %B9 U: full-set S: full-set
+; CHECK-NEXT:    --> %B9 U: [0,1) S: [0,1)
 ; CHECK-NEXT:    %B39 = ashr i896 %B9, 1
-; CHECK-NEXT:    --> %B39 U: [-132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584,132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584) S: [-132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584,132073632783916311588084946229129151629711831509030380531990177256668475639181214868604313971914296973668598748314282169720586889875671384312634744615734894227096670999751271042182879419106610263256058227052797101037007073187890434709599224691759119122384645224434499584) Exits: <<Unknown>> LoopDispositions: { %1: Variant }
+; CHECK-NEXT:    --> %B39 U: [0,1) S: [0,1) Exits: <<Unknown>> LoopDispositions: { %1: Variant }
 ; CHECK-NEXT:  Determining loop execution counts for: @PR76234
 ; CHECK-NEXT:  Loop %1: <multiple exits> Unpredictable backedge-taken count.
 ; CHECK-NEXT:  Loop %1: Unpredictable constant max backedge-taken count.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
index 16f3f13cc0cd0..8f9ca8ec538d1 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-sextinreg.mir
@@ -60,6 +60,7 @@ legalized: true
 body:             |
   bb.0:
     liveins: $w0
+    ; AArch64 needs a constant on the shift for this combine.
 
     ; CHECK-LABEL: name: dont_apply_no_constant
     ; CHECK: liveins: $w0
@@ -86,6 +87,7 @@ body:             |
   bb.0:
     liveins: $w0
 
+    ; LSB must be in 0-31.
 
     ; CHECK-LABEL: name: dont_apply_shift_imm_too_large
     ; CHECK: liveins: $w0
@@ -93,8 +95,7 @@ body:             |
     ; CHECK-NEXT: %x:_(s32) = COPY $w0
     ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 32
     ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)
-    ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1
-    ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)
+    ; CHECK-NEXT: $w0 = COPY %shift(s32)
     ; CHECK-NEXT: RET_ReallyLR implicit $w0
     %x:_(s32) = COPY $w0
     %lsb:_(s32) = G_CONSTANT i32 32
@@ -112,6 +113,7 @@ body:             |
   bb.0:
     liveins: $w0
 
+    ; LSB must be in 0-31.
 
     ; CHECK-LABEL: name: dont_apply_negative_shift_imm
     ; CHECK: liveins: $w0
@@ -119,8 +121,7 @@ body:             |
     ; CHECK-NEXT: %x:_(s32) = COPY $w0
     ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 -1
     ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)
-    ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1
-    ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)
+    ; CHECK-NEXT: $w0 = COPY %shift(s32)
     ; CHECK-NEXT: RET_ReallyLR implicit $w0
     %x:_(s32) = COPY $w0
     %lsb:_(s32) = G_CONSTANT i32 -1
diff --git a/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll b/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
index 40546494ad5e0..7b9b130e1cf79 100644
--- a/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
+++ b/llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
@@ -138,7 +138,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; CI-NEXT:    s_load_dword s0, s[0:1], 0x0
 ; CI-NEXT:    s_mov_b64 vcc, 0
 ; CI-NEXT:    v_mov_b32_e32 v1, 0x7b
-; CI-NEXT:    v_mov_b32_e32 v2, -1
+; CI-NEXT:    v_mov_b32_e32 v2, 0
 ; CI-NEXT:    s_mov_b32 m0, -1
 ; CI-NEXT:    s_waitcnt lgkmcnt(0)
 ; CI-NEXT:    v_mov_b32_e32 v0, s0
@@ -157,7 +157,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; GFX9-NEXT:    s_load_dword s0, s[0:1], 0x0
 ; GFX9-NEXT:    s_mov_b64 vcc, 0
 ; GFX9-NEXT:    v_mov_b32_e32 v3, 0x7b
-; GFX9-NEXT:    v_mov_b32_e32 v4, -1
+; GFX9-NEXT:    v_mov_b32_e32 v4, 0
 ; GFX9-NEXT:    ds_write_b32 v4, v3
 ; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX9-NEXT:    v_mov_b32_e32 v0, s0
@@ -174,7 +174,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; GFX10-NEXT:    s_mov_b32 vcc_lo, 0
 ; GFX10-NEXT:    v_mov_b32_e32 v0, 0
 ; GFX10-NEXT:    v_mov_b32_e32 v2, 0x7b
-; GFX10-NEXT:    v_mov_b32_e32 v3, -1
+; GFX10-NEXT:    v_mov_b32_e32 v3, 0
 ; GFX10-NEXT:    v_mov_b32_e32 v1, 0
 ; GFX10-NEXT:    ds_write_b32 v3, v2
 ; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
@@ -188,7 +188,7 @@ define amdgpu_kernel void @write_ds_sub_max_offset_global_clamp_bit(float %dummy
 ; GFX11-NEXT:    s_load_b32 s0, s[0:1], 0x0
 ; GFX11-NEXT:    s_mov_b32 vcc_lo, 0
 ; GFX11-NEXT:    v_mov_b32_e32 v0, 0
-; GFX11-NEXT:    v_dual_mov_b32 v2, 0x7b :: v_dual_mov_b32 v3, -1
+; GFX11-NEXT:    v_dual_mov_b32 v2, 0x7b :: v_dual_mov_b32 v3, 0
 ; GFX11-NEXT:    v_mov_b32_e32 v1, 0
 ; GFX11-NEXT:    ds_store_b32 v3, v2
 ; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
diff --git a/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll b/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll
index bb24fbf036423..4bc94d26e8758 100644
--- a/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll
+++ b/llvm/test/Transforms/InstCombine/select-obo-peo-ops.ll
@@ -139,11 +139,7 @@ define i64 @test_shl__nuw_is_safe(i32 %x, i64 %y) {
 
 define i32 @test_shl_nuw_nsw__nsw_is_safe(i32 %x) {
 ; CHECK-LABEL: @test_shl_nuw_nsw__nsw_is_safe(
-; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[X:%.*]], -83886080
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], -83886079
-; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[TMP2]], i32 335544316, i32 1
-; CHECK-NEXT:    [[DOTNEG1:%.*]] = mul i32 [[DOTNEG]], [[TMP1]]
-; CHECK-NEXT:    ret i32 [[DOTNEG1]]
+; CHECK-NEXT:    ret i32 0
 ;
   %1 = or i32 %x, -83886080
   %2 = icmp eq i32 %1, -83886079
@@ -156,11 +152,7 @@ define i32 @test_shl_nuw_nsw__nsw_is_safe(i32 %x) {
 
 define i32 @test_shl_nuw__nsw_is_safe(i32 %x) {
 ; CHECK-LABEL: @test_shl_nuw__nsw_is_safe(
-; CHECK-NEXT:    [[TMP1:%.*]] = or i32 [[X:%.*]], -83886080
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i32 [[TMP1]], -83886079
-; CHECK-NEXT:    [[DOTNEG:%.*]] = select i1 [[TMP2]], i32 335544316, i32 1
-; CHECK-NEXT:    [[DOTNEG1:%.*]] = mul i32 [[DOTNEG]], [[TMP1]]
-; CHECK-NEXT:    ret i32 [[DOTNEG1]]
+; CHECK-NEXT:    ret i32 0
 ;
   %1 = or i32 %x, -83886080
   %2 = icmp eq i32 %1, -83886079
diff --git a/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll b/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
index 7c0b57708a721..2d3d3a4b72a1a 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
@@ -370,7 +370,7 @@ define i64 @alac_seek(ptr %0) {
 ; CHECK-SAME: (ptr [[TMP0:%.*]]) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[DIV:%.*]] = udiv i64 1, 0
-; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[DIV]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = add nuw nsw i64 [[DIV]], 1
 ; CHECK-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, ptr [[TMP0]], i64 12
 ; CHECK-NEXT:    br label [[FOR_BODY_I:%.*]]
 ; CHECK:       for.body.i:

From f44acee2ffc98faae9ebfd918b2fe3a63fb66741 Mon Sep 17 00:00:00 2001
From: c8ef <c8ef@outlook.com>
Date: Fri, 7 Jun 2024 21:46:10 +0800
Subject: [PATCH 16/16] revert zero

---
 llvm/lib/Support/KnownBits.cpp                | 25 ++++++++++++++++++-
 llvm/unittests/Analysis/ValueTrackingTest.cpp |  2 +-
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index 67eeefe904665..e3ad1468874cd 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -128,6 +128,9 @@ KnownBits KnownBits::computeForAddSub(bool Add, bool NSW, bool NUW,
     }
   }
 
+  // Just return 0 if the nsw/nuw is violated and we have poison.
+  if (KnownOut.hasConflict())
+    KnownOut.setAllZero();
   return KnownOut;
 }
 
@@ -358,6 +361,9 @@ KnownBits KnownBits::shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW,
       break;
   }
 
+  // All shift amounts may result in poison.
+  if (Known.hasConflict())
+    Known.setAllZero();
   return Known;
 }
 
@@ -413,6 +419,9 @@ KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS,
       break;
   }
 
+  // All shift amounts may result in poison.
+  if (Known.hasConflict())
+    Known.setAllZero();
   return Known;
 }
 
@@ -470,6 +479,9 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const KnownBits &RHS,
       break;
   }
 
+  // All shift amounts may result in poison.
+  if (Known.hasConflict())
+    Known.setAllZero();
   return Known;
 }
 
@@ -918,8 +930,16 @@ static KnownBits divComputeLowBit(KnownBits Known, const KnownBits &LHS,
       // Result has exactly MinTZ trailing zeros.
       Known.One.setBit(MinTZ);
     }
+  } else if (MaxTZ < 0) {
+    // Poison Result
+    Known.setAllZero();
   }
 
+  // In the KnownBits exhaustive tests, we have poison inputs for exact values
+  // a LOT. If we have a conflict, just return all zeros.
+  if (Known.hasConflict())
+    Known.setAllZero();
+
   return Known;
 }
 
@@ -933,7 +953,9 @@ KnownBits KnownBits::sdiv(const KnownBits &LHS, const KnownBits &RHS,
   KnownBits Known(BitWidth);
 
   if (LHS.isZero() || RHS.isZero()) {
-    // Result is either known Zero or UB.
+    // Result is either known Zero or UB. Return Zero either way.
+    // Checking this earlier saves us a lot of special cases later on.
+    Known.setAllZero();
     return Known;
   }
 
@@ -984,6 +1006,7 @@ KnownBits KnownBits::udiv(const KnownBits &LHS, const KnownBits &RHS,
 
   if (LHS.isZero() || RHS.isZero()) {
     // Result is either known Zero or UB. Return Zero either way.
+    // Checking this earlier saves us a lot of special cases later on.
     Known.setAllZero();
     return Known;
   }
diff --git a/llvm/unittests/Analysis/ValueTrackingTest.cpp b/llvm/unittests/Analysis/ValueTrackingTest.cpp
index d24cacc6f53a5..a30db468c7729 100644
--- a/llvm/unittests/Analysis/ValueTrackingTest.cpp
+++ b/llvm/unittests/Analysis/ValueTrackingTest.cpp
@@ -694,7 +694,7 @@ TEST_F(ValueTrackingTest, ComputeNumSignBits_PR32045) {
       "  %A = ashr i32 %a, -1\n"
       "  ret i32 %A\n"
       "}\n");
-  EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 1u);
+  EXPECT_EQ(ComputeNumSignBits(A, M->getDataLayout()), 32u);
 }
 
 // No guarantees for canonical IR in this analysis, so this just bails out.