From 3e3f4cada63f7e99b4d8655eeece2e7cf2791898 Mon Sep 17 00:00:00 2001 From: Jannik Silvanus Date: Thu, 11 Apr 2024 17:39:28 +0200 Subject: [PATCH 1/6] [Support][YamlTraits] Factor out string quoting [nfc] Factor out string quoting from Output::scalarString to a new output(StringRef, QuotingType) helper. This prepares quoting keys. --- llvm/include/llvm/Support/YAMLTraits.h | 1 + llvm/lib/Support/YAMLTraits.cpp | 75 ++++++++++++++------------ 2 files changed, 42 insertions(+), 34 deletions(-) diff --git a/llvm/include/llvm/Support/YAMLTraits.h b/llvm/include/llvm/Support/YAMLTraits.h index 3b1f4bad57fcf..9baf3ffd814bc 100644 --- a/llvm/include/llvm/Support/YAMLTraits.h +++ b/llvm/include/llvm/Support/YAMLTraits.h @@ -1636,6 +1636,7 @@ class Output : public IO { private: void output(StringRef s); + void output(StringRef, QuotingType); void outputUpToEndOfLine(StringRef s); void newLineCheck(bool EmptySequence = false); void outputNewLine(); diff --git a/llvm/lib/Support/YAMLTraits.cpp b/llvm/lib/Support/YAMLTraits.cpp index 4aaf59be2ce50..2c35b3171f538 100644 --- a/llvm/lib/Support/YAMLTraits.cpp +++ b/llvm/lib/Support/YAMLTraits.cpp @@ -718,40 +718,8 @@ void Output::scalarString(StringRef &S, QuotingType MustQuote) { outputUpToEndOfLine("''"); return; } - if (MustQuote == QuotingType::None) { - // Only quote if we must. - outputUpToEndOfLine(S); - return; - } - - const char *const Quote = MustQuote == QuotingType::Single ? "'" : "\""; - output(Quote); // Starting quote. - - // When using double-quoted strings (and only in that case), non-printable characters may be - // present, and will be escaped using a variety of unicode-scalar and special short-form - // escapes. This is handled in yaml::escape. - if (MustQuote == QuotingType::Double) { - output(yaml::escape(S, /* EscapePrintable= */ false)); - outputUpToEndOfLine(Quote); - return; - } - - unsigned i = 0; - unsigned j = 0; - unsigned End = S.size(); - const char *Base = S.data(); - - // When using single-quoted strings, any single quote ' must be doubled to be escaped. - while (j < End) { - if (S[j] == '\'') { // Escape quotes. - output(StringRef(&Base[i], j - i)); // "flush". - output(StringLiteral("''")); // Print it as '' - i = j + 1; - } - ++j; - } - output(StringRef(&Base[i], j - i)); - outputUpToEndOfLine(Quote); // Ending quote. + output(S, MustQuote); + outputUpToEndOfLine(""); } void Output::blockScalarString(StringRef &S) { @@ -801,6 +769,45 @@ void Output::output(StringRef s) { Out << s; } +void Output::output(StringRef S, QuotingType MustQuote) { + if (MustQuote == QuotingType::None) { + // Only quote if we must. + output(S); + return; + } + + const char *const Quote = MustQuote == QuotingType::Single ? "'" : "\""; + output(Quote); // Starting quote. + + // When using double-quoted strings (and only in that case), non-printable + // characters may be present, and will be escaped using a variety of + // unicode-scalar and special short-form escapes. This is handled in + // yaml::escape. + if (MustQuote == QuotingType::Double) { + output(yaml::escape(S, /* EscapePrintable= */ false)); + output(Quote); + return; + } + + unsigned i = 0; + unsigned j = 0; + unsigned End = S.size(); + const char *Base = S.data(); + + // When using single-quoted strings, any single quote ' must be doubled to be + // escaped. + while (j < End) { + if (S[j] == '\'') { // Escape quotes. + output(StringRef(&Base[i], j - i)); // "flush". + output(StringLiteral("''")); // Print it as '' + i = j + 1; + } + ++j; + } + output(StringRef(&Base[i], j - i)); + output(Quote); // Ending quote. +} + void Output::outputUpToEndOfLine(StringRef s) { output(s); if (StateStack.empty() || (!inFlowSeqAnyElement(StateStack.back()) && From b36e26ee931ad86b406604eb032265e19170479b Mon Sep 17 00:00:00 2001 From: Jannik Silvanus Date: Thu, 11 Apr 2024 17:42:02 +0200 Subject: [PATCH 2/6] [Support][YamlTraits] Quote keys in textual YAML representation if necessary The support library contains helpers to parse and emit YAML documents. In the textual YAML representation, some strings need to be quoted, e.g. when containing unprintable characters. There are also cases where quoting isn't strictly necessary, but prevents issues in some cases, for instance strings consisting of digits only. We already have such quoting implemented for YAML values. This patch applies the same quoting to YAML *keys*. One affected case is output of control registers in AMDGPU Msgpack metadata, which are printed in a format like this: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 42 With this patch, the key is quoted: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 42 Most test changes come from this pattern. --- llvm/lib/Support/YAMLTraits.cpp | 4 +- llvm/test/CodeGen/AMDGPU/amdpal-callable.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdpal-cs.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdpal-es.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-gs.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-hs.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-ls.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll | 2 +- .../CodeGen/AMDGPU/amdpal-msgpack-default.ll | 44 +++++++------- .../CodeGen/AMDGPU/amdpal-msgpack-denormal.ll | 44 +++++++------- .../AMDGPU/amdpal-msgpack-dx10-clamp.ll | 44 +++++++------- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll | 2 +- .../CodeGen/AMDGPU/amdpal-msgpack-ieee.ll | 58 +++++++++---------- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll | 8 +-- .../CodeGen/AMDGPU/amdpal-msgpack-psenable.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll | 8 +-- .../CodeGen/AMDGPU/amdpal-usersgpr-init.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdpal-vs.ll | 2 +- llvm/test/CodeGen/AMDGPU/elf-notes.ll | 4 +- llvm/test/CodeGen/AMDGPU/extra-lds-size.ll | 4 +- llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll | 12 ++-- .../test/CodeGen/AMDGPU/wave_dispatch_regs.ll | 8 +-- llvm/test/MC/AMDGPU/pal-msgpack.s | 16 ++--- .../Transforms/LowerTypeTests/import-unsat.ll | 2 +- .../WholeProgramDevirt/branch-funnel.ll | 6 +- .../WholeProgramDevirt/export-single-impl.ll | 8 +-- .../export-uniform-ret-val.ll | 2 +- .../export-unique-ret-val.ll | 4 +- .../WholeProgramDevirt/export-vcp.ll | 4 +- .../WholeProgramDevirt/import-indir.ll | 10 ++-- 34 files changed, 164 insertions(+), 164 deletions(-) diff --git a/llvm/lib/Support/YAMLTraits.cpp b/llvm/lib/Support/YAMLTraits.cpp index 2c35b3171f538..cce01e08abd41 100644 --- a/llvm/lib/Support/YAMLTraits.cpp +++ b/llvm/lib/Support/YAMLTraits.cpp @@ -860,7 +860,7 @@ void Output::newLineCheck(bool EmptySequence) { } void Output::paddedKey(StringRef key) { - output(key); + output(key, needsQuotes(key)); output(":"); const char *spaces = " "; if (key.size() < strlen(spaces)) @@ -879,7 +879,7 @@ void Output::flowKey(StringRef Key) { Column = ColumnAtMapFlowStart; output(" "); } - output(Key); + output(Key, needsQuotes(Key)); output(": "); } diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll index b7b2cb22c1b62..9d4f9434aa314 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll @@ -142,8 +142,8 @@ attributes #0 = { nounwind } ; GCN: amdpal.pipelines: ; GCN-NEXT: - .registers: -; GCN-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf01ca{{$}} -; GCN-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): 0x8001{{$}} +; GCN-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf01ca{{$}} +; GCN-NEXT: '0x2e13 (COMPUTE_PGM_RSRC2)': 0x8001{{$}} ; GCN-NEXT: .shader_functions: ; GCN-NEXT: dynamic_stack: ; GCN-NEXT: .backend_stack_size: 0x10{{$}} diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll index 98aa04f6d26e1..a3fd2a942bc2b 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-cs.ll @@ -11,8 +11,8 @@ ; GCN-NEXT: .entry_point: cs_amdpal ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): -; GCN-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): +; GCN-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)': +; GCN-NEXT: '0x2e13 (COMPUTE_PGM_RSRC2)': ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_cs half @cs_amdpal(half %arg0) { diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll index 012b2061756b3..679e0858819eb 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-es.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-es.ll @@ -10,7 +10,7 @@ ; GCN-NEXT: .entry_point: es_amdpal ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0 +; GCN-NEXT: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_es half @es_amdpal(half %arg0) { diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll index e2f67398d18a9..75f7a1dc266d3 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-gs.ll @@ -11,7 +11,7 @@ ; GCN-NEXT: .entry_point: gs_amdpal ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0 +; GCN-NEXT: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_gs half @gs_amdpal(half %arg0) { diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll index 9ad47c1d604f2..c61578a967b62 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-hs.ll @@ -11,7 +11,7 @@ ; GCN-NEXT: .entry_point: hs_amdpal ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0 +; GCN-NEXT: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_hs half @hs_amdpal(half %arg0) { diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll index 8ee6f7283ce70..8162c824dc2ce 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-ls.ll @@ -10,7 +10,7 @@ ; GCN-NEXT: .entry_point: ls_amdpal ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0 +; GCN-NEXT: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_ls half @ls_amdpal(half %arg0) { diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll index 0d0c70c38aceb..5e21ba494df12 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll @@ -5,7 +5,7 @@ ; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata ; GCN-LABEL: {{^}}cs_amdpal: ; GCN: .amdgpu_pal_metadata -; GCN: 0x2e12 (COMPUTE_PGM_RSRC1) +; GCN: '0x2e12 (COMPUTE_PGM_RSRC1)' define amdgpu_cs half @cs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll index b82e3ebdde4b5..dc9a33ac01412 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll @@ -3,45 +3,45 @@ ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -enable-var-scope %s ; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata -; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2f0000{{$}} -; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2f02c0{{$}} -; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2f0000{{$}} +; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2f0000{{$}} +; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2f0000{{$}} define amdgpu_cs half @cs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata -; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2f0000{{$}} -; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2f02c0{{$}} -; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2f0000{{$}} +; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2f0000{{$}} +; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2f0000{{$}} define amdgpu_es half @es_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata -; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2f0000{{$}} -; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2f02c0{{$}} -; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2f0000{{$}} +; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2f0000{{$}} +; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2f0000{{$}} define amdgpu_gs half @gs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata -; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2f0000{{$}} -; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2f02c0{{$}} -; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2f0000{{$}} +; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2f0000{{$}} +; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2f0000{{$}} define amdgpu_hs half @hs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata -; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2f0000{{$}} -; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2f02c0{{$}} -; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2f0000{{$}} +; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2f0000{{$}} +; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2f0000{{$}} define amdgpu_ls half @ls_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add @@ -49,18 +49,18 @@ define amdgpu_ls half @ls_amdpal(half %arg0) { ; amdpal pixel shader: check for 0x2c0a (SPI_SHADER_PGM_RSRC1_PS) in pal metadata ; below. -; SI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2f0000{{$}} -; VI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2f02c0{{$}} -; GFX9-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2f0000{{$}} +; SI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2f0000{{$}} +; VI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2f0000{{$}} define amdgpu_ps half @ps_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata -; SI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2f0000{{$}} -; VI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2f02c0{{$}} -; GFX9-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2f0000{{$}} +; SI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2f0000{{$}} +; VI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2f02c0{{$}} +; GFX9-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2f0000{{$}} define amdgpu_vs half @vs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add @@ -75,7 +75,7 @@ define amdgpu_vs half @vs_amdpal(half %arg0) { ; - 0x123456789abcdef0 ; - 0xfedcba9876543210 ; .registers: -; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 +; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 ; ... ; .end_amdgpu_pal_metadata diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll index b86b428680059..ffce3ed085092 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll @@ -3,45 +3,45 @@ ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -enable-var-scope %s ; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata -; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2c0000{{$}} -; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2c02c0{{$}} -; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x2c0000{{$}} +; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2c0000{{$}} +; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x2c0000{{$}} define amdgpu_cs half @cs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata -; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2c0000{{$}} -; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2c02c0{{$}} -; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0x2c0000{{$}} +; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2c0000{{$}} +; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0x2c0000{{$}} define amdgpu_es half @es_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata -; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2c0000{{$}} -; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2c02c0{{$}} -; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0x2c0000{{$}} +; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2c0000{{$}} +; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0x2c0000{{$}} define amdgpu_gs half @gs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata -; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2c0000{{$}} -; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2c02c0{{$}} -; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x2c0000{{$}} +; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2c0000{{$}} +; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x2c0000{{$}} define amdgpu_hs half @hs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata -; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2c0000{{$}} -; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2c02c0{{$}} -; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0x2c0000{{$}} +; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2c0000{{$}} +; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0x2c0000{{$}} define amdgpu_ls half @ls_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add @@ -49,18 +49,18 @@ define amdgpu_ls half @ls_amdpal(half %arg0) #0 { ; amdpal pixel shader: check for 0x2c0a (SPI_SHADER_PGM_RSRC1_PS) in pal metadata ; below. -; SI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2c0000{{$}} -; VI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2c02c0{{$}} -; GFX9-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x2c0000{{$}} +; SI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2c0000{{$}} +; VI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x2c0000{{$}} define amdgpu_ps half @ps_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata -; SI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2c0000{{$}} -; VI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2c02c0{{$}} -; GFX9-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x2c0000{{$}} +; SI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2c0000{{$}} +; VI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2c02c0{{$}} +; GFX9-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x2c0000{{$}} define amdgpu_vs half @vs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add @@ -77,7 +77,7 @@ attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" } ; - 0x123456789abcdef0 ; - 0xfedcba9876543210 ; .registers: -; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 +; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 ; ... ; .end_amdgpu_pal_metadata diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll index b1db7aafacab0..3ea3064fa7437 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll @@ -3,45 +3,45 @@ ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -enable-var-scope %s ; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata -; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xf0000{{$}} -; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xf02c0{{$}} -; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xf0000{{$}} +; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xf0000{{$}} +; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xf02c0{{$}} +; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xf0000{{$}} define amdgpu_cs half @cs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata -; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf0000{{$}} -; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf02c0{{$}} -; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf0000{{$}} +; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf0000{{$}} +; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf02c0{{$}} +; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf0000{{$}} define amdgpu_es half @es_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata -; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xf0000{{$}} -; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xf02c0{{$}} -; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xf0000{{$}} +; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xf0000{{$}} +; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xf02c0{{$}} +; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xf0000{{$}} define amdgpu_gs half @gs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata -; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xf0000{{$}} -; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xf02c0{{$}} -; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xf0000{{$}} +; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xf0000{{$}} +; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xf02c0{{$}} +; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xf0000{{$}} define amdgpu_hs half @hs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata -; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf0000{{$}} -; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf02c0{{$}} -; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf0000{{$}} +; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xf0000{{$}} +; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xf02c0{{$}} +; GFX9-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xf0000{{$}} define amdgpu_ls half @ls_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add @@ -49,18 +49,18 @@ define amdgpu_ls half @ls_amdpal(half %arg0) #0 { ; amdpal pixel shader: check for 0x2c0a (SPI_SHADER_PGM_RSRC1_PS) in pal metadata ; below. -; SI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0xf0000{{$}} -; VI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0xf02c0{{$}} -; GFX9-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0xf0000{{$}} +; SI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0xf0000{{$}} +; VI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0xf02c0{{$}} +; GFX9-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0xf0000{{$}} define amdgpu_ps half @ps_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata -; SI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0xf0000{{$}} -; VI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0xf02c0{{$}} -; GFX9-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0xf0000{{$}} +; SI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0xf0000{{$}} +; VI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0xf02c0{{$}} +; GFX9-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0xf0000{{$}} define amdgpu_vs half @vs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add @@ -77,7 +77,7 @@ attributes #0 = { "amdgpu-dx10-clamp"="false" } ; - 0x123456789abcdef0 ; - 0xfedcba9876543210 ; .registers: -; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 +; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 ; ... ; .end_amdgpu_pal_metadata diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll index f97117f3d9091..bcc8da6e1bf44 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll @@ -4,7 +4,7 @@ ; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata ; GCN-LABEL: {{^}}es_amdpal: ; GCN: .amdgpu_pal_metadata -; GCN: 0x2cca (SPI_SHADER_PGM_RSRC1_ES) +; GCN: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)' define amdgpu_es half @es_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll index a32d10390b984..ef4c9cbd5006f 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll @@ -5,7 +5,7 @@ ; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata ; GCN-LABEL: {{^}}gs_amdpal: ; GCN: .amdgpu_pal_metadata -; GCN: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) +; GCN: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)' define amdgpu_gs half @gs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll index be08c93cdb31e..eb814c11bcebf 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll @@ -5,7 +5,7 @@ ; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata ; GCN-LABEL: {{^}}hs_amdpal: ; GCN: .amdgpu_pal_metadata -; GCN: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) +; GCN: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)' define amdgpu_hs half @hs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll index 95d533544c308..d4826a22db795 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll @@ -4,50 +4,50 @@ ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX12 -enable-var-scope %s ; amdpal compute shader: check for 0x2e12 (COMPUTE_PGM_RSRC1) in pal metadata -; SI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf0000{{$}} -; VI-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf02c0{{$}} -; GFX9-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf0000{{$}} -; GFX12-DAG: 0x2e12 (COMPUTE_PGM_RSRC1): 0x600f0000{{$}} +; SI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf0000{{$}} +; VI-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0xaf0000{{$}} +; GFX12-DAG: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x600f0000{{$}} define amdgpu_cs half @cs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal evaluation shader: check for 0x2cca (SPI_SHADER_PGM_RSRC1_ES) in pal metadata -; SI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xaf0000{{$}} -; VI-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xaf02c0{{$}} -; GFX9-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xaf0000{{$}} -; GFX12-DAG: 0x2cca (SPI_SHADER_PGM_RSRC1_ES): 0xf0000{{$}} +; SI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xaf0000{{$}} +; VI-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xaf0000{{$}} +; GFX12-DAG: '0x2cca (SPI_SHADER_PGM_RSRC1_ES)': 0xf0000{{$}} define amdgpu_es half @es_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal geometry shader: check for 0x2c8a (SPI_SHADER_PGM_RSRC1_GS) in pal metadata -; SI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xaf0000{{$}} -; VI-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xaf02c0{{$}} -; GFX9-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xaf0000{{$}} -; GFX12-DAG: 0x2c8a (SPI_SHADER_PGM_RSRC1_GS): 0xa0f0000{{$}} +; SI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xaf0000{{$}} +; VI-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xaf0000{{$}} +; GFX12-DAG: '0x2c8a (SPI_SHADER_PGM_RSRC1_GS)': 0xa0f0000{{$}} define amdgpu_gs half @gs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal hull shader: check for 0x2d0a (SPI_SHADER_PGM_RSRC1_HS) in pal metadata -; SI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xaf0000{{$}} -; VI-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xaf02c0{{$}} -; GFX9-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0xaf0000{{$}} -; GFX12-DAG: 0x2d0a (SPI_SHADER_PGM_RSRC1_HS): 0x50f0000{{$}} +; SI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xaf0000{{$}} +; VI-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0xaf0000{{$}} +; GFX12-DAG: '0x2d0a (SPI_SHADER_PGM_RSRC1_HS)': 0x50f0000{{$}} define amdgpu_hs half @hs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata -; SI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xaf0000{{$}} -; VI-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xaf02c0{{$}} -; GFX9-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xaf0000{{$}} -; GFX12-DAG: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS): 0xf0000{{$}} +; SI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xaf0000{{$}} +; VI-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xaf0000{{$}} +; GFX12-DAG: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)': 0xf0000{{$}} define amdgpu_ls half @ls_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add @@ -55,20 +55,20 @@ define amdgpu_ls half @ls_amdpal(half %arg0) #0 { ; amdpal pixel shader: check for 0x2c0a (SPI_SHADER_PGM_RSRC1_PS) in pal metadata ; below. -; SI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0xaf0000{{$}} -; VI-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0xaf02c0{{$}} -; GFX9-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0xaf0000{{$}} -; GFX12-DAG: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0x20f0000{{$}} +; SI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0xaf0000{{$}} +; VI-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0xaf0000{{$}} +; GFX12-DAG: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0x20f0000{{$}} define amdgpu_ps half @ps_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add } ; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata -; SI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0xaf0000{{$}} -; VI-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0xaf02c0{{$}} -; GFX9-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0xaf0000{{$}} -; GFX12-DAG: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0x80f0000{{$}} +; SI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0xaf0000{{$}} +; VI-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0xaf02c0{{$}} +; GFX9-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0xaf0000{{$}} +; GFX12-DAG: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0x80f0000{{$}} define amdgpu_vs half @vs_amdpal(half %arg0) #0 { %add = fadd half %arg0, 1.0 ret half %add @@ -85,7 +85,7 @@ attributes #0 = { "amdgpu-ieee"="true" } ; - 0x123456789abcdef0 ; - 0xfedcba9876543210 ; .registers: -; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 +; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 ; ... ; .end_amdgpu_pal_metadata diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll index 46097fa206088..0d81e70b2e4f8 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll @@ -4,7 +4,7 @@ ; amdpal load shader: check for 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) in pal metadata ; GCN-LABEL: {{^}}ls_amdpal: ; GCN: .amdgpu_pal_metadata -; GCN: 0x2d4a (SPI_SHADER_PGM_RSRC1_LS) +; GCN: '0x2d4a (SPI_SHADER_PGM_RSRC1_LS)' define amdgpu_ls half @ls_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll index 9169c651f1299..d31732f995b15 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll @@ -12,8 +12,8 @@ ; GCN-NEXT: - 0x123456789abcdef0 ; GCN-NEXT: - 0xfedcba9876543210 ; GCN: .registers: -; GCN: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): -; GCN: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42 +; GCN: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': +; GCN: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42 define amdgpu_ps half @ps_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add @@ -23,12 +23,12 @@ define amdgpu_ps half @ps_amdpal(half %arg0) { ; ; .amdgpu_pal_metadata ; --- -; amdpal.pipelines: +; amdpal.pipelines: ; - .internal_pipeline_hash: ; - 0x123456789abcdef0 ; - 0xfedcba9876543210 ; .registers: -; 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 +; '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 ; ... ; .end_amdgpu_pal_metadata diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll index d6322e2b4d3e3..15b1a652077e7 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll @@ -7,8 +7,8 @@ ; the workaround that ensures that an interpolation mode is also set in PSEnable. ; GCN-LABEL: {{^}}amdpal_psenable: ; GCN: .amdgpu_pal_metadata -; GCN: 0xa1b3 (SPI_PS_INPUT_ENA): 0x2 -; GCN: 0xa1b4 (SPI_PS_INPUT_ADDR): 0x2 +; GCN: '0xa1b3 (SPI_PS_INPUT_ENA)': 0x2 +; GCN: '0xa1b4 (SPI_PS_INPUT_ADDR)': 0x2 define amdgpu_ps void @amdpal_psenable(i32 inreg, i32 inreg, i32 inreg, i32 inreg %m0, <2 x float> %pos) #6 { %inst23 = extractelement <2 x float> %pos, i32 0 %inst24 = extractelement <2 x float> %pos, i32 1 diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll index 7c47129c28ceb..42de6007f7e21 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll @@ -5,7 +5,7 @@ ; amdpal vertex shader: check for 45352 (SPI_SHADER_PGM_RSRC1_VS) in pal metadata ; GCN-LABEL: {{^}}vs_amdpal: ; GCN: .amdgpu_pal_metadata -; GCN: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS) +; GCN: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)' define amdgpu_vs half @vs_amdpal(half %arg0) { %add = fadd half %arg0, 1.0 ret half %add diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll index 13d2050c491fb..ace21207a7eba 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll @@ -14,10 +14,10 @@ ; GCN-NEXT: .entry_point: amdpal_psenable ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): -; GCN-NEXT: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): -; GCN-NEXT: 0xa1b3 (SPI_PS_INPUT_ENA): 0x2 -; GCN-NEXT: 0xa1b4 (SPI_PS_INPUT_ADDR): 0x2 +; GCN-NEXT: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': +; GCN-NEXT: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': +; GCN-NEXT: '0xa1b3 (SPI_PS_INPUT_ENA)': 0x2 +; GCN-NEXT: '0xa1b4 (SPI_PS_INPUT_ADDR)': 0x2 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_ps void @amdpal_psenable(i32 inreg, i32 inreg, i32 inreg, i32 inreg %m0, <2 x float> %pos) #6 { diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll b/llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll index 52a9d57244c2c..086a126b1ddc7 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll @@ -1,7 +1,7 @@ ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -enable-var-scope %s ; We want to make sure that RSRC2 is left untouched -; GCN: 0x2e13 (COMPUTE_PGM_RSRC2): 0x78a +; GCN: '0x2e13 (COMPUTE_PGM_RSRC2)': 0x78a define amdgpu_cs half @cs_amdpal(half %arg0, half inreg %arg1) { %add = fadd half %arg0, 1.0 ret half %add @@ -9,4 +9,4 @@ define amdgpu_cs half @cs_amdpal(half %arg0, half inreg %arg1) { !amdgpu.pal.metadata.msgpack = !{!0} -!0 = !{!"\82\B0amdpal.pipelines\91\89\A4.api\A6Vulkan\B0.hardware_stages\81\A3.cs\83\AB.sgpr_limith\AB.vgpr_limit\CD\01\00\AF.wavefront_size@\B7.internal_pipeline_hash\92\CF\E83\B3\C2\D1)\7FG\CF[\8A\DF\EE[\7FD,\AA.registers\8A\CD.\07\01\CD.\08\01\CD.\09\01\CD.\12\CE@,\00\00\CD.\13\CD\07\8A\CD.(\00\CD.*\CE\16\0B\22Y\CD.@\CE\10\00\00\00\CD.B\CE\10\00\00\06\CD.D\00\A8.shaders\81\A8.compute\82\B0.api_shader_hash\92\CF\D3s\A6\8D\C5x\84\D4\00\B1.hardware_mapping\91\A3.cs\B0.spill_threshold\CE\FF\FF\FF\FF\A5.type\A2Cs\B0.user_data_limit\01\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF\E5\A0\EB\F9}\C6\C1\13\CF\1A_\E7\F7\F2.mR\AD.llpc_version\A454.5\AEamdpal.version\92\02\03"} \ No newline at end of file +!0 = !{!"\82\B0amdpal.pipelines\91\89\A4.api\A6Vulkan\B0.hardware_stages\81\A3.cs\83\AB.sgpr_limith\AB.vgpr_limit\CD\01\00\AF.wavefront_size@\B7.internal_pipeline_hash\92\CF\E83\B3\C2\D1)\7FG\CF[\8A\DF\EE[\7FD,\AA.registers\8A\CD.\07\01\CD.\08\01\CD.\09\01\CD.\12\CE@,\00\00\CD.\13\CD\07\8A\CD.(\00\CD.*\CE\16\0B\22Y\CD.@\CE\10\00\00\00\CD.B\CE\10\00\00\06\CD.D\00\A8.shaders\81\A8.compute\82\B0.api_shader_hash\92\CF\D3s\A6\8D\C5x\84\D4\00\B1.hardware_mapping\91\A3.cs\B0.spill_threshold\CE\FF\FF\FF\FF\A5.type\A2Cs\B0.user_data_limit\01\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF\E5\A0\EB\F9}\C6\C1\13\CF\1A_\E7\F7\F2.mR\AD.llpc_version\A454.5\AEamdpal.version\92\02\03"} diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll b/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll index ec8f698d69c2a..c300ba187740c 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-vs.ll @@ -11,7 +11,7 @@ ; GCN-NEXT: .entry_point: vs_amdpal ; GCN-NEXT: .scratch_memory_size: 0 ; GCN: .registers: -; GCN-NEXT: 0x2c4a (SPI_SHADER_PGM_RSRC1_VS): 0 +; GCN-NEXT: '0x2c4a (SPI_SHADER_PGM_RSRC1_VS)': 0 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata define amdgpu_vs half @vs_amdpal(half %arg0) { diff --git a/llvm/test/CodeGen/AMDGPU/elf-notes.ll b/llvm/test/CodeGen/AMDGPU/elf-notes.ll index d958dde01c3f8..58c7d12197e9b 100644 --- a/llvm/test/CodeGen/AMDGPU/elf-notes.ll +++ b/llvm/test/CodeGen/AMDGPU/elf-notes.ll @@ -71,8 +71,8 @@ ; OSABI-PAL-ELF: .sgpr_count: 96 ; OSABI-PAL-ELF: .vgpr_count: 1 ; OSABI-PAL-ELF: .registers: -; OSABI-PAL-ELF: 11794: 11469504 -; OSABI-PAL-ELF: 11795: 128 +; OSABI-PAL-ELF: '11794': 11469504 +; OSABI-PAL-ELF: '11795': 128 ; R600-NOT: .hsa_code_object_version ; R600-NOT: .hsa_code_object_isa diff --git a/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll b/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll index e376c3df1ac93..96ec90b1f4d07 100644 --- a/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll +++ b/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll @@ -5,12 +5,12 @@ ; Check EXTRA_LDS_SIZE in SPI_SHADER_PGM_RSRC2_PS. -; GFX10-PAL: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x800 +; GFX10-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x800 ; GFX10-MESA: .long 45100 ; GFX10-MESA-NEXT: .long 2048 -; GFX11-PAL: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x400 +; GFX11-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x400 ; GFX11-MESA: .long 45100 ; GFX11-MESA-NEXT: .long 1024 diff --git a/llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll b/llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll index 6d043e2b6b0ae..591deda611b2f 100644 --- a/llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll +++ b/llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll @@ -4,12 +4,12 @@ ; full tessellation-and-geometry pipeline, compiled on gfx8 so it uses all six ; hardware shader types. -; CHECK-DAG: 0x2c0c (SPI_SHADER_USER_DATA_PS_0): 0x10000000 -; CHECK-DAG: 0x2c4c (SPI_SHADER_USER_DATA_VS_0): 0x10000000 -; CHECK-DAG: 0x2c8c (SPI_SHADER_USER_DATA_GS_0): 0x10000000 -; CHECK-DAG: 0x2ccc (SPI_SHADER_USER_DATA_ES_0): 0x10000000 -; CHECK-DAG: 0x2d0c (SPI_SHADER_USER_DATA_HS_0): 0x10000000 -; CHECK-DAG: 0x2d4c (SPI_SHADER_USER_DATA_LS_0): 0x10000000 +; CHECK-DAG: '0x2c0c (SPI_SHADER_USER_DATA_PS_0)': 0x10000000 +; CHECK-DAG: '0x2c4c (SPI_SHADER_USER_DATA_VS_0)': 0x10000000 +; CHECK-DAG: '0x2c8c (SPI_SHADER_USER_DATA_GS_0)': 0x10000000 +; CHECK-DAG: '0x2ccc (SPI_SHADER_USER_DATA_ES_0)': 0x10000000 +; CHECK-DAG: '0x2d0c (SPI_SHADER_USER_DATA_HS_0)': 0x10000000 +; CHECK-DAG: '0x2d4c (SPI_SHADER_USER_DATA_LS_0)': 0x10000000 !amdgpu.pal.metadata.msgpack = !{!0} diff --git a/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll b/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll index e732358577285..29520cb7468c7 100644 --- a/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll +++ b/llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll @@ -21,10 +21,10 @@ ; VI-NEXT: .vgpr_count: 0x5 ; GFX9-NEXT: .vgpr_count: 0x5 ; GCN-NEXT: .registers: -; SI-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0x{{[0-9a-f]*}}81 -; VI-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0x{{[0-9a-f]*}}c1 -; GFX9-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0x{{[0-9a-f]*}}81 -; GCN-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): 0 +; SI-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x{{[0-9a-f]*}}81 +; VI-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x{{[0-9a-f]*}}c1 +; GFX9-NEXT: '0x2e12 (COMPUTE_PGM_RSRC1)': 0x{{[0-9a-f]*}}81 +; GCN-NEXT: '0x2e13 (COMPUTE_PGM_RSRC2)': 0 ; GCN-NEXT: ... ; GCN-NEXT: .end_amdgpu_pal_metadata diff --git a/llvm/test/MC/AMDGPU/pal-msgpack.s b/llvm/test/MC/AMDGPU/pal-msgpack.s index 886cc8b0538b4..03c6c547af8a4 100644 --- a/llvm/test/MC/AMDGPU/pal-msgpack.s +++ b/llvm/test/MC/AMDGPU/pal-msgpack.s @@ -14,10 +14,10 @@ amdpal.pipelines: - 0x123456789abcdef0 - 0xfedcba9876543210 .registers: - 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0 - 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 - 0xa1b3 (SPI_PS_INPUT_ENA): 0x1 - 0xa1b4 (SPI_PS_INPUT_ADDR): 0x1 + '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0 + '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 + '0xa1b3 (SPI_PS_INPUT_ENA)': 0x1 + '0xa1b4 (SPI_PS_INPUT_ADDR)': 0x1 ... .end_amdgpu_pal_metadata @@ -34,10 +34,10 @@ amdpal.pipelines: // ASM: - 0x123456789abcdef0 // ASM: - 0xfedcba9876543210 // ASM: .registers: -// ASM: 0x2c0a (SPI_SHADER_PGM_RSRC1_PS): 0 -// ASM: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x42000000 -// ASM: 0xa1b3 (SPI_PS_INPUT_ENA): 0x1 -// ASM: 0xa1b4 (SPI_PS_INPUT_ADDR): 0x1 +// ASM: '0x2c0a (SPI_SHADER_PGM_RSRC1_PS)': 0 +// ASM: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x42000000 +// ASM: '0xa1b3 (SPI_PS_INPUT_ENA)': 0x1 +// ASM: '0xa1b4 (SPI_PS_INPUT_ADDR)': 0x1 // ASM: ... // ASM: .end_amdgpu_pal_metadata diff --git a/llvm/test/Transforms/LowerTypeTests/import-unsat.ll b/llvm/test/Transforms/LowerTypeTests/import-unsat.ll index f766c2d324163..1722606b22bee 100644 --- a/llvm/test/Transforms/LowerTypeTests/import-unsat.ll +++ b/llvm/test/Transforms/LowerTypeTests/import-unsat.ll @@ -3,7 +3,7 @@ ; RUN: FileCheck --check-prefix=SUMMARY %s < %t ; SUMMARY: GlobalValueMap: -; SUMMARY-NEXT: 42: +; SUMMARY-NEXT: '42': ; SUMMARY-NEXT: - Linkage: 0 ; SUMMARY-NEXT: Visibility: 0 ; SUMMARY-NEXT: NotEligibleToImport: false diff --git a/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll b/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll index b55713fe4b296..73fca489708f5 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll @@ -17,7 +17,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: BranchFunnel ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -30,7 +30,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: BranchFunnel ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -43,7 +43,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll b/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll index c27b4b34ac04e..bd1659981d777 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll @@ -11,7 +11,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf3.llvm.merged ; SUMMARY-NEXT: ResByArg: @@ -24,7 +24,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf1 ; SUMMARY-NEXT: ResByArg: @@ -37,7 +37,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf2 ; SUMMARY-NEXT: ResByArg: @@ -50,7 +50,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf4.llvm.merged ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll b/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll index 5d148ca8e1980..a45324d593e4d 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll @@ -13,7 +13,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll b/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll index deaf34651354d..712438d829233 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll @@ -13,7 +13,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -31,7 +31,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll b/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll index 24aba548ea9ac..88a951763246f 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll @@ -16,7 +16,7 @@ target datalayout = "e-p:64:64" ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -36,7 +36,7 @@ target datalayout = "e-p:64:64" ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll b/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll index e4d6f1d52b540..b8577142afca2 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll @@ -3,7 +3,7 @@ ; RUN: FileCheck --check-prefix=SUMMARY %s < %t ; SUMMARY: GlobalValueMap: -; SUMMARY-NEXT: 42: +; SUMMARY-NEXT: '42': ; SUMMARY-NEXT: - Linkage: 0 ; SUMMARY-NEXT: Visibility: 0 ; SUMMARY-NEXT: NotEligibleToImport: false @@ -31,7 +31,7 @@ ; SUMMARY-NEXT: GUID: 456 ; SUMMARY-NEXT: Offset: 8 ; SUMMARY-NEXT: Args: [ 24, 12 ] -; SUMMARY-NEXT: 43: +; SUMMARY-NEXT: '43': ; SUMMARY-NEXT: - Linkage: 0 ; SUMMARY-NEXT: Visibility: 0 ; SUMMARY-NEXT: NotEligibleToImport: false @@ -49,11 +49,11 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: 0: +; SUMMARY-NEXT: '0': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: -; SUMMARY-NEXT: 4: +; SUMMARY-NEXT: '4': ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -62,7 +62,7 @@ ; SUMMARY-NEXT: Info: 12 ; SUMMARY-NEXT: Byte: 0 ; SUMMARY-NEXT: Bit: 0 -; SUMMARY-NEXT: 12: +; SUMMARY-NEXT: '12': ; SUMMARY-NEXT: Kind: UniformRetVal ; SUMMARY-NEXT: Info: 24 ; SUMMARY-NEXT: Byte: 0 From 8f9676ebca60c06a9210944392d88791900d5c94 Mon Sep 17 00:00:00 2001 From: Jannik Silvanus Date: Tue, 16 Apr 2024 18:48:18 +0200 Subject: [PATCH 3/6] [Support][YamlTraits] Add unit tests for quoted keys --- llvm/unittests/Support/YAMLIOTest.cpp | 65 +++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/llvm/unittests/Support/YAMLIOTest.cpp b/llvm/unittests/Support/YAMLIOTest.cpp index 401981f3841ee..86f6b1c22b8c4 100644 --- a/llvm/unittests/Support/YAMLIOTest.cpp +++ b/llvm/unittests/Support/YAMLIOTest.cpp @@ -2905,6 +2905,71 @@ TEST(YAMLIO, Numeric) { EXPECT_FALSE(isNumeric("1,230.15")); } +//===----------------------------------------------------------------------===// +// Test writing and reading escaped keys +//===----------------------------------------------------------------------===// + +// Struct with dynamic string key +struct QuotedKeyStruct { + int unquoted; + int numeric; + int just_space; + int unprintable; +}; + +namespace llvm { +namespace yaml { +template <> struct MappingTraits { + static void mapping(IO &io, QuotedKeyStruct &map) { + io.mapRequired("unquoted", map.unquoted); + io.mapRequired("42", map.numeric); + io.mapRequired(" ", map.just_space); + char unprintableKey[] = {/* \f, form-feed */ 0xC, 0}; + io.mapRequired(unprintableKey, map.unprintable); + } +}; +} // namespace yaml +} // namespace llvm + +TEST(YAMLIO, TestQuotedKeyRead) { + QuotedKeyStruct map = {}; + Input yin("---\nunquoted: 1\n'42': 2\n' ': 3\n\"\\f\": 4\n...\n"); + yin >> map; + + EXPECT_FALSE(yin.error()); + EXPECT_EQ(map.unquoted, 1); + EXPECT_EQ(map.numeric, 2); + EXPECT_EQ(map.just_space, 3); + EXPECT_EQ(map.unprintable, 4); +} + +TEST(YAMLIO, TestQuotedKeyWriteRead) { + std::string intermediate; + { + QuotedKeyStruct map = {1, 2, 3, 4}; + llvm::raw_string_ostream ostr(intermediate); + Output yout(ostr); + yout << map; + } + + EXPECT_NE(llvm::StringRef::npos, intermediate.find("unquoted:")); + EXPECT_NE(llvm::StringRef::npos, intermediate.find("'42':")); + EXPECT_NE(llvm::StringRef::npos, intermediate.find("' '")); + EXPECT_NE(llvm::StringRef::npos, intermediate.find("\"\\f\":")); + + { + Input yin(intermediate); + QuotedKeyStruct map; + yin >> map; + + EXPECT_FALSE(yin.error()); + EXPECT_EQ(map.unquoted, 1); + EXPECT_EQ(map.numeric, 2); + EXPECT_EQ(map.just_space, 3); + EXPECT_EQ(map.unprintable, 4); + } +} + //===----------------------------------------------------------------------===// // Test PolymorphicTraits and TaggedScalarTraits //===----------------------------------------------------------------------===// From 82dff0d2c2d08229126fea513d7ab6ea1bbfc2b0 Mon Sep 17 00:00:00 2001 From: Jannik Silvanus Date: Tue, 16 Apr 2024 19:05:15 +0200 Subject: [PATCH 4/6] [Support][YamlTraits] Update WebAssembly test --- llvm/test/CodeGen/WebAssembly/function-info.mir | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/test/CodeGen/WebAssembly/function-info.mir b/llvm/test/CodeGen/WebAssembly/function-info.mir index 2971d234c9b2d..6456c596d3aa8 100644 --- a/llvm/test/CodeGen/WebAssembly/function-info.mir +++ b/llvm/test/CodeGen/WebAssembly/function-info.mir @@ -47,7 +47,7 @@ liveins: - { reg: '$arguments' } # CHECK: wasmEHFuncInfo: # bb.2 becomes bb.1 and bb.3 becomes bb.2 after CFGSort. -# CHECK-NEXT: 1: 2 +# CHECK-NEXT: '1': 2 machineFunctionInfo: wasmEHFuncInfo: 2: 3 From 5444151a0b479c4b0bad9f6cd932e83601eb9c7c Mon Sep 17 00:00:00 2001 From: Jannik Silvanus Date: Wed, 17 Apr 2024 12:29:01 +0200 Subject: [PATCH 5/6] Review change: use std::string::npos, use StringLiteral --- llvm/lib/Support/YAMLTraits.cpp | 3 ++- llvm/unittests/Support/YAMLIOTest.cpp | 8 ++++---- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Support/YAMLTraits.cpp b/llvm/lib/Support/YAMLTraits.cpp index cce01e08abd41..62b47dd17606e 100644 --- a/llvm/lib/Support/YAMLTraits.cpp +++ b/llvm/lib/Support/YAMLTraits.cpp @@ -776,7 +776,8 @@ void Output::output(StringRef S, QuotingType MustQuote) { return; } - const char *const Quote = MustQuote == QuotingType::Single ? "'" : "\""; + StringLiteral Quote = MustQuote == QuotingType::Single ? StringLiteral("'") + : StringLiteral("\""); output(Quote); // Starting quote. // When using double-quoted strings (and only in that case), non-printable diff --git a/llvm/unittests/Support/YAMLIOTest.cpp b/llvm/unittests/Support/YAMLIOTest.cpp index 86f6b1c22b8c4..e70f46c070558 100644 --- a/llvm/unittests/Support/YAMLIOTest.cpp +++ b/llvm/unittests/Support/YAMLIOTest.cpp @@ -2952,10 +2952,10 @@ TEST(YAMLIO, TestQuotedKeyWriteRead) { yout << map; } - EXPECT_NE(llvm::StringRef::npos, intermediate.find("unquoted:")); - EXPECT_NE(llvm::StringRef::npos, intermediate.find("'42':")); - EXPECT_NE(llvm::StringRef::npos, intermediate.find("' '")); - EXPECT_NE(llvm::StringRef::npos, intermediate.find("\"\\f\":")); + EXPECT_NE(std::string::npos, intermediate.find("unquoted:")); + EXPECT_NE(std::string::npos, intermediate.find("'42':")); + EXPECT_NE(std::string::npos, intermediate.find("' '")); + EXPECT_NE(std::string::npos, intermediate.find("\"\\f\":")); { Input yin(intermediate); From 314c6877e3a6e6379b56353cd0e806be71fed6c1 Mon Sep 17 00:00:00 2001 From: Jannik Silvanus Date: Wed, 17 Apr 2024 13:03:27 +0200 Subject: [PATCH 6/6] [Support][YamlTraits] Don't quote null/numeric/bool keys For string *values*, we quote null/numeric/bool values to differentiate from the non-string values. However, for *keys* this is not necessary, as we only support string keys for now in the interface, so there is no way to set non-string keys. Extend the needsQuotes() helper with a new flag that configures whether quoting to prevent the string type is necessary. --- llvm/include/llvm/Support/YAMLTraits.h | 20 +++++--- llvm/lib/Support/YAMLTraits.cpp | 4 +- llvm/test/CodeGen/AMDGPU/elf-notes.ll | 4 +- .../CodeGen/WebAssembly/function-info.mir | 2 +- .../Transforms/LowerTypeTests/import-unsat.ll | 2 +- .../WholeProgramDevirt/branch-funnel.ll | 6 +-- .../WholeProgramDevirt/export-single-impl.ll | 8 ++-- .../export-uniform-ret-val.ll | 2 +- .../export-unique-ret-val.ll | 4 +- .../WholeProgramDevirt/export-vcp.ll | 4 +- .../WholeProgramDevirt/import-indir.ll | 10 ++-- llvm/unittests/Support/YAMLIOTest.cpp | 46 +++++++++++++------ 12 files changed, 67 insertions(+), 45 deletions(-) diff --git a/llvm/include/llvm/Support/YAMLTraits.h b/llvm/include/llvm/Support/YAMLTraits.h index 9baf3ffd814bc..33aeb039320d0 100644 --- a/llvm/include/llvm/Support/YAMLTraits.h +++ b/llvm/include/llvm/Support/YAMLTraits.h @@ -671,7 +671,11 @@ inline bool isBool(StringRef S) { // (except for TAB #x9, LF #xA, and CR #xD which are allowed), DEL #x7F, the C1 // control block #x80-#x9F (except for NEL #x85 which is allowed), the surrogate // block #xD800-#xDFFF, #xFFFE, and #xFFFF. -inline QuotingType needsQuotes(StringRef S) { +// +// Some strings are valid YAML values even unquoted, but without quotes are +// interpreted as non-string type, for instance null, boolean or numeric values. +// If ForcePreserveAsString is set, such strings are quoted. +inline QuotingType needsQuotes(StringRef S, bool ForcePreserveAsString = true) { if (S.empty()) return QuotingType::Single; @@ -679,12 +683,14 @@ inline QuotingType needsQuotes(StringRef S) { if (isSpace(static_cast(S.front())) || isSpace(static_cast(S.back()))) MaxQuotingNeeded = QuotingType::Single; - if (isNull(S)) - MaxQuotingNeeded = QuotingType::Single; - if (isBool(S)) - MaxQuotingNeeded = QuotingType::Single; - if (isNumeric(S)) - MaxQuotingNeeded = QuotingType::Single; + if (ForcePreserveAsString) { + if (isNull(S)) + MaxQuotingNeeded = QuotingType::Single; + if (isBool(S)) + MaxQuotingNeeded = QuotingType::Single; + if (isNumeric(S)) + MaxQuotingNeeded = QuotingType::Single; + } // 7.3.3 Plain Style // Plain scalars must not begin with most indicators, as this would cause diff --git a/llvm/lib/Support/YAMLTraits.cpp b/llvm/lib/Support/YAMLTraits.cpp index 62b47dd17606e..7bb60894b3354 100644 --- a/llvm/lib/Support/YAMLTraits.cpp +++ b/llvm/lib/Support/YAMLTraits.cpp @@ -861,7 +861,7 @@ void Output::newLineCheck(bool EmptySequence) { } void Output::paddedKey(StringRef key) { - output(key, needsQuotes(key)); + output(key, needsQuotes(key, false)); output(":"); const char *spaces = " "; if (key.size() < strlen(spaces)) @@ -880,7 +880,7 @@ void Output::flowKey(StringRef Key) { Column = ColumnAtMapFlowStart; output(" "); } - output(Key, needsQuotes(Key)); + output(Key, needsQuotes(Key, false)); output(": "); } diff --git a/llvm/test/CodeGen/AMDGPU/elf-notes.ll b/llvm/test/CodeGen/AMDGPU/elf-notes.ll index 58c7d12197e9b..d958dde01c3f8 100644 --- a/llvm/test/CodeGen/AMDGPU/elf-notes.ll +++ b/llvm/test/CodeGen/AMDGPU/elf-notes.ll @@ -71,8 +71,8 @@ ; OSABI-PAL-ELF: .sgpr_count: 96 ; OSABI-PAL-ELF: .vgpr_count: 1 ; OSABI-PAL-ELF: .registers: -; OSABI-PAL-ELF: '11794': 11469504 -; OSABI-PAL-ELF: '11795': 128 +; OSABI-PAL-ELF: 11794: 11469504 +; OSABI-PAL-ELF: 11795: 128 ; R600-NOT: .hsa_code_object_version ; R600-NOT: .hsa_code_object_isa diff --git a/llvm/test/CodeGen/WebAssembly/function-info.mir b/llvm/test/CodeGen/WebAssembly/function-info.mir index 6456c596d3aa8..2971d234c9b2d 100644 --- a/llvm/test/CodeGen/WebAssembly/function-info.mir +++ b/llvm/test/CodeGen/WebAssembly/function-info.mir @@ -47,7 +47,7 @@ liveins: - { reg: '$arguments' } # CHECK: wasmEHFuncInfo: # bb.2 becomes bb.1 and bb.3 becomes bb.2 after CFGSort. -# CHECK-NEXT: '1': 2 +# CHECK-NEXT: 1: 2 machineFunctionInfo: wasmEHFuncInfo: 2: 3 diff --git a/llvm/test/Transforms/LowerTypeTests/import-unsat.ll b/llvm/test/Transforms/LowerTypeTests/import-unsat.ll index 1722606b22bee..f766c2d324163 100644 --- a/llvm/test/Transforms/LowerTypeTests/import-unsat.ll +++ b/llvm/test/Transforms/LowerTypeTests/import-unsat.ll @@ -3,7 +3,7 @@ ; RUN: FileCheck --check-prefix=SUMMARY %s < %t ; SUMMARY: GlobalValueMap: -; SUMMARY-NEXT: '42': +; SUMMARY-NEXT: 42: ; SUMMARY-NEXT: - Linkage: 0 ; SUMMARY-NEXT: Visibility: 0 ; SUMMARY-NEXT: NotEligibleToImport: false diff --git a/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll b/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll index 73fca489708f5..b55713fe4b296 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/branch-funnel.ll @@ -17,7 +17,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: BranchFunnel ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -30,7 +30,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: BranchFunnel ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -43,7 +43,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll b/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll index bd1659981d777..c27b4b34ac04e 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll @@ -11,7 +11,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf3.llvm.merged ; SUMMARY-NEXT: ResByArg: @@ -24,7 +24,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf1 ; SUMMARY-NEXT: ResByArg: @@ -37,7 +37,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf2 ; SUMMARY-NEXT: ResByArg: @@ -50,7 +50,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: SingleImpl ; SUMMARY-NEXT: SingleImplName: vf4.llvm.merged ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll b/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll index a45324d593e4d..5d148ca8e1980 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-uniform-ret-val.ll @@ -13,7 +13,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll b/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll index 712438d829233..deaf34651354d 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-unique-ret-val.ll @@ -13,7 +13,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -31,7 +31,7 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll b/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll index 88a951763246f..24aba548ea9ac 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll @@ -16,7 +16,7 @@ target datalayout = "e-p:64:64" ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -36,7 +36,7 @@ target datalayout = "e-p:64:64" ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: diff --git a/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll b/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll index b8577142afca2..e4d6f1d52b540 100644 --- a/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll +++ b/llvm/test/Transforms/WholeProgramDevirt/import-indir.ll @@ -3,7 +3,7 @@ ; RUN: FileCheck --check-prefix=SUMMARY %s < %t ; SUMMARY: GlobalValueMap: -; SUMMARY-NEXT: '42': +; SUMMARY-NEXT: 42: ; SUMMARY-NEXT: - Linkage: 0 ; SUMMARY-NEXT: Visibility: 0 ; SUMMARY-NEXT: NotEligibleToImport: false @@ -31,7 +31,7 @@ ; SUMMARY-NEXT: GUID: 456 ; SUMMARY-NEXT: Offset: 8 ; SUMMARY-NEXT: Args: [ 24, 12 ] -; SUMMARY-NEXT: '43': +; SUMMARY-NEXT: 43: ; SUMMARY-NEXT: - Linkage: 0 ; SUMMARY-NEXT: Visibility: 0 ; SUMMARY-NEXT: NotEligibleToImport: false @@ -49,11 +49,11 @@ ; SUMMARY-NEXT: BitMask: 0 ; SUMMARY-NEXT: InlineBits: 0 ; SUMMARY-NEXT: WPDRes: -; SUMMARY-NEXT: '0': +; SUMMARY-NEXT: 0: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: -; SUMMARY-NEXT: '4': +; SUMMARY-NEXT: 4: ; SUMMARY-NEXT: Kind: Indir ; SUMMARY-NEXT: SingleImplName: '' ; SUMMARY-NEXT: ResByArg: @@ -62,7 +62,7 @@ ; SUMMARY-NEXT: Info: 12 ; SUMMARY-NEXT: Byte: 0 ; SUMMARY-NEXT: Bit: 0 -; SUMMARY-NEXT: '12': +; SUMMARY-NEXT: 12: ; SUMMARY-NEXT: Kind: UniformRetVal ; SUMMARY-NEXT: Info: 24 ; SUMMARY-NEXT: Byte: 0 diff --git a/llvm/unittests/Support/YAMLIOTest.cpp b/llvm/unittests/Support/YAMLIOTest.cpp index e70f46c070558..6ac0d1b412f0a 100644 --- a/llvm/unittests/Support/YAMLIOTest.cpp +++ b/llvm/unittests/Support/YAMLIOTest.cpp @@ -2911,8 +2911,11 @@ TEST(YAMLIO, Numeric) { // Struct with dynamic string key struct QuotedKeyStruct { - int unquoted; - int numeric; + int unquoted_bool; + int unquoted_null; + int unquoted_numeric; + int unquoted_str; + int colon; int just_space; int unprintable; }; @@ -2921,8 +2924,11 @@ namespace llvm { namespace yaml { template <> struct MappingTraits { static void mapping(IO &io, QuotedKeyStruct &map) { - io.mapRequired("unquoted", map.unquoted); - io.mapRequired("42", map.numeric); + io.mapRequired("true", map.unquoted_bool); + io.mapRequired("null", map.unquoted_null); + io.mapRequired("42", map.unquoted_numeric); + io.mapRequired("unquoted", map.unquoted_str); + io.mapRequired(":", map.colon); io.mapRequired(" ", map.just_space); char unprintableKey[] = {/* \f, form-feed */ 0xC, 0}; io.mapRequired(unprintableKey, map.unprintable); @@ -2933,27 +2939,34 @@ template <> struct MappingTraits { TEST(YAMLIO, TestQuotedKeyRead) { QuotedKeyStruct map = {}; - Input yin("---\nunquoted: 1\n'42': 2\n' ': 3\n\"\\f\": 4\n...\n"); + Input yin("---\ntrue: 1\nnull: 2\n42: 3\nunquoted: 4\n':': 5\n' ': " + "6\n\"\\f\": 7\n...\n"); yin >> map; EXPECT_FALSE(yin.error()); - EXPECT_EQ(map.unquoted, 1); - EXPECT_EQ(map.numeric, 2); - EXPECT_EQ(map.just_space, 3); - EXPECT_EQ(map.unprintable, 4); + EXPECT_EQ(map.unquoted_bool, 1); + EXPECT_EQ(map.unquoted_null, 2); + EXPECT_EQ(map.unquoted_numeric, 3); + EXPECT_EQ(map.unquoted_str, 4); + EXPECT_EQ(map.colon, 5); + EXPECT_EQ(map.just_space, 6); + EXPECT_EQ(map.unprintable, 7); } TEST(YAMLIO, TestQuotedKeyWriteRead) { std::string intermediate; { - QuotedKeyStruct map = {1, 2, 3, 4}; + QuotedKeyStruct map = {1, 2, 3, 4, 5, 6, 7}; llvm::raw_string_ostream ostr(intermediate); Output yout(ostr); yout << map; } + EXPECT_NE(std::string::npos, intermediate.find("true:")); + EXPECT_NE(std::string::npos, intermediate.find("null:")); + EXPECT_NE(std::string::npos, intermediate.find("42:")); EXPECT_NE(std::string::npos, intermediate.find("unquoted:")); - EXPECT_NE(std::string::npos, intermediate.find("'42':")); + EXPECT_NE(std::string::npos, intermediate.find("':':")); EXPECT_NE(std::string::npos, intermediate.find("' '")); EXPECT_NE(std::string::npos, intermediate.find("\"\\f\":")); @@ -2963,10 +2976,13 @@ TEST(YAMLIO, TestQuotedKeyWriteRead) { yin >> map; EXPECT_FALSE(yin.error()); - EXPECT_EQ(map.unquoted, 1); - EXPECT_EQ(map.numeric, 2); - EXPECT_EQ(map.just_space, 3); - EXPECT_EQ(map.unprintable, 4); + EXPECT_EQ(map.unquoted_bool, 1); + EXPECT_EQ(map.unquoted_null, 2); + EXPECT_EQ(map.unquoted_numeric, 3); + EXPECT_EQ(map.unquoted_str, 4); + EXPECT_EQ(map.colon, 5); + EXPECT_EQ(map.just_space, 6); + EXPECT_EQ(map.unprintable, 7); } }