From cd2d469bc36a68336c6a2b848ad94fedde58859d Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Wed, 6 Mar 2024 21:17:55 +0800 Subject: [PATCH 1/2] [ValueTracking] Add pre-commit tests. NFC. --- .../test/Transforms/InstCombine/known-bits.ll | 143 ++++++++++++++++++ 1 file changed, 143 insertions(+) diff --git a/llvm/test/Transforms/InstCombine/known-bits.ll b/llvm/test/Transforms/InstCombine/known-bits.ll index b658ee0d2ef4e..1e85516710724 100644 --- a/llvm/test/Transforms/InstCombine/known-bits.ll +++ b/llvm/test/Transforms/InstCombine/known-bits.ll @@ -343,5 +343,148 @@ exit: ret i8 %or2 } +define i32 @test_icmp_trunc1(i32 %x){ +; CHECK-LABEL: @test_icmp_trunc1( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[Y:%.*]] = trunc i32 [[X:%.*]] to i16 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[Y]], 7 +; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]] +; CHECK: then: +; CHECK-NEXT: [[Z:%.*]] = and i32 [[X]], 15 +; CHECK-NEXT: ret i32 [[Z]] +; CHECK: else: +; CHECK-NEXT: ret i32 0 +; +entry: + %y = trunc i32 %x to i16 + %cmp = icmp eq i16 %y, 7 + br i1 %cmp, label %then, label %else +then: + %z = and i32 %x, 15 + ret i32 %z +else: + ret i32 0 +} + +define i32 @test_icmp_trunc_assume(i32 %x){ +; CHECK-LABEL: @test_icmp_trunc_assume( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[Y:%.*]] = trunc i32 [[X:%.*]] to i16 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[Y]], 7 +; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]]) +; CHECK-NEXT: [[Z:%.*]] = and i32 [[X]], 15 +; CHECK-NEXT: ret i32 [[Z]] +; +entry: + %y = trunc i32 %x to i16 + %cmp = icmp eq i16 %y, 7 + call void @llvm.assume(i1 %cmp) + %z = and i32 %x, 15 + ret i32 %z +} + +define i64 @test_icmp_trunc2(i64 %x) { +; CHECK-LABEL: @test_icmp_trunc2( +; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[X:%.*]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CONV]], 12 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[SEXT:%.*]] = shl i64 [[X]], 32 +; CHECK-NEXT: [[RET:%.*]] = ashr exact i64 [[SEXT]], 32 +; CHECK-NEXT: ret i64 [[RET]] +; CHECK: if.else: +; CHECK-NEXT: ret i64 0 +; + %conv = trunc i64 %x to i32 + %cmp = icmp sgt i32 %conv, 12 + br i1 %cmp, label %if.then, label %if.else + +if.then: + %sext = shl i64 %x, 32 + %ret = ashr exact i64 %sext, 32 + ret i64 %ret +if.else: + ret i64 0 +} + +define i64 @test_icmp_trunc3(i64 %n) { +; CHECK-LABEL: @test_icmp_trunc3( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[N:%.*]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 96 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[RET:%.*]] = and i64 [[N]], 4294967295 +; CHECK-NEXT: ret i64 [[RET]] +; CHECK: if.else: +; CHECK-NEXT: ret i64 0 +; +entry: + %conv = trunc i64 %n to i32 + %cmp = icmp ult i32 %conv, 96 + br i1 %cmp, label %if.then, label %if.else + +if.then: + %ret = and i64 %n, 4294967295 + ret i64 %ret + +if.else: + ret i64 0 +} + +define i8 @test_icmp_trunc4(i64 %n) { +; CHECK-LABEL: @test_icmp_trunc4( +; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[N:%.*]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 10 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[CONV2:%.*]] = trunc i64 [[N]] to i8 +; CHECK-NEXT: [[ADD:%.*]] = add i8 [[CONV2]], 48 +; CHECK-NEXT: ret i8 [[ADD]] +; CHECK: if.else: +; CHECK-NEXT: ret i8 0 +; + %conv = trunc i64 %n to i32 + %cmp = icmp ult i32 %conv, 10 + br i1 %cmp, label %if.then, label %if.else + +if.then: + %conv2 = trunc i64 %n to i8 + %add = add i8 %conv2, 48 + ret i8 %add + +if.else: + ret i8 0 +} + +define i64 @test_icmp_trunc5(i64 %n) { +; CHECK-LABEL: @test_icmp_trunc5( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[SHR:%.*]] = ashr i64 [[N:%.*]], 47 +; CHECK-NEXT: [[CONV1:%.*]] = trunc i64 [[SHR]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CONV1]], -13 +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[AND:%.*]] = and i64 [[SHR]], 4294967295 +; CHECK-NEXT: [[NOT:%.*]] = xor i64 [[AND]], 4294967295 +; CHECK-NEXT: ret i64 [[NOT]] +; CHECK: if.else: +; CHECK-NEXT: ret i64 13 +; +entry: + %shr = ashr i64 %n, 47 + %conv1 = trunc i64 %shr to i32 + %cmp = icmp ugt i32 %conv1, -13 + br i1 %cmp, label %if.then, label %if.else + +if.then: + %and = and i64 %shr, 4294967295 + %not = xor i64 %and, 4294967295 + ret i64 %not + +if.else: + ret i64 13 +} + declare void @use(i1) declare void @sink(i8) From 114a7dfcf0e166bc73624a3ea62e8342a1e7d902 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Wed, 6 Mar 2024 21:18:59 +0800 Subject: [PATCH 2/2] [ValueTracking] Handle `icmp pred (trunc X), C` in `computeKnownBitsFromCmp` --- llvm/lib/Analysis/ValueTracking.cpp | 28 +++++++++++++++---- .../test/Transforms/InstCombine/known-bits.ll | 19 ++++++------- 2 files changed, 30 insertions(+), 17 deletions(-) diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp index f96a60a4f5474..53c6326b8ec26 100644 --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -708,6 +708,25 @@ static void computeKnownBitsFromCmp(const Value *V, CmpInst::Predicate Pred, } } +static void computeKnownBitsFromICmpCond(const Value *V, ICmpInst *Cmp, + KnownBits &Known, + const SimplifyQuery &SQ, bool Invert) { + ICmpInst::Predicate Pred = + Invert ? Cmp->getInversePredicate() : Cmp->getPredicate(); + Value *LHS = Cmp->getOperand(0); + Value *RHS = Cmp->getOperand(1); + + // Handle icmp pred (trunc V), C + if (match(LHS, m_Trunc(m_Specific(V)))) { + KnownBits DstKnown(LHS->getType()->getScalarSizeInBits()); + computeKnownBitsFromCmp(LHS, Pred, LHS, RHS, DstKnown, SQ); + Known = Known.unionWith(DstKnown.anyext(Known.getBitWidth())); + return; + } + + computeKnownBitsFromCmp(V, Pred, LHS, RHS, Known, SQ); +} + static void computeKnownBitsFromCond(const Value *V, Value *Cond, KnownBits &Known, unsigned Depth, const SimplifyQuery &SQ, bool Invert) { @@ -727,9 +746,7 @@ static void computeKnownBitsFromCond(const Value *V, Value *Cond, } if (auto *Cmp = dyn_cast(Cond)) - computeKnownBitsFromCmp( - V, Invert ? Cmp->getInversePredicate() : Cmp->getPredicate(), - Cmp->getOperand(0), Cmp->getOperand(1), Known, SQ); + computeKnownBitsFromICmpCond(V, Cmp, Known, SQ, Invert); } void llvm::computeKnownBitsFromContext(const Value *V, KnownBits &Known, @@ -815,8 +832,7 @@ void llvm::computeKnownBitsFromContext(const Value *V, KnownBits &Known, if (!isValidAssumeForContext(I, Q.CxtI, Q.DT)) continue; - computeKnownBitsFromCmp(V, Cmp->getPredicate(), Cmp->getOperand(0), - Cmp->getOperand(1), Known, Q); + computeKnownBitsFromICmpCond(V, Cmp, Known, Q, /*Invert=*/false); } // Conflicting assumption: Undefined behavior will occur on this execution @@ -9133,7 +9149,7 @@ addValueAffectedByCondition(Value *V, // Peek through unary operators to find the source of the condition. Value *Op; - if (match(I, m_PtrToInt(m_Value(Op)))) { + if (match(I, m_CombineOr(m_PtrToInt(m_Value(Op)), m_Trunc(m_Value(Op))))) { if (isa(Op) || isa(Op)) InsertAffected(Op); } diff --git a/llvm/test/Transforms/InstCombine/known-bits.ll b/llvm/test/Transforms/InstCombine/known-bits.ll index 1e85516710724..58c283815cf91 100644 --- a/llvm/test/Transforms/InstCombine/known-bits.ll +++ b/llvm/test/Transforms/InstCombine/known-bits.ll @@ -350,8 +350,7 @@ define i32 @test_icmp_trunc1(i32 %x){ ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[Y]], 7 ; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]] ; CHECK: then: -; CHECK-NEXT: [[Z:%.*]] = and i32 [[X]], 15 -; CHECK-NEXT: ret i32 [[Z]] +; CHECK-NEXT: ret i32 7 ; CHECK: else: ; CHECK-NEXT: ret i32 0 ; @@ -372,8 +371,7 @@ define i32 @test_icmp_trunc_assume(i32 %x){ ; CHECK-NEXT: [[Y:%.*]] = trunc i32 [[X:%.*]] to i16 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[Y]], 7 ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]]) -; CHECK-NEXT: [[Z:%.*]] = and i32 [[X]], 15 -; CHECK-NEXT: ret i32 [[Z]] +; CHECK-NEXT: ret i32 7 ; entry: %y = trunc i32 %x to i16 @@ -389,9 +387,8 @@ define i64 @test_icmp_trunc2(i64 %x) { ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CONV]], 12 ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: -; CHECK-NEXT: [[SEXT:%.*]] = shl i64 [[X]], 32 -; CHECK-NEXT: [[RET:%.*]] = ashr exact i64 [[SEXT]], 32 -; CHECK-NEXT: ret i64 [[RET]] +; CHECK-NEXT: [[SEXT:%.*]] = and i64 [[X]], 2147483647 +; CHECK-NEXT: ret i64 [[SEXT]] ; CHECK: if.else: ; CHECK-NEXT: ret i64 0 ; @@ -414,7 +411,7 @@ define i64 @test_icmp_trunc3(i64 %n) { ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 96 ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: -; CHECK-NEXT: [[RET:%.*]] = and i64 [[N]], 4294967295 +; CHECK-NEXT: [[RET:%.*]] = and i64 [[N]], 127 ; CHECK-NEXT: ret i64 [[RET]] ; CHECK: if.else: ; CHECK-NEXT: ret i64 0 @@ -439,7 +436,7 @@ define i8 @test_icmp_trunc4(i64 %n) { ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[CONV2:%.*]] = trunc i64 [[N]] to i8 -; CHECK-NEXT: [[ADD:%.*]] = add i8 [[CONV2]], 48 +; CHECK-NEXT: [[ADD:%.*]] = or disjoint i8 [[CONV2]], 48 ; CHECK-NEXT: ret i8 [[ADD]] ; CHECK: if.else: ; CHECK-NEXT: ret i8 0 @@ -465,8 +462,8 @@ define i64 @test_icmp_trunc5(i64 %n) { ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CONV1]], -13 ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: -; CHECK-NEXT: [[AND:%.*]] = and i64 [[SHR]], 4294967295 -; CHECK-NEXT: [[NOT:%.*]] = xor i64 [[AND]], 4294967295 +; CHECK-NEXT: [[TMP0:%.*]] = and i64 [[SHR]], 15 +; CHECK-NEXT: [[NOT:%.*]] = xor i64 [[TMP0]], 15 ; CHECK-NEXT: ret i64 [[NOT]] ; CHECK: if.else: ; CHECK-NEXT: ret i64 13