From ee5b76cfebaf5e289babdfb893e51802e5d97419 Mon Sep 17 00:00:00 2001 From: wanglei Date: Mon, 4 Nov 2024 15:02:28 +0800 Subject: [PATCH 1/4] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20ch?= =?UTF-8?q?anges=20to=20main=20this=20commit=20is=20based=20on?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Created using spr 1.3.5-bogner [skip ci] --- .../RuntimeDyld/RuntimeDyld.cpp | 12 + .../RuntimeDyld/RuntimeDyldELF.cpp | 216 ++++++++++++++++++ .../RuntimeDyld/RuntimeDyldELF.h | 14 ++ .../LoongArch/ELF_LoongArch_relocations.s | 102 +++++++++ .../RuntimeDyld/LoongArch/lit.local.cfg | 2 + 5 files changed, 346 insertions(+) create mode 100644 llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/ELF_LoongArch_relocations.s create mode 100644 llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/lit.local.cfg diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp index 5ac5532705dc4..b3798f15a6cc9 100644 --- a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp +++ b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp @@ -990,6 +990,18 @@ uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr, // and stubs for branches Thumb - ARM and ARM - Thumb. writeBytesUnaligned(0xe51ff004, Addr, 4); // ldr pc, [pc, #-4] return Addr + 4; + } else if (Arch == Triple::loongarch64) { + // lu12i.w $t0, %abs_hi20(addr) + // ori $t0, $t0, %abs_lo12(addr) + // lu32i.d $t0, %abs64_lo20(addr) + // lu52i.d $t0, $t0, %abs64_lo12(addr) + // jr $t0 + writeBytesUnaligned(0x1400000c, Addr, 4); + writeBytesUnaligned(0x0380018c, Addr + 4, 4); + writeBytesUnaligned(0x1600000c, Addr + 8, 4); + writeBytesUnaligned(0x0300018c, Addr + 12, 4); + writeBytesUnaligned(0x4c000180, Addr + 16, 4); + return Addr; } else if (IsMipsO32ABI || IsMipsN32ABI) { // 0: 3c190000 lui t9,%hi(addr). // 4: 27390000 addiu t9,t9,%lo(addr). diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp index 25b76c7668350..83d5be33ac5c4 100644 --- a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp +++ b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp @@ -645,6 +645,203 @@ void RuntimeDyldELF::resolveARMRelocation(const SectionEntry &Section, } } +bool RuntimeDyldELF::resolveLoongArch64ShortBranch( + unsigned SectionID, relocation_iterator RelI, + const RelocationValueRef &Value) { + uint64_t Address; + if (Value.SymbolName) { + auto Loc = GlobalSymbolTable.find(Value.SymbolName); + // Don't create direct branch for external symbols. + if (Loc == GlobalSymbolTable.end()) + return false; + const auto &SymInfo = Loc->second; + Address = + uint64_t(Sections[SymInfo.getSectionID()].getLoadAddressWithOffset( + SymInfo.getOffset())); + } else { + Address = uint64_t(Sections[Value.SectionID].getLoadAddress()); + } + uint64_t Offset = RelI->getOffset(); + uint64_t SourceAddress = Sections[SectionID].getLoadAddressWithOffset(Offset); + if (!isInt<28>(Address + Value.Addend - SourceAddress)) + return false; + resolveRelocation(Sections[SectionID], Offset, Address, RelI->getType(), + Value.Addend); + return true; +} + +void RuntimeDyldELF::resolveLoongArch64Branch(unsigned SectionID, + const RelocationValueRef &Value, + relocation_iterator RelI, + StubMap &Stubs) { + LLVM_DEBUG(dbgs() << "\t\tThis is an LoongArch64 branch relocation.\n"); + SectionEntry &Section = Sections[SectionID]; + uint64_t Offset = RelI->getOffset(); + unsigned RelType = RelI->getType(); + // Look for an existing stub. + StubMap::const_iterator i = Stubs.find(Value); + if (i != Stubs.end()) { + resolveRelocation(Section, Offset, + (uint64_t)Section.getAddressWithOffset(i->second), + RelType, 0); + LLVM_DEBUG(dbgs() << " Stub function found\n"); + } else if (!resolveLoongArch64ShortBranch(SectionID, RelI, Value)) { + // Create a new stub function. + LLVM_DEBUG(dbgs() << " Create a new stub function\n"); + Stubs[Value] = Section.getStubOffset(); + uint8_t *StubTargetAddr = createStubFunction( + Section.getAddressWithOffset(Section.getStubOffset())); + RelocationEntry LU12I_W(SectionID, StubTargetAddr - Section.getAddress(), + ELF::R_LARCH_ABS_HI20, Value.Addend); + RelocationEntry ORI(SectionID, StubTargetAddr - Section.getAddress() + 4, + ELF::R_LARCH_ABS_LO12, Value.Addend); + RelocationEntry LU32I_D(SectionID, + StubTargetAddr - Section.getAddress() + 8, + ELF::R_LARCH_ABS64_LO20, Value.Addend); + RelocationEntry LU52I_D(SectionID, + StubTargetAddr - Section.getAddress() + 12, + ELF::R_LARCH_ABS64_HI12, Value.Addend); + if (Value.SymbolName) { + addRelocationForSymbol(LU12I_W, Value.SymbolName); + addRelocationForSymbol(ORI, Value.SymbolName); + addRelocationForSymbol(LU32I_D, Value.SymbolName); + addRelocationForSymbol(LU52I_D, Value.SymbolName); + } else { + addRelocationForSection(LU12I_W, Value.SectionID); + addRelocationForSection(ORI, Value.SectionID); + addRelocationForSection(LU32I_D, Value.SectionID); + addRelocationForSection(LU52I_D, Value.SectionID); + } + resolveRelocation(Section, Offset, + reinterpret_cast(Section.getAddressWithOffset( + Section.getStubOffset())), + RelType, 0); + Section.advanceStubOffset(getMaxStubSize()); + } +} + +// Returns extract bits Val[Hi:Lo]. +static inline uint32_t extractBits(uint64_t Val, uint32_t Hi, uint32_t Lo) { + return Hi == 63 ? Val >> Lo : (Val & (((1ULL << (Hi + 1)) - 1))) >> Lo; +} + +void RuntimeDyldELF::resolveLoongArch64Relocation(const SectionEntry &Section, + uint64_t Offset, + uint64_t Value, uint32_t Type, + int64_t Addend) { + auto *TargetPtr = Section.getAddressWithOffset(Offset); + uint64_t FinalAddress = Section.getLoadAddressWithOffset(Offset); + + LLVM_DEBUG(dbgs() << "resolveLoongArch64Relocation, LocalAddress: 0x" + << format("%llx", Section.getAddressWithOffset(Offset)) + << " FinalAddress: 0x" << format("%llx", FinalAddress) + << " Value: 0x" << format("%llx", Value) << " Type: 0x" + << format("%x", Type) << " Addend: 0x" + << format("%llx", Addend) << "\n"); + + switch (Type) { + default: + report_fatal_error("Relocation type not implemented yet!"); + break; + case ELF::R_LARCH_32: + support::ulittle32_t::ref{TargetPtr} = + static_cast(Value + Addend); + break; + case ELF::R_LARCH_64: + support::ulittle64_t::ref{TargetPtr} = Value + Addend; + break; + case ELF::R_LARCH_32_PCREL: + support::ulittle32_t::ref{TargetPtr} = + static_cast(Value + Addend - FinalAddress); + break; + case ELF::R_LARCH_B26: { + uint64_t B26 = (Value + Addend - FinalAddress) >> 2; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm15_0 = extractBits(B26, /*Hi=*/15, /*Lo=*/0) << 10; + uint32_t Imm25_16 = extractBits(B26, /*Hi=*/25, /*Lo=*/16); + Instr = (Instr & 0xfc000000) | Imm15_0 | Imm25_16; + break; + } + case ELF::R_LARCH_CALL36: { + uint64_t Call36 = (Value + Addend - FinalAddress) >> 2; + auto Pcaddu18i = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm35_16 = + extractBits((Call36 + (1UL << 15)), /*Hi=*/35, /*Lo=*/16) << 5; + Pcaddu18i = (Pcaddu18i & 0xfe00001f) | Imm35_16; + auto Jirl = support::ulittle32_t::ref(TargetPtr + 4); + uint32_t Imm15_0 = extractBits(Call36, /*Hi=*/15, /*Lo=*/0) << 10; + Jirl = (Jirl & 0xfc0003ff) | Imm15_0; + break; + } + case ELF::R_LARCH_GOT_PC_HI20: + case ELF::R_LARCH_PCALA_HI20: { + uint64_t Target = Value + Addend; + uint64_t TargetPage = + (Target + (Target & 0x800)) & ~static_cast(0xfff); + uint64_t PCPage = FinalAddress & ~static_cast(0xfff); + int64_t PageDelta = TargetPage - PCPage; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm31_12 = extractBits(PageDelta, /*Hi=*/31, /*Lo=*/12) << 5; + Instr = (Instr & 0xfe00001f) | Imm31_12; + break; + } + case ELF::R_LARCH_GOT_PC_LO12: + case ELF::R_LARCH_PCALA_LO12: { + uint64_t TargetOffset = (Value + Addend) & 0xfff; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm11_0 = TargetOffset << 10; + Instr = (Instr & 0xffc003ff) | Imm11_0; + break; + } + case ELF::R_LARCH_ABS_HI20: { + uint64_t Target = Value + Addend; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm31_12 = extractBits(Target, /*Hi=*/31, /*Lo=*/12) << 5; + Instr = (Instr & 0xfe00001f) | Imm31_12; + break; + } + case ELF::R_LARCH_ABS_LO12: { + uint64_t Target = Value + Addend; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm11_0 = extractBits(Target, /*Hi=*/11, /*Lo=*/0) << 10; + Instr = (Instr & 0xffc003ff) | Imm11_0; + break; + } + case ELF::R_LARCH_ABS64_LO20: { + uint64_t Target = Value + Addend; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm51_32 = extractBits(Target, /*Hi=*/51, /*Lo=*/32) << 5; + Instr = (Instr & 0xfe00001f) | Imm51_32; + break; + } + case ELF::R_LARCH_ABS64_HI12: { + uint64_t Target = Value + Addend; + auto Instr = support::ulittle32_t::ref(TargetPtr); + uint32_t Imm63_52 = extractBits(Target, /*Hi=*/63, /*Lo=*/52) << 10; + Instr = (Instr & 0xffc003ff) | Imm63_52; + break; + } + case ELF::R_LARCH_ADD32: + support::ulittle32_t::ref{TargetPtr} = + (support::ulittle32_t::ref{TargetPtr} + + static_cast(Value + Addend)); + break; + case ELF::R_LARCH_SUB32: + support::ulittle32_t::ref{TargetPtr} = + (support::ulittle32_t::ref{TargetPtr} - + static_cast(Value + Addend)); + break; + case ELF::R_LARCH_ADD64: + support::ulittle64_t::ref{TargetPtr} = + (support::ulittle64_t::ref{TargetPtr} + Value + Addend); + break; + case ELF::R_LARCH_SUB64: + support::ulittle64_t::ref{TargetPtr} = + (support::ulittle64_t::ref{TargetPtr} - Value - Addend); + break; + } +} + void RuntimeDyldELF::setMipsABI(const ObjectFile &Obj) { if (Arch == Triple::UnknownArch || Triple::getArchTypePrefix(Arch) != "mips") { @@ -1190,6 +1387,9 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section, resolveARMRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL), Type, (uint32_t)(Addend & 0xffffffffL)); break; + case Triple::loongarch64: + resolveLoongArch64Relocation(Section, Offset, Value, Type, Addend); + break; case Triple::ppc: // Fall through. case Triple::ppcle: resolvePPC32Relocation(Section, Offset, Value, Type, Addend); @@ -1515,6 +1715,17 @@ RuntimeDyldELF::processRelocationRef( } processSimpleRelocation(SectionID, Offset, RelType, Value); } + } else if (Arch == Triple::loongarch64) { + if (RelType == ELF::R_LARCH_B26 && MemMgr.allowStubAllocation()) { + resolveLoongArch64Branch(SectionID, Value, RelI, Stubs); + } else if (RelType == ELF::R_LARCH_GOT_PC_HI20 || + RelType == ELF::R_LARCH_GOT_PC_LO12) { + uint64_t GOTOffset = findOrAllocGOTEntry(Value, ELF::R_LARCH_64); + resolveGOTOffsetRelocation(SectionID, Offset, GOTOffset + Addend, + RelType); + } else { + processSimpleRelocation(SectionID, Offset, RelType, Value); + } } else if (IsMipsO32ABI) { uint8_t *Placeholder = reinterpret_cast( computePlaceholderAddress(SectionID, Offset)); @@ -2371,6 +2582,7 @@ size_t RuntimeDyldELF::getGOTEntrySize() { case Triple::x86_64: case Triple::aarch64: case Triple::aarch64_be: + case Triple::loongarch64: case Triple::ppc64: case Triple::ppc64le: case Triple::systemz: @@ -2683,6 +2895,10 @@ bool RuntimeDyldELF::relocationNeedsGot(const RelocationRef &R) const { return RelTy == ELF::R_AARCH64_ADR_GOT_PAGE || RelTy == ELF::R_AARCH64_LD64_GOT_LO12_NC; + if (Arch == Triple::loongarch64) + return RelTy == ELF::R_LARCH_GOT_PC_HI20 || + RelTy == ELF::R_LARCH_GOT_PC_LO12; + if (Arch == Triple::x86_64) return RelTy == ELF::R_X86_64_GOTPCREL || RelTy == ELF::R_X86_64_GOTPCRELX || diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h index 97517884654bc..deb623b1a4bef 100644 --- a/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h +++ b/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h @@ -46,6 +46,18 @@ class RuntimeDyldELF : public RuntimeDyldImpl { void resolveARMRelocation(const SectionEntry &Section, uint64_t Offset, uint32_t Value, uint32_t Type, int32_t Addend); + void resolveLoongArch64Relocation(const SectionEntry &Section, + uint64_t Offset, uint64_t Value, + uint32_t Type, int64_t Addend); + + bool resolveLoongArch64ShortBranch(unsigned SectionID, + relocation_iterator RelI, + const RelocationValueRef &Value); + + void resolveLoongArch64Branch(unsigned SectionID, + const RelocationValueRef &Value, + relocation_iterator RelI, StubMap &Stubs); + void resolvePPC32Relocation(const SectionEntry &Section, uint64_t Offset, uint64_t Value, uint32_t Type, int64_t Addend); @@ -71,6 +83,8 @@ class RuntimeDyldELF : public RuntimeDyldImpl { return 16; else if (IsMipsN64ABI) return 32; + if (Arch == Triple::loongarch64) + return 20; // lu12i.w; ori; lu32i.d; lu52i.d; jr else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) return 44; else if (Arch == Triple::x86_64) diff --git a/llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/ELF_LoongArch_relocations.s b/llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/ELF_LoongArch_relocations.s new file mode 100644 index 0000000000000..0fca88b6e9ba2 --- /dev/null +++ b/llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/ELF_LoongArch_relocations.s @@ -0,0 +1,102 @@ +# RUN: rm -rf %t && mkdir -p %t +# RUN: llvm-mc --triple=loongarch64 --filetype=obj -o %t/reloc.o %s +# RUN: llvm-rtdyld --triple=loongarch64 --verify --check=%s %t/reloc.o \ +# RUN: --map-section reloc.o,.got=0x21f00 \ +# RUN: --dummy-extern abs=0x0123456789abcdef \ +# RUN: --dummy-extern external_data=0x1234 + + .text + .globl main + .p2align 2 + .type main,@function +main: +## Check R_LARCH_ABS_HI20 +# rtdyld-check: *{4}(main) = 0x1513578c + lu12i.w $t0, %abs_hi20(abs) +## Check R_LARCH_ABS_LO12 +# rtdyld-check: *{4}(main + 4) = 0x03b7bd8c + ori $t0, $t0, %abs_lo12(abs) +## Check R_LARCH_ABS64_LO20 +# rtdyld-check: *{4}(main + 8) = 0x1668acec + lu32i.d $t0, %abs64_lo20(abs) +## Check R_LARCH_ABS64_HI12 +# rtdyld-check: *{4}(main + 12) = 0x0300498c + lu52i.d $t0, $t0, %abs64_hi12(abs) + ret + .size main, .-main + + .globl local_func + .p2align 2 + .type local_func,@function +local_func: + ret + .size local_func, .-local_func + + .globl local_func_call26 + .p2align 2 +local_func_call26: +## Check R_LARCH_B26 +# rtdyld-check: decode_operand(local_func_call26, 0)[27:0] = \ +# rtdyld-check: (local_func - local_func_call26)[27:0] + bl local_func + .size local_func_call26, .-local_func_call26 + + .globl local_func_call36 + .p2align 2 +local_func_call36: +## Check R_LARCH_CALL36 +# rtdyld-check: decode_operand(local_func_call36, 1)[19:0] = \ +# rtdyld-check: ((local_func - local_func_call36) + \ +# rtdyld-check: (((local_func - local_func_call36)[17:17]) << 17))[37:18] +# rtdyld-check: decode_operand(local_func_call36 + 4, 2)[17:0] = \ +# rtdyld-check: (local_func - local_func_call36)[17:0] + pcaddu18i $ra, %call36(local_func) + jirl $ra, $ra, 0 + .size local_func_call36, .-local_func_call36 + + .globl test_pc_hi20 + .p2align 2 +test_pc_hi20: +## Check R_LARCH_PCALA_HI20 +# rtdyld-check: decode_operand(test_pc_hi20, 1)[19:0] = \ +# rtdyld-check: (named_data - test_pc_hi20)[31:12] + \ +# rtdyld-check: named_data[11:11] + pcalau12i $a0, %pc_hi20(named_data) + .size test_pc_hi20, .-test_pc_hi20 + + .globl test_pc_lo12 + .p2align 2 +test_pc_lo12: +## Check R_LARCH_PCALA_LO12 +# rtdyld-check: decode_operand(test_pc_lo12, 2)[11:0] = \ +# rtdyld-check: (named_data)[11:0] + addi.d $a0, $a0, %pc_lo12(named_data) + .size test_pc_lo12, .-test_pc_lo12 + + .globl test_got_pc_hi20 + .p2align 2 +test_got_pc_hi20: +## Check R_LARCH_GOT_PC_HI20 +# rtdyld-check: decode_operand(test_got_pc_hi20, 1)[19:0] = \ +# rtdyld-check: (section_addr(reloc.o, .got)[31:12] - \ +# rtdyld-check: test_got_pc_hi20[31:12] + \ +# rtdyld-check: section_addr(reloc.o, .got)[11:11]) + pcalau12i $a0, %got_pc_hi20(external_data) + .size test_got_pc_hi20, .-test_got_pc_hi20 + + .globl test_got_pc_lo12 + .p2align 2 +test_got_pc_lo12: +## Check R_LARCH_GOT_PC_LO12 +# rtdyld-check: decode_operand(test_got_pc_lo12, 2)[11:0] = \ +# rtdyld-check: (section_addr(reloc.o, .got)[11:0]) + ld.d $a0, $a0, %got_pc_lo12(external_data) + .size test_gotoffset12_external, .-test_gotoffset12_external + + .globl named_data + .p2align 4 + .type named_data,@object +named_data: + .quad 0x2222222222222222 + .quad 0x3333333333333333 + .size named_data, .-named_data diff --git a/llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/lit.local.cfg b/llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/lit.local.cfg new file mode 100644 index 0000000000000..cc24278acbb41 --- /dev/null +++ b/llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/lit.local.cfg @@ -0,0 +1,2 @@ +if not "LoongArch" in config.root.targets: + config.unsupported = True From f390561ee9c49dd10f0b13b79b713624664d7da2 Mon Sep 17 00:00:00 2001 From: wanglei Date: Mon, 4 Nov 2024 17:12:03 +0800 Subject: [PATCH 2/4] comply with code style Created using spr 1.3.5-bogner --- lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h index 6e57b0806e54f..5069bc48bbfba 100644 --- a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h +++ b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef liblldb_ABISysV_loongarch_h_ -#define liblldb_ABISysV_loongarch_h_ +#ifndef LLDB_SOURCE_PLUGINS_ABI_LOONGARCH_ABISYSV_LOONGARCH_H +#define LLDB_SOURCE_PLUGINS_ABI_LOONGARCH_ABISYSV_LOONGARCH_H // Other libraries and framework includes #include "llvm/TargetParser/Triple.h" @@ -101,4 +101,4 @@ class ABISysV_loongarch : public lldb_private::RegInfoBasedABI { // loongarch32 }; -#endif // liblldb_ABISysV_loongarch_h_ +#endif // LLDB_SOURCE_PLUGINS_ABI_LOONGARCH_ABISYSV_LOONGARCH_H From 8363707da351b6f2c10f1e945514402c5ceea65d Mon Sep 17 00:00:00 2001 From: wanglei Date: Tue, 5 Nov 2024 18:28:25 +0800 Subject: [PATCH 3/4] Address @DavidSpickett's comments Created using spr 1.3.5-bogner --- .../ABI/LoongArch/ABISysV_loongarch.cpp | 200 +++++++++--------- .../Plugins/ABI/LoongArch/ABISysV_loongarch.h | 6 +- 2 files changed, 107 insertions(+), 99 deletions(-) diff --git a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp index cd8270c01113f..1624af4fd6f6e 100644 --- a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp +++ b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp @@ -30,10 +30,10 @@ // The ABI is not a source of such information as size, offset, encoding, etc. // of a register. Just provides correct dwarf and eh_frame numbers. -#define DEFINE_GENERIC_REGISTER_STUB(dwarf_num, str_name, generic_num) \ +#define DEFINE_GENERIC_REGISTER_STUB(dwarf_num, generic_num) \ { \ DEFINE_REG_NAME(dwarf_num), \ - DEFINE_REG_NAME_STR(str_name), \ + DEFINE_REG_NAME_STR(nullptr), \ 0, \ 0, \ eEncodingInvalid, \ @@ -44,8 +44,8 @@ nullptr, \ } -#define DEFINE_REGISTER_STUB(dwarf_num, str_name) \ - DEFINE_GENERIC_REGISTER_STUB(dwarf_num, str_name, LLDB_INVALID_REGNUM) +#define DEFINE_REGISTER_STUB(dwarf_num) \ + DEFINE_GENERIC_REGISTER_STUB(dwarf_num, LLDB_INVALID_REGNUM) using namespace lldb; using namespace lldb_private; @@ -94,39 +94,39 @@ enum regnums { }; static const std::array g_register_infos = { - {DEFINE_REGISTER_STUB(r0, nullptr), - DEFINE_GENERIC_REGISTER_STUB(r1, nullptr, LLDB_REGNUM_GENERIC_RA), - DEFINE_REGISTER_STUB(r2, nullptr), - DEFINE_GENERIC_REGISTER_STUB(r3, nullptr, LLDB_REGNUM_GENERIC_SP), - DEFINE_GENERIC_REGISTER_STUB(r4, nullptr, LLDB_REGNUM_GENERIC_ARG1), - DEFINE_GENERIC_REGISTER_STUB(r5, nullptr, LLDB_REGNUM_GENERIC_ARG2), - DEFINE_GENERIC_REGISTER_STUB(r6, nullptr, LLDB_REGNUM_GENERIC_ARG3), - DEFINE_GENERIC_REGISTER_STUB(r7, nullptr, LLDB_REGNUM_GENERIC_ARG4), - DEFINE_GENERIC_REGISTER_STUB(r8, nullptr, LLDB_REGNUM_GENERIC_ARG5), - DEFINE_GENERIC_REGISTER_STUB(r9, nullptr, LLDB_REGNUM_GENERIC_ARG6), - DEFINE_GENERIC_REGISTER_STUB(r10, nullptr, LLDB_REGNUM_GENERIC_ARG7), - DEFINE_GENERIC_REGISTER_STUB(r11, nullptr, LLDB_REGNUM_GENERIC_ARG8), - DEFINE_REGISTER_STUB(r12, nullptr), - DEFINE_REGISTER_STUB(r13, nullptr), - DEFINE_REGISTER_STUB(r14, nullptr), - DEFINE_REGISTER_STUB(r15, nullptr), - DEFINE_REGISTER_STUB(r16, nullptr), - DEFINE_REGISTER_STUB(r17, nullptr), - DEFINE_REGISTER_STUB(r18, nullptr), - DEFINE_REGISTER_STUB(r19, nullptr), - DEFINE_REGISTER_STUB(r20, nullptr), - DEFINE_REGISTER_STUB(r21, nullptr), - DEFINE_GENERIC_REGISTER_STUB(r22, nullptr, LLDB_REGNUM_GENERIC_FP), - DEFINE_REGISTER_STUB(r23, nullptr), - DEFINE_REGISTER_STUB(r24, nullptr), - DEFINE_REGISTER_STUB(r25, nullptr), - DEFINE_REGISTER_STUB(r26, nullptr), - DEFINE_REGISTER_STUB(r27, nullptr), - DEFINE_REGISTER_STUB(r28, nullptr), - DEFINE_REGISTER_STUB(r29, nullptr), - DEFINE_REGISTER_STUB(r30, nullptr), - DEFINE_REGISTER_STUB(r31, nullptr), - DEFINE_GENERIC_REGISTER_STUB(pc, nullptr, LLDB_REGNUM_GENERIC_PC)}}; + {DEFINE_REGISTER_STUB(r0), + DEFINE_GENERIC_REGISTER_STUB(r1, LLDB_REGNUM_GENERIC_RA), + DEFINE_REGISTER_STUB(r2), + DEFINE_GENERIC_REGISTER_STUB(r3, LLDB_REGNUM_GENERIC_SP), + DEFINE_GENERIC_REGISTER_STUB(r4, LLDB_REGNUM_GENERIC_ARG1), + DEFINE_GENERIC_REGISTER_STUB(r5, LLDB_REGNUM_GENERIC_ARG2), + DEFINE_GENERIC_REGISTER_STUB(r6, LLDB_REGNUM_GENERIC_ARG3), + DEFINE_GENERIC_REGISTER_STUB(r7, LLDB_REGNUM_GENERIC_ARG4), + DEFINE_GENERIC_REGISTER_STUB(r8, LLDB_REGNUM_GENERIC_ARG5), + DEFINE_GENERIC_REGISTER_STUB(r9, LLDB_REGNUM_GENERIC_ARG6), + DEFINE_GENERIC_REGISTER_STUB(r10, LLDB_REGNUM_GENERIC_ARG7), + DEFINE_GENERIC_REGISTER_STUB(r11, LLDB_REGNUM_GENERIC_ARG8), + DEFINE_REGISTER_STUB(r12), + DEFINE_REGISTER_STUB(r13), + DEFINE_REGISTER_STUB(r14), + DEFINE_REGISTER_STUB(r15), + DEFINE_REGISTER_STUB(r16), + DEFINE_REGISTER_STUB(r17), + DEFINE_REGISTER_STUB(r18), + DEFINE_REGISTER_STUB(r19), + DEFINE_REGISTER_STUB(r20), + DEFINE_REGISTER_STUB(r21), + DEFINE_GENERIC_REGISTER_STUB(r22, LLDB_REGNUM_GENERIC_FP), + DEFINE_REGISTER_STUB(r23), + DEFINE_REGISTER_STUB(r24), + DEFINE_REGISTER_STUB(r25), + DEFINE_REGISTER_STUB(r26), + DEFINE_REGISTER_STUB(r27), + DEFINE_REGISTER_STUB(r28), + DEFINE_REGISTER_STUB(r29), + DEFINE_REGISTER_STUB(r30), + DEFINE_REGISTER_STUB(r31), + DEFINE_GENERIC_REGISTER_STUB(pc, LLDB_REGNUM_GENERIC_PC)}}; } // namespace dwarf } // namespace @@ -275,44 +275,49 @@ Status ABISysV_loongarch::SetReturnValueObject(StackFrameSP &frame_sp, } size_t reg_size = m_is_la64 ? 8 : 4; - if (num_bytes <= 2 * reg_size) { - offset_t offset = 0; - uint64_t raw_value = data.GetMaxU64(&offset, num_bytes); - - auto reg_info = - reg_ctx.GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1); - if (!reg_ctx.WriteRegisterFromUnsigned(reg_info, raw_value)) { - result = Status::FromErrorStringWithFormat( - "Couldn't write value to register %s", reg_info->name); - return result; - } - - if (num_bytes <= reg_size) - return result; // Successfully written. - - // for loongarch32, get the upper 32 bits from raw_value and write them - // for loongarch64, get the next 64 bits from data and write them - if (4 == reg_size) - raw_value >>= 32; - else - raw_value = data.GetMaxU64(&offset, num_bytes - reg_size); - reg_info = - reg_ctx.GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2); - if (!reg_ctx.WriteRegisterFromUnsigned(reg_info, raw_value)) { - result = Status::FromErrorStringWithFormat( - "Couldn't write value to register %s", reg_info->name); - } + // Currently, we only support sizeof(data) <= 2 * reg_size. + // 1. If the (`size` <= reg_size), the `data` will be returned through `ARG1`. + // 2. If the (`size` > reg_size && `size` <= 2 * reg_size), the `data` will be + // returned through a pair of registers (ARG1 and ARG2), and the lower-ordered + // bits in the `ARG1`. + if (num_bytes > 2 * reg_size) { + result = Status::FromErrorString( + "We don't support returning large integer values at present."); + return result; + } + offset_t offset = 0; + uint64_t raw_value = data.GetMaxU64(&offset, num_bytes); + auto reg_info = + reg_ctx.GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1); + if (!reg_ctx.WriteRegisterFromUnsigned(reg_info, raw_value)) { + result = Status::FromErrorStringWithFormat( + "Couldn't write value to register %s", reg_info->name); return result; } - result = Status::FromErrorString( - "We don't support returning large integer values at present."); + if (num_bytes <= reg_size) + return result; // Successfully written. + + // For loongarch32, get the upper 32 bits from raw_value and write them. + // For loongarch64, get the next 64 bits from data and write them. + if (4 == reg_size) + raw_value >>= 32; + else + raw_value = data.GetMaxU64(&offset, num_bytes - reg_size); + + reg_info = + reg_ctx.GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2); + if (!reg_ctx.WriteRegisterFromUnsigned(reg_info, raw_value)) + result = Status::FromErrorStringWithFormat( + "Couldn't write value to register %s", reg_info->name); + return result; } template static void SetInteger(Scalar &scalar, uint64_t raw_value, bool is_signed) { + static_assert(std::is_unsigned::value, "T must be an unsigned type."); raw_value &= std::numeric_limits::max(); if (is_signed) scalar = static_cast::type>(raw_value); @@ -371,11 +376,11 @@ static ValueObjectSP GetValObjFromIntRegs(Thread &thread, uint32_t byte_size) { Value value; ValueObjectSP return_valobj_sp; - auto reg_info_a0 = + auto *reg_info_a0 = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1); - auto reg_info_a1 = + auto *reg_info_a1 = reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2); - uint64_t raw_value; + uint64_t raw_value = 0; switch (byte_size) { case sizeof(uint32_t): @@ -383,9 +388,21 @@ static ValueObjectSP GetValObjFromIntRegs(Thread &thread, raw_value = reg_ctx->ReadRegisterAsUnsigned(reg_info_a0, 0) & UINT32_MAX; break; case sizeof(uint64_t): - raw_value = reg_ctx->ReadRegisterAsUnsigned(reg_info_a0, 0); + // Read a0 to get the arg on loongarch64, a0 and a1 on loongarch32 + if (llvm::Triple::loongarch32 == machine) { + raw_value = reg_ctx->ReadRegisterAsUnsigned(reg_info_a0, 0) & UINT32_MAX; + raw_value |= + (reg_ctx->ReadRegisterAsUnsigned(reg_info_a1, 0) & UINT32_MAX) << 32U; + } else { + raw_value = reg_ctx->ReadRegisterAsUnsigned(reg_info_a0, 0); + } break; case 16: { + // Read a0 and a1 to get the arg on loongarch64, not supported on + // loongarch32 + if (llvm::Triple::loongarch32 == machine) + return return_valobj_sp; + // Create the ValueObjectSP here and return std::unique_ptr heap_data_up( new DataBufferHeap(byte_size, 0)); @@ -412,8 +429,8 @@ static ValueObjectSP GetValObjFromIntRegs(Thread &thread, } if (type_flags & eTypeIsInteger) { - const bool is_signed = (type_flags & eTypeIsSigned) != 0; - if (!SetSizedInteger(value.GetScalar(), raw_value, byte_size, is_signed)) + if (!SetSizedInteger(value.GetScalar(), raw_value, byte_size, + type_flags & eTypeIsSigned)) return return_valobj_sp; } else if (type_flags & eTypeIsFloat) { if (!SetSizedFloat(value.GetScalar(), raw_value, byte_size)) @@ -432,7 +449,7 @@ static ValueObjectSP GetValObjFromFPRegs(Thread &thread, llvm::Triple::ArchType machine, uint32_t type_flags, uint32_t byte_size) { - auto reg_info_fa0 = reg_ctx->GetRegisterInfoByName("f0"); + auto *reg_info_fa0 = reg_ctx->GetRegisterInfoByName("f0"); bool use_fp_regs = false; ValueObjectSP return_valobj_sp; @@ -472,13 +489,11 @@ ValueObjectSP ABISysV_loongarch::GetReturnValueObjectSimple( const ArchSpec arch = thread.GetProcess()->GetTarget().GetArchitecture(); const llvm::Triple::ArchType machine = arch.GetMachine(); - // Integer return type. if (type_flags & eTypeIsInteger) { return_valobj_sp = GetValObjFromIntRegs(thread, reg_ctx, machine, type_flags, byte_size); return return_valobj_sp; } - // Pointer return type. if (type_flags & eTypeIsPointer) { const auto *reg_info_a0 = reg_ctx->GetRegisterInfo( eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1); @@ -487,7 +502,6 @@ ValueObjectSP ABISysV_loongarch::GetReturnValueObjectSimple( return ValueObjectConstResult::Create(thread.GetStackFrameAtIndex(0).get(), value, ConstString("")); } - // Floating point return type. if (type_flags & eTypeIsFloat) { uint32_t float_count = 0; bool is_complex = false; @@ -576,28 +590,22 @@ bool ABISysV_loongarch::RegisterIsCalleeSaved(const RegisterInfo *reg_info) { const char *name = reg_info->name; ArchSpec arch = GetProcessSP()->GetTarget().GetArchitecture(); uint32_t arch_flags = arch.GetFlags(); - // floating point registers are only callee saved when using - // F or D hardware floating point ABIs + // Floating point registers are only callee saved when using + // F or D hardware floating point ABIs. bool is_hw_fp = (arch_flags & ArchSpec::eLoongArch_abi_mask) != 0; - bool is_callee_saved = llvm::StringSwitch(name) - // integer ABI names - .Cases("ra", "sp", "fp", true) - .Cases("s0", "s1", "s2", "s3", "s4", "s5", "s6", - "s7", "s8", "s9", true) - // integer hardware names - .Cases("r1", "r3", "r22", true) - .Cases("r23", "r24", "r25", "r26", "r27", "r28", - "r29", "r30", "31", true) - // floating point ABI names - .Cases("fs0", "fs1", "fs2", "fs3", "fs4", "fs5", - "fs6", "fs7", is_hw_fp) - // floating point hardware names - .Cases("f24", "f25", "f26", "f27", "f28", "f29", - "f30", "f31", is_hw_fp) - .Default(false); - - return is_callee_saved; + return llvm::StringSwitch(name) + // integer ABI names + .Cases("ra", "sp", "fp", true) + .Cases("s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", true) + // integer hardware names + .Cases("r1", "r3", "r22", true) + .Cases("r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "31", true) + // floating point ABI names + .Cases("fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", is_hw_fp) + // floating point hardware names + .Cases("f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", is_hw_fp) + .Default(false); } void ABISysV_loongarch::Initialize() { diff --git a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h index 5069bc48bbfba..b66def7684dc4 100644 --- a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h +++ b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h @@ -48,17 +48,17 @@ class ABISysV_loongarch : public lldb_private::RegInfoBasedABI { bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override; bool CallFrameAddressIsValid(lldb::addr_t cfa) override { - // The CFA must be 128 bit aligned. + // The CFA must be 16 byte aligned. return (cfa & 0xfull) == 0; } void SetIsLA64(bool is_la64) { m_is_la64 = is_la64; } bool CodeAddressIsValid(lldb::addr_t pc) override { + // Code address must be 4 byte aligned. if (pc & (4ull - 1ull)) - return false; // Not 4 byte aligned + return false; - // Anything else if fair game.. return true; } From a58dc83ef2023827fbef194af1ac2f648f24f5ec Mon Sep 17 00:00:00 2001 From: wanglei Date: Wed, 6 Nov 2024 17:48:46 +0800 Subject: [PATCH 4/4] Address @SixWeining's comments Created using spr 1.3.5-bogner --- .../ABI/LoongArch/ABISysV_loongarch.cpp | 25 +++++++++++-------- .../Plugins/ABI/LoongArch/ABISysV_loongarch.h | 3 +-- 2 files changed, 16 insertions(+), 12 deletions(-) diff --git a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp index 1624af4fd6f6e..dc7e9bba00067 100644 --- a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp +++ b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp @@ -13,6 +13,7 @@ #include #include "llvm/IR/DerivedTypes.h" +#include "llvm/Support/MathExtras.h" #include "Utility/LoongArch_DWARF_Registers.h" #include "lldb/Core/PluginManager.h" @@ -56,11 +57,11 @@ namespace { namespace dwarf { enum regnums { r0, - ra, - r1 = ra, + r1, + ra = r1, r2, - sp, - r3 = sp, + r3, + sp = r3, r4, r5, r6, @@ -79,8 +80,8 @@ enum regnums { r19, r20, r21, - fp, - r22 = fp, + r22, + fp = r22, r23, r24, r25, @@ -154,7 +155,7 @@ ABISysV_loongarch::CreateInstance(ProcessSP process_sp, const ArchSpec &arch) { ABISysV_loongarch *abi = new ABISysV_loongarch(std::move(process_sp), MakeMCRegisterInfo(arch)); if (abi) - abi->SetIsLA64((llvm::Triple::loongarch64 == machine) ? true : false); + abi->SetIsLA64(llvm::Triple::loongarch64 == machine); return ABISP(abi); } @@ -211,11 +212,11 @@ bool ABISysV_loongarch::PrepareTrivialCall(Thread &thread, addr_t sp, for (auto [idx, arg] : enumerate(args)) { const RegisterInfo *reg_info = reg_ctx_sp->GetRegisterInfo( eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + idx); - LLDB_LOG(log, "About to write arg{0} (0x{1:x}) into {2}", idx, arg, + LLDB_LOG(log, "About to write arg{0} ({1:x}) into {2}", idx, arg, reg_info->name); if (!reg_ctx_sp->WriteRegisterFromUnsigned(reg_info, arg)) { - LLDB_LOG(log, "Failed to write arg{0} (0x{1:x}) into {2}", idx, arg, + LLDB_LOG(log, "Failed to write arg{0} ({1:x}) into {2}", idx, arg, reg_info->name); return false; } @@ -231,7 +232,7 @@ bool ABISysV_loongarch::PrepareTrivialCall(Thread &thread, addr_t sp, LLDB_REGNUM_GENERIC_RA, return_addr)) return false; - LLDB_LOG(log, "ABISysV_riscv::{0}() success", __FUNCTION__); + LLDB_LOG(log, "ABISysV_loongarch::{0}() success", __FUNCTION__); return true; } @@ -288,6 +289,10 @@ Status ABISysV_loongarch::SetReturnValueObject(StackFrameSP &frame_sp, offset_t offset = 0; uint64_t raw_value = data.GetMaxU64(&offset, num_bytes); + // According to psABI, i32 (no matter signed or unsigned) should be + // sign-extended in register. + if (4 == num_bytes && m_is_la64) + raw_value = llvm::SignExtend64<32>(raw_value); auto reg_info = reg_ctx.GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1); if (!reg_ctx.WriteRegisterFromUnsigned(reg_info, raw_value)) { diff --git a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h index b66def7684dc4..144af041331d4 100644 --- a/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h +++ b/lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h @@ -97,8 +97,7 @@ class ABISysV_loongarch : public lldb_private::RegInfoBasedABI { using lldb_private::RegInfoBasedABI::RegInfoBasedABI; // Call CreateInstance // instead. - bool m_is_la64; // true if target is loongarch64; false if target is - // loongarch32 + bool m_is_la64; }; #endif // LLDB_SOURCE_PLUGINS_ABI_LOONGARCH_ABISYSV_LOONGARCH_H