[mlir] Consider moving away from linking LLVM IR for host and device code in SPIR-V CPU Runner flow

[andfau-amd]

See this discussion for more details: #114563 (comment)

One possible outcome is we simply keep things as they are, but there may be a better option. In particular, if "device" CPU compilation/execution could be offloaded in a similar way as for GPU devices, there would be a better alignment between the SPIR-V CPU Runner and e.g. the Vulkan Runner.

[llvmbot]

@llvm/issue-subscribers-mlir-spirv

Author: Andrea Faulds (andfau-amd)

See this discussion for more details: https://github.com//pull/114563#discussion_r1831742718

One possible outcome is we simply keep things as they are, but there may be a better option. In particular, if "device" CPU compilation/execution could be offloaded in a similar way as for GPU devices, there would be a better alignment between the SPIR-V CPU Runner and e.g. the Vulkan Runner.

[kuhar]

@fabianmcg explained how this could be implemented by serializing LLVM bitcode: #114563 (comment)