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[sve][abi] gcc and llvm don't have the same call conventions #109526

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vfdff opened this issue Sep 21, 2024 · 7 comments
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[sve][abi] gcc and llvm don't have the same call conventions #109526

vfdff opened this issue Sep 21, 2024 · 7 comments
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ABI Application Binary Interface backend:AArch64 SVE ARM Scalable Vector Extensions

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@vfdff
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vfdff commented Sep 21, 2024

class SimdFloat
{
private:
    typedef svfloat32_t simdInternalType_
            __attribute__((arm_sve_vector_bits(512)));

public:
    SimdFloat() {}

    SimdFloat(const float f) { this->simdInternal_ = svdup_n_f32(f); }

    SimdFloat(svfloat32_t simd) : simdInternal_(simd) {}

    simdInternalType_ simdInternal_;
};
...

SimdFloat foo (SimdFloat a , SimdFloat b, const float* m, const float* n) {
    SimdFloat mc =  simdLoadFloat(m);
    SimdFloat nc =  simdLoadFloat(n);
    return a + b + nc + mc;
}
  • For above test case, the gcc use register z0 and z1 to pass the argument a and b, while llvm pass them with memory

Smaller example: https://gcc.godbolt.org/z/K484P4zEr

@EugeneZelenko EugeneZelenko added backend:AArch64 ABI Application Binary Interface SVE ARM Scalable Vector Extensions and removed new issue labels Sep 21, 2024
@llvmbot
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llvmbot commented Sep 21, 2024

@llvm/issue-subscribers-backend-aarch64

Author: Allen (vfdff)

* test: https://gcc.godbolt.org/z/5o8YofrrG ``` SimdFloat foo (SimdFloat a , SimdFloat b, const float* m, const float* n) { SimdFloat mc = simdLoadFloat(m); SimdFloat nc = simdLoadFloat(n); return a + b + nc + mc; } ``` * For above test case, the gcc use register z0 and z1 to pass the argument a and b, while llvm pass them with memory

@aemerson
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@sdesmalen-arm @davemgreen

@pinskia
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pinskia commented Sep 21, 2024

https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#pure-scalable-types-psts
Since svfloat32_t is a Pure Scalable Type, then SimdFloat should be too; specifically: "and without regard to access control or other source language restrictions. " So GCC argument passing here seems correct and LLVM is wrong.

@vfdff
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vfdff commented Sep 23, 2024

Thanks , a little simplified test: https://gcc.godbolt.org/z/jKjcY5sK1

#include<arm_sve.h>
typedef svfloat32_t fvec32 __attribute__((arm_sve_vector_bits(256)));

typedef class SimdFloat {
public:
     fvec32 vect_f32;
} __m256, __m256d;

SimdFloat _mm256_mul_ps1(SimdFloat a, SimdFloat b) {
    __m256 res;
    res.vect_f32 = svmul_f32_z(svptrue_b32(), a.vect_f32, b.vect_f32);
    return res;
}

@sdesmalen-arm
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https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#pure-scalable-types-psts Since svfloat32_t is a Pure Scalable Type, then SimdFloat should be too; specifically: "and without regard to access control or other source language restrictions. " So GCC argument passing here seems correct and LLVM is wrong.

In combination with https://github.com/ARM-software/acle/blob/main/main/acle.md?plain=1#L6845 I'm tempted to agree that LLVM should have mapped this type to a pure scalable type.

@whokeke
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whokeke commented Nov 19, 2024

image

Has it been fixed now? Which PR?

@davemgreen
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I believe this was fixed in #112747 from @momchil-velikov.

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