24
24
#include " llvm/CodeGen/LiveIntervals.h"
25
25
#include " llvm/CodeGen/LiveRangeEdit.h"
26
26
#include " llvm/CodeGen/MachineBasicBlock.h"
27
+ #include " llvm/CodeGen/MachineDominators.h"
27
28
#include " llvm/CodeGen/MachineFunction.h"
28
29
#include " llvm/CodeGen/MachineFunctionPass.h"
29
30
#include " llvm/CodeGen/MachineInstr.h"
30
31
#include " llvm/CodeGen/MachineInstrBuilder.h"
31
32
#include " llvm/CodeGen/MachineLoopInfo.h"
32
33
#include " llvm/CodeGen/MachineOperand.h"
34
+ #include " llvm/CodeGen/MachinePassManager.h"
33
35
#include " llvm/CodeGen/MachineRegisterInfo.h"
34
36
#include " llvm/CodeGen/Passes.h"
35
37
#include " llvm/CodeGen/RegisterClassInfo.h"
38
+ #include " llvm/CodeGen/RegisterCoalescerPass.h"
36
39
#include " llvm/CodeGen/SlotIndexes.h"
37
40
#include " llvm/CodeGen/TargetInstrInfo.h"
38
41
#include " llvm/CodeGen/TargetOpcodes.h"
@@ -121,13 +124,13 @@ namespace {
121
124
122
125
class JoinVals ;
123
126
124
- class RegisterCoalescer : public MachineFunctionPass ,
125
- private LiveRangeEdit::Delegate {
127
+ class RegisterCoalescer : private LiveRangeEdit ::Delegate {
126
128
MachineFunction *MF = nullptr ;
127
129
MachineRegisterInfo *MRI = nullptr ;
128
130
const TargetRegisterInfo *TRI = nullptr ;
129
131
const TargetInstrInfo *TII = nullptr ;
130
132
LiveIntervals *LIS = nullptr ;
133
+ SlotIndexes *SI = nullptr ;
131
134
const MachineLoopInfo *Loops = nullptr ;
132
135
RegisterClassInfo RegClassInfo;
133
136
@@ -372,11 +375,24 @@ class RegisterCoalescer : public MachineFunctionPass,
372
375
void checkMergingChangesDbgValuesImpl (Register Reg, LiveRange &OtherRange,
373
376
LiveRange &RegRange, JoinVals &Vals2);
374
377
378
+ public:
379
+ // For legacy pass only.
380
+ RegisterCoalescer () {}
381
+ RegisterCoalescer &operator =(RegisterCoalescer &&Other) = default ;
382
+
383
+ RegisterCoalescer (LiveIntervals *LIS, SlotIndexes *SI,
384
+ const MachineLoopInfo *Loops)
385
+ : LIS(LIS), SI(SI), Loops(Loops) {}
386
+
387
+ bool run (MachineFunction &MF);
388
+ };
389
+
390
+ class RegisterCoalescerLegacy : public MachineFunctionPass {
375
391
public:
376
392
static char ID; // /< Class identification, replacement for typeinfo
377
393
378
- RegisterCoalescer () : MachineFunctionPass(ID) {
379
- initializeRegisterCoalescerPass (*PassRegistry::getPassRegistry ());
394
+ RegisterCoalescerLegacy () : MachineFunctionPass(ID) {
395
+ initializeRegisterCoalescerLegacyPass (*PassRegistry::getPassRegistry ());
380
396
}
381
397
382
398
void getAnalysisUsage (AnalysisUsage &AU) const override ;
@@ -386,24 +402,22 @@ class RegisterCoalescer : public MachineFunctionPass,
386
402
MachineFunctionProperties::Property::IsSSA);
387
403
}
388
404
389
- void releaseMemory () override ;
390
-
391
405
// / This is the pass entry point.
392
406
bool runOnMachineFunction (MachineFunction &) override ;
393
407
};
394
408
395
409
} // end anonymous namespace
396
410
397
- char RegisterCoalescer ::ID = 0 ;
411
+ char RegisterCoalescerLegacy ::ID = 0 ;
398
412
399
- char &llvm::RegisterCoalescerID = RegisterCoalescer ::ID;
413
+ char &llvm::RegisterCoalescerID = RegisterCoalescerLegacy ::ID;
400
414
401
- INITIALIZE_PASS_BEGIN (RegisterCoalescer , " register-coalescer" ,
415
+ INITIALIZE_PASS_BEGIN (RegisterCoalescerLegacy , " register-coalescer" ,
402
416
" Register Coalescer" , false , false )
403
417
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
404
418
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
405
419
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
406
- INITIALIZE_PASS_END(RegisterCoalescer , " register-coalescer" ,
420
+ INITIALIZE_PASS_END(RegisterCoalescerLegacy , " register-coalescer" ,
407
421
" Register Coalescer" , false , false )
408
422
409
423
[[nodiscard]] static bool isMoveInstr(const TargetRegisterInfo &tri,
@@ -580,8 +594,9 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const {
580
594
}
581
595
}
582
596
583
- void RegisterCoalescer ::getAnalysisUsage (AnalysisUsage &AU) const {
597
+ void RegisterCoalescerLegacy ::getAnalysisUsage (AnalysisUsage &AU) const {
584
598
AU.setPreservesCFG ();
599
+ AU.addUsedIfAvailable <SlotIndexesWrapperPass>();
585
600
AU.addRequired <LiveIntervalsWrapperPass>();
586
601
AU.addPreserved <LiveIntervalsWrapperPass>();
587
602
AU.addPreserved <SlotIndexesWrapperPass>();
@@ -4226,15 +4241,35 @@ void RegisterCoalescer::joinAllIntervals() {
4226
4241
lateLiveIntervalUpdate ();
4227
4242
}
4228
4243
4229
- void RegisterCoalescer::releaseMemory () {
4230
- ErasedInstrs.clear ();
4231
- WorkList.clear ();
4232
- DeadDefs.clear ();
4233
- InflateRegs.clear ();
4234
- LargeLIVisitCounter.clear ();
4244
+ PreservedAnalyses
4245
+ RegisterCoalescerPass::run (MachineFunction &MF,
4246
+ MachineFunctionAnalysisManager &MFAM) {
4247
+ MFPropsModifier _ (*this , MF);
4248
+ auto &LIS = MFAM.getResult <LiveIntervalsAnalysis>(MF);
4249
+ auto &Loops = MFAM.getResult <MachineLoopAnalysis>(MF);
4250
+ auto *SI = MFAM.getCachedResult <SlotIndexesAnalysis>(MF);
4251
+ RegisterCoalescer Impl (&LIS, SI, &Loops);
4252
+ if (!Impl.run (MF))
4253
+ return PreservedAnalyses::all ();
4254
+ auto PA = getMachineFunctionPassPreservedAnalyses ();
4255
+ PA.preserveSet <CFGAnalyses>();
4256
+ PA.preserve <LiveIntervalsAnalysis>();
4257
+ PA.preserve <SlotIndexesAnalysis>();
4258
+ PA.preserve <MachineLoopAnalysis>();
4259
+ PA.preserve <MachineDominatorTreeAnalysis>();
4260
+ return PA;
4261
+ }
4262
+
4263
+ bool RegisterCoalescerLegacy::runOnMachineFunction (MachineFunction &MF) {
4264
+ auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS ();
4265
+ auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI ();
4266
+ auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>();
4267
+ SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI () : nullptr ;
4268
+ RegisterCoalescer Impl (LIS, SI, Loops);
4269
+ return Impl.run (MF);
4235
4270
}
4236
4271
4237
- bool RegisterCoalescer::runOnMachineFunction (MachineFunction &fn) {
4272
+ bool RegisterCoalescer::run (MachineFunction &fn) {
4238
4273
LLVM_DEBUG (dbgs () << " ********** REGISTER COALESCER **********\n "
4239
4274
<< " ********** Function: " << fn.getName () << ' \n ' );
4240
4275
@@ -4257,8 +4292,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
4257
4292
const TargetSubtargetInfo &STI = fn.getSubtarget ();
4258
4293
TRI = STI.getRegisterInfo ();
4259
4294
TII = STI.getInstrInfo ();
4260
- LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS ();
4261
- Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI ();
4262
4295
if (EnableGlobalCopies == cl::BOU_UNSET)
4263
4296
JoinGlobalCopies = STI.enableJoinGlobalCopies ();
4264
4297
else
@@ -4283,7 +4316,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
4283
4316
JoinSplitEdges = EnableJoinSplits;
4284
4317
4285
4318
if (VerifyCoalescing)
4286
- MF->verify (this , " Before register coalescing" , &errs ());
4319
+ MF->verify (LIS, SI , " Before register coalescing" , &errs ());
4287
4320
4288
4321
DbgVRegToValues.clear ();
4289
4322
buildVRegToDbgValueMap (fn);
@@ -4342,7 +4375,8 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
4342
4375
RegToPHIIdx.clear ();
4343
4376
4344
4377
LLVM_DEBUG (LIS->dump ());
4378
+
4345
4379
if (VerifyCoalescing)
4346
- MF->verify (this , " After register coalescing" , &errs ());
4380
+ MF->verify (LIS, SI , " After register coalescing" , &errs ());
4347
4381
return true ;
4348
4382
}
0 commit comments