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[CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698)
1 parent 567d28d commit fe9a97c

14 files changed

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-28
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//===- llvm/CodeGen/RegisterCoalescerPass.h ---------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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9+
#ifndef LLVM_CODEGEN_REGISTER_COALESCERPASS_H
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#define LLVM_CODEGEN_REGISTER_COALESCERPASS_H
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12+
#include "llvm/CodeGen/MachinePassManager.h"
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namespace llvm {
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class RegisterCoalescerPass : public PassInfoMixin<RegisterCoalescerPass> {
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public:
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PreservedAnalyses run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM);
19+
20+
MachineFunctionProperties getClearedProperties() const {
21+
return MachineFunctionProperties().set(
22+
MachineFunctionProperties::Property::IsSSA);
23+
}
24+
};
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26+
} // namespace llvm
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28+
#endif // LLVM_CODEGEN_REGISTER_COALESCERPASS_H

llvm/include/llvm/InitializePasses.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -266,7 +266,7 @@ void initializeRegionOnlyPrinterPass(PassRegistry &);
266266
void initializeRegionOnlyViewerPass(PassRegistry &);
267267
void initializeRegionPrinterPass(PassRegistry &);
268268
void initializeRegionViewerPass(PassRegistry &);
269-
void initializeRegisterCoalescerPass(PassRegistry &);
269+
void initializeRegisterCoalescerLegacyPass(PassRegistry &);
270270
void initializeRemoveLoadsIntoFakeUsesPass(PassRegistry &);
271271
void initializeRemoveRedundantDebugValuesPass(PassRegistry &);
272272
void initializeRenameIndependentSubregsPass(PassRegistry &);

llvm/include/llvm/Passes/CodeGenPassBuilder.h

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@@ -57,6 +57,7 @@
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#include "llvm/CodeGen/RegAllocFast.h"
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#include "llvm/CodeGen/RegUsageInfoCollector.h"
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#include "llvm/CodeGen/RegUsageInfoPropagate.h"
60+
#include "llvm/CodeGen/RegisterCoalescerPass.h"
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#include "llvm/CodeGen/RegisterUsageInfo.h"
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#include "llvm/CodeGen/ReplaceWithVeclib.h"
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#include "llvm/CodeGen/SafeStack.h"

llvm/include/llvm/Passes/MachinePassRegistry.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,7 @@ MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
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MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
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MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
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MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass())
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MACHINE_FUNCTION_PASS("register-coalescer", RegisterCoalescerPass())
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MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
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RequireAllMachineFunctionPropertiesPass())
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MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass())
@@ -265,7 +266,6 @@ DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugVa
265266
DUMMY_MACHINE_FUNCTION_PASS("rename-independent-subregs", RenameIndependentSubregsPass)
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DUMMY_MACHINE_FUNCTION_PASS("reset-machine-function", ResetMachineFunctionPass)
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DUMMY_MACHINE_FUNCTION_PASS("shrink-wrap", ShrinkWrapPass)
268-
DUMMY_MACHINE_FUNCTION_PASS("simple-register-coalescing", RegisterCoalescerPass)
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DUMMY_MACHINE_FUNCTION_PASS("stack-frame-layout", StackFrameLayoutAnalysisPass)
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DUMMY_MACHINE_FUNCTION_PASS("stack-slot-coloring", StackSlotColoringPass)
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DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass)

llvm/lib/CodeGen/CodeGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
116116
initializeRegAllocFastPass(Registry);
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initializeRegUsageInfoCollectorLegacyPass(Registry);
118118
initializeRegUsageInfoPropagationLegacyPass(Registry);
119-
initializeRegisterCoalescerPass(Registry);
119+
initializeRegisterCoalescerLegacyPass(Registry);
120120
initializeRemoveLoadsIntoFakeUsesPass(Registry);
121121
initializeRemoveRedundantDebugValuesPass(Registry);
122122
initializeRenameIndependentSubregsPass(Registry);

llvm/lib/CodeGen/RegAllocBasic.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ INITIALIZE_PASS_BEGIN(RABasic, "regallocbasic", "Basic Register Allocator",
134134
INITIALIZE_PASS_DEPENDENCY(LiveDebugVariablesWrapperLegacy)
135135
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
136136
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
137-
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer)
137+
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescerLegacy)
138138
INITIALIZE_PASS_DEPENDENCY(MachineScheduler)
139139
INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)
140140
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)

llvm/lib/CodeGen/RegAllocGreedy.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -154,7 +154,7 @@ INITIALIZE_PASS_BEGIN(RAGreedy, "greedy",
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INITIALIZE_PASS_DEPENDENCY(LiveDebugVariablesWrapperLegacy)
155155
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
156156
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
157-
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer)
157+
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescerLegacy)
158158
INITIALIZE_PASS_DEPENDENCY(MachineScheduler)
159159
INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)
160160
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)

llvm/lib/CodeGen/RegisterCoalescer.cpp

Lines changed: 56 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -24,15 +24,18 @@
2424
#include "llvm/CodeGen/LiveIntervals.h"
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#include "llvm/CodeGen/LiveRangeEdit.h"
2626
#include "llvm/CodeGen/MachineBasicBlock.h"
27+
#include "llvm/CodeGen/MachineDominators.h"
2728
#include "llvm/CodeGen/MachineFunction.h"
2829
#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
3132
#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineOperand.h"
34+
#include "llvm/CodeGen/MachinePassManager.h"
3335
#include "llvm/CodeGen/MachineRegisterInfo.h"
3436
#include "llvm/CodeGen/Passes.h"
3537
#include "llvm/CodeGen/RegisterClassInfo.h"
38+
#include "llvm/CodeGen/RegisterCoalescerPass.h"
3639
#include "llvm/CodeGen/SlotIndexes.h"
3740
#include "llvm/CodeGen/TargetInstrInfo.h"
3841
#include "llvm/CodeGen/TargetOpcodes.h"
@@ -121,13 +124,13 @@ namespace {
121124

122125
class JoinVals;
123126

124-
class RegisterCoalescer : public MachineFunctionPass,
125-
private LiveRangeEdit::Delegate {
127+
class RegisterCoalescer : private LiveRangeEdit::Delegate {
126128
MachineFunction *MF = nullptr;
127129
MachineRegisterInfo *MRI = nullptr;
128130
const TargetRegisterInfo *TRI = nullptr;
129131
const TargetInstrInfo *TII = nullptr;
130132
LiveIntervals *LIS = nullptr;
133+
SlotIndexes *SI = nullptr;
131134
const MachineLoopInfo *Loops = nullptr;
132135
RegisterClassInfo RegClassInfo;
133136

@@ -372,11 +375,24 @@ class RegisterCoalescer : public MachineFunctionPass,
372375
void checkMergingChangesDbgValuesImpl(Register Reg, LiveRange &OtherRange,
373376
LiveRange &RegRange, JoinVals &Vals2);
374377

378+
public:
379+
// For legacy pass only.
380+
RegisterCoalescer() {}
381+
RegisterCoalescer &operator=(RegisterCoalescer &&Other) = default;
382+
383+
RegisterCoalescer(LiveIntervals *LIS, SlotIndexes *SI,
384+
const MachineLoopInfo *Loops)
385+
: LIS(LIS), SI(SI), Loops(Loops) {}
386+
387+
bool run(MachineFunction &MF);
388+
};
389+
390+
class RegisterCoalescerLegacy : public MachineFunctionPass {
375391
public:
376392
static char ID; ///< Class identification, replacement for typeinfo
377393

378-
RegisterCoalescer() : MachineFunctionPass(ID) {
379-
initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
394+
RegisterCoalescerLegacy() : MachineFunctionPass(ID) {
395+
initializeRegisterCoalescerLegacyPass(*PassRegistry::getPassRegistry());
380396
}
381397

382398
void getAnalysisUsage(AnalysisUsage &AU) const override;
@@ -386,24 +402,22 @@ class RegisterCoalescer : public MachineFunctionPass,
386402
MachineFunctionProperties::Property::IsSSA);
387403
}
388404

389-
void releaseMemory() override;
390-
391405
/// This is the pass entry point.
392406
bool runOnMachineFunction(MachineFunction &) override;
393407
};
394408

395409
} // end anonymous namespace
396410

397-
char RegisterCoalescer::ID = 0;
411+
char RegisterCoalescerLegacy::ID = 0;
398412

399-
char &llvm::RegisterCoalescerID = RegisterCoalescer::ID;
413+
char &llvm::RegisterCoalescerID = RegisterCoalescerLegacy::ID;
400414

401-
INITIALIZE_PASS_BEGIN(RegisterCoalescer, "register-coalescer",
415+
INITIALIZE_PASS_BEGIN(RegisterCoalescerLegacy, "register-coalescer",
402416
"Register Coalescer", false, false)
403417
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
404418
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
405419
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
406-
INITIALIZE_PASS_END(RegisterCoalescer, "register-coalescer",
420+
INITIALIZE_PASS_END(RegisterCoalescerLegacy, "register-coalescer",
407421
"Register Coalescer", false, false)
408422

409423
[[nodiscard]] static bool isMoveInstr(const TargetRegisterInfo &tri,
@@ -580,8 +594,9 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const {
580594
}
581595
}
582596

583-
void RegisterCoalescer::getAnalysisUsage(AnalysisUsage &AU) const {
597+
void RegisterCoalescerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
584598
AU.setPreservesCFG();
599+
AU.addUsedIfAvailable<SlotIndexesWrapperPass>();
585600
AU.addRequired<LiveIntervalsWrapperPass>();
586601
AU.addPreserved<LiveIntervalsWrapperPass>();
587602
AU.addPreserved<SlotIndexesWrapperPass>();
@@ -4226,15 +4241,35 @@ void RegisterCoalescer::joinAllIntervals() {
42264241
lateLiveIntervalUpdate();
42274242
}
42284243

4229-
void RegisterCoalescer::releaseMemory() {
4230-
ErasedInstrs.clear();
4231-
WorkList.clear();
4232-
DeadDefs.clear();
4233-
InflateRegs.clear();
4234-
LargeLIVisitCounter.clear();
4244+
PreservedAnalyses
4245+
RegisterCoalescerPass::run(MachineFunction &MF,
4246+
MachineFunctionAnalysisManager &MFAM) {
4247+
MFPropsModifier _(*this, MF);
4248+
auto &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
4249+
auto &Loops = MFAM.getResult<MachineLoopAnalysis>(MF);
4250+
auto *SI = MFAM.getCachedResult<SlotIndexesAnalysis>(MF);
4251+
RegisterCoalescer Impl(&LIS, SI, &Loops);
4252+
if (!Impl.run(MF))
4253+
return PreservedAnalyses::all();
4254+
auto PA = getMachineFunctionPassPreservedAnalyses();
4255+
PA.preserveSet<CFGAnalyses>();
4256+
PA.preserve<LiveIntervalsAnalysis>();
4257+
PA.preserve<SlotIndexesAnalysis>();
4258+
PA.preserve<MachineLoopAnalysis>();
4259+
PA.preserve<MachineDominatorTreeAnalysis>();
4260+
return PA;
4261+
}
4262+
4263+
bool RegisterCoalescerLegacy::runOnMachineFunction(MachineFunction &MF) {
4264+
auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
4265+
auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
4266+
auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>();
4267+
SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI() : nullptr;
4268+
RegisterCoalescer Impl(LIS, SI, Loops);
4269+
return Impl.run(MF);
42354270
}
42364271

4237-
bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
4272+
bool RegisterCoalescer::run(MachineFunction &fn) {
42384273
LLVM_DEBUG(dbgs() << "********** REGISTER COALESCER **********\n"
42394274
<< "********** Function: " << fn.getName() << '\n');
42404275

@@ -4257,8 +4292,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
42574292
const TargetSubtargetInfo &STI = fn.getSubtarget();
42584293
TRI = STI.getRegisterInfo();
42594294
TII = STI.getInstrInfo();
4260-
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
4261-
Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
42624295
if (EnableGlobalCopies == cl::BOU_UNSET)
42634296
JoinGlobalCopies = STI.enableJoinGlobalCopies();
42644297
else
@@ -4283,7 +4316,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
42834316
JoinSplitEdges = EnableJoinSplits;
42844317

42854318
if (VerifyCoalescing)
4286-
MF->verify(this, "Before register coalescing", &errs());
4319+
MF->verify(LIS, SI, "Before register coalescing", &errs());
42874320

42884321
DbgVRegToValues.clear();
42894322
buildVRegToDbgValueMap(fn);
@@ -4342,7 +4375,8 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
43424375
RegToPHIIdx.clear();
43434376

43444377
LLVM_DEBUG(LIS->dump());
4378+
43454379
if (VerifyCoalescing)
4346-
MF->verify(this, "After register coalescing", &errs());
4380+
MF->verify(LIS, SI, "After register coalescing", &errs());
43474381
return true;
43484382
}

llvm/lib/CodeGen/RegisterCoalescer.h

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@@ -14,6 +14,7 @@
1414
#ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
1515
#define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
1616

17+
#include "llvm/CodeGen/MachinePassManager.h"
1718
#include "llvm/CodeGen/Register.h"
1819

1920
namespace llvm {

llvm/lib/Passes/PassBuilder.cpp

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@@ -127,6 +127,7 @@
127127
#include "llvm/CodeGen/RegAllocFast.h"
128128
#include "llvm/CodeGen/RegUsageInfoCollector.h"
129129
#include "llvm/CodeGen/RegUsageInfoPropagate.h"
130+
#include "llvm/CodeGen/RegisterCoalescerPass.h"
130131
#include "llvm/CodeGen/RegisterUsageInfo.h"
131132
#include "llvm/CodeGen/SafeStack.h"
132133
#include "llvm/CodeGen/SelectOptimize.h"

llvm/test/CodeGen/AArch64/coalescer-drop-subreg-to-reg-imm-ops.mir

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@@ -1,5 +1,6 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
22
# RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s
3+
# RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -verify-coalescing -passes=register-coalescer -o - %s | FileCheck %s
34

45
# Hits assert "Trying to add an operand to a machine instr that is
56
# already done!" when rematerializing during greedy. This was because

llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir

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@@ -1,5 +1,6 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
22
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s
3+
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -passes=register-coalescer -verify-coalescing -o - %s | FileCheck %s
34

45
# Testcase variants from
56
# liveout-implicit-def-subreg-redef-blender-verifier-error.mir which

llvm/test/CodeGen/X86/coalesce-dead-lanes.mir

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@@ -1,4 +1,5 @@
11
# RUN: llc -run-pass register-coalescer -O0 -mtriple x86_64-pc-linux-gnu -o - %s | FileCheck %s
2+
# RUN: llc -passes register-coalescer -O0 -mtriple x86_64-pc-linux-gnu -o - %s | FileCheck %s
23

34
---
45
name: foo

llvm/test/CodeGen/X86/late-remat-update.mir

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@@ -1,5 +1,5 @@
11
# REQUIRES: asserts
2-
# RUN: llc -mtriple=x86_64-- -run-pass=register-coalescer -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s
2+
# RUN: llc -mtriple=x86_64-- -passes=register-coalescer -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s
33
# Check the test will rematerialize for three copies, but will call shrinkToUses
44
# only once to update live range because of late rematerialization update.
55
# CHECK: 3 regalloc - Number of instructions re-materialized

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