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Revert "[RISCV] Remove experimental from Ztso. (#96465)"
This reverts commit 9cd6ef4. See discussion on review thread.
1 parent b0efde6 commit f985a88

17 files changed

+72
-77
lines changed

‎clang/test/Driver/riscv-arch.c

Lines changed: 9 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -365,30 +365,24 @@
365365
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZFHMIN %s
366366
// RV32-ZFHMIN: "-target-feature" "+zfhmin"
367367

368-
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32izalasr -### %s \
368+
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32iztso -### %s \
369369
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-NOFLAG %s
370-
// RV32-EXPERIMENTAL-NOFLAG: error: invalid arch name 'rv32izalasr'
370+
// RV32-EXPERIMENTAL-NOFLAG: error: invalid arch name 'rv32iztso'
371371
// RV32-EXPERIMENTAL-NOFLAG: requires '-menable-experimental-extensions'
372372

373-
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32izalasr -menable-experimental-extensions -### %s \
373+
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32iztso -menable-experimental-extensions -### %s \
374374
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-NOVERS %s
375-
// RV32-EXPERIMENTAL-NOVERS: error: invalid arch name 'rv32izalasr'
375+
// RV32-EXPERIMENTAL-NOVERS: error: invalid arch name 'rv32iztso'
376376
// RV32-EXPERIMENTAL-NOVERS: experimental extension requires explicit version number
377377

378-
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32izalasr0p7 -menable-experimental-extensions -### %s \
378+
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32iztso0p7 -menable-experimental-extensions -### %s \
379379
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-BADVERS %s
380-
// RV32-EXPERIMENTAL-BADVERS: error: invalid arch name 'rv32izalasr0p7'
381-
// RV32-EXPERIMENTAL-BADVERS: unsupported version number 0.7 for experimental extension 'zalasr' (this compiler supports 0.1)
380+
// RV32-EXPERIMENTAL-BADVERS: error: invalid arch name 'rv32iztso0p7'
381+
// RV32-EXPERIMENTAL-BADVERS: unsupported version number 0.7 for experimental extension 'ztso' (this compiler supports 0.1)
382382

383-
// RUN: %clang --target=riscv32-unknown-elf -march=rv32izalasr0p1 -menable-experimental-extensions -### %s \
383+
// RUN: %clang --target=riscv32-unknown-elf -march=rv32iztso0p1 -menable-experimental-extensions -### %s \
384384
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-GOODVERS %s
385-
// RV32-EXPERIMENTAL-GOODVERS: "-target-feature" "+experimental-zalasr"
386-
387-
// RUN: %clang --target=riscv32-unknown-elf -march=rv32iztso1p0 -### %s \
388-
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZTSO %s
389-
// RUN: %clang --target=riscv32-unknown-elf -march=rv32iztso -### %s \
390-
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZTSO %s
391-
// RV32-ZTSO: "-target-feature" "+ztso"
385+
// RV32-EXPERIMENTAL-GOODVERS: "-target-feature" "+experimental-ztso"
392386

393387
// RUN: %clang --target=riscv32-unknown-elf -march=rv32izbb1p0 -### %s \
394388
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBB %s

‎clang/test/Preprocessor/riscv-target-features.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1650,13 +1650,13 @@
16501650
// RUN: -o - | FileCheck --check-prefix=CHECK-ZICFILP-EXT %s
16511651
// CHECK-ZICFILP-EXT: __riscv_zicfilp 4000{{$}}
16521652

1653-
// RUN: %clang --target=riscv32-unknown-linux-gnu \
1654-
// RUN: -march=rv32iztso1p0 -E -dM %s \
1653+
// RUN: %clang --target=riscv32-unknown-linux-gnu -menable-experimental-extensions \
1654+
// RUN: -march=rv32iztso0p1 -E -dM %s \
16551655
// RUN: -o - | FileCheck --check-prefix=CHECK-ZTSO-EXT %s
1656-
// RUN: %clang --target=riscv64-unknown-linux-gnu \
1657-
// RUN: -march=rv64iztso1p0 -E -dM %s \
1656+
// RUN: %clang --target=riscv64-unknown-linux-gnu -menable-experimental-extensions \
1657+
// RUN: -march=rv64iztso0p1 -E -dM %s \
16581658
// RUN: -o - | FileCheck --check-prefix=CHECK-ZTSO-EXT %s
1659-
// CHECK-ZTSO-EXT: __riscv_ztso 1000000{{$}}
1659+
// CHECK-ZTSO-EXT: __riscv_ztso 1000{{$}}
16601660

16611661
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
16621662
// RUN: -march=rv32ifzvfbfmin1p0 -E -dM %s \

‎llvm/docs/RISCVUsage.rst

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,6 @@ on support follow.
178178
``Zks`` Supported
179179
``Zkt`` Supported
180180
``Zmmul`` Supported
181-
``Ztso`` Supported
182181
``Zvbb`` Assembly Support
183182
``Zvbc`` Assembly Support
184183
``Zve32x`` (`Partially <#riscv-vlen-32-note>`__) Supported
@@ -278,6 +277,9 @@ The primary goal of experimental support is to assist in the process of ratifica
278277
``experimental-zicfilp``, ``experimental-zicfiss``
279278
LLVM implements the `0.4 draft specification <https://github.com/riscv/riscv-cfi/releases/tag/v0.4.0>`__.
280279

280+
``experimental-ztso``
281+
LLVM implements the `v0.1 proposed specification <https://github.com/riscv/riscv-isa-manual/releases/download/draft-20220723-10eea63/riscv-spec.pdf>`__ (see Chapter 25). The mapping from the C/C++ memory model to Ztso has not yet been ratified in any standards document. There are multiple possible mappings, and they are *not* mutually ABI compatible. The mapping LLVM implements is ABI compatible with the default WMO mapping. This mapping may change and there is *explicitly* no ABI stability offered while the extension remains in experimental status. User beware.
282+
281283
To use an experimental extension from `clang`, you must add `-menable-experimental-extensions` to the command line, and specify the exact version of the experimental extension you are using. To use an experimental extension with LLVM's internal developer tools (e.g. `llc`, `llvm-objdump`, `llvm-mc`), you must prefix the extension name with `experimental-`. Note that you don't need to specify the version with internal tools, and shouldn't include the `experimental-` prefix with `clang`.
282284

283285
Vendor Extensions

‎llvm/docs/ReleaseNotes.rst

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -184,7 +184,6 @@ Changes to the RISC-V Backend
184184
* B (the collection of the Zba, Zbb, Zbs extensions) is supported.
185185
* Added smcdeleg, ssccfg, smcsrind, and sscsrind extensions to -march.
186186
* ``-mcpu=syntacore-scr3-rv32`` and ``-mcpu=syntacore-scr3-rv64`` were added.
187-
* Ztso is no longer experimental.
188187

189188
Changes to the WebAssembly Backend
190189
----------------------------------

‎llvm/lib/Target/RISCV/RISCVFeatures.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,8 @@ def HasStdExtA : Predicate<"Subtarget->hasStdExtA()">,
196196
"'A' (Atomic Instructions)">;
197197

198198
def FeatureStdExtZtso
199-
: RISCVExtension<"ztso", 1, 0,
200-
"'Ztso' (Memory Model - Total Store Order)">;
199+
: RISCVExperimentalExtension<"ztso", 0, 1,
200+
"'Ztso' (Memory Model - Total Store Order)">;
201201
def HasStdExtZtso : Predicate<"Subtarget->hasStdExtZtso()">,
202202
AssemblerPredicate<(all_of FeatureStdExtZtso),
203203
"'Ztso' (Memory Model - Total Store Order)">;

‎llvm/test/CodeGen/RISCV/GlobalISel/atomic-fence.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,13 @@
33
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -global-isel -verify-machineinstrs < %s \
55
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -global-isel -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -global-isel -verify-machineinstrs < %s \
77
; RUN: | FileCheck --check-prefixes=CHECK,TSO %s
88
; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \
99
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
1010
; RUN: llc -mtriple=riscv64 -mattr=+a -global-isel -verify-machineinstrs < %s \
1111
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
12-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -global-isel -verify-machineinstrs < %s \
12+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -global-isel -verify-machineinstrs < %s \
1313
; RUN: | FileCheck --check-prefixes=CHECK,TSO %s
1414

1515
define void @fence_acquire() nounwind {

‎llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,9 @@
55
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO %s
66
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-WMO-ZACAS %s
8-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
8+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO %s
10-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
10+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso,+zacas -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-TSO-ZACAS %s
1212
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefix=RV64I %s
@@ -17,11 +17,11 @@
1717
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO-ZACAS %s
1818
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
1919
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-WMO-ZABHA %s
20-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
20+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
2121
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s
22-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
22+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas -verify-machineinstrs < %s \
2323
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO-ZACAS %s
24-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas,+zabha -verify-machineinstrs < %s \
24+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas,+zabha -verify-machineinstrs < %s \
2525
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-TSO-ZABHA %s
2626

2727
define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {

‎llvm/test/CodeGen/RISCV/atomic-fence.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,13 @@
33
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
55
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
77
; RUN: | FileCheck --check-prefixes=CHECK,TSO %s
88
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
99
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
1010
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
1111
; RUN: | FileCheck --check-prefixes=CHECK,WMO %s
12-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
12+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
1313
; RUN: | FileCheck --check-prefixes=CHECK,TSO %s
1414

1515
define void @fence_acquire() nounwind {

‎llvm/test/CodeGen/RISCV/atomic-load-store.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,24 +3,24 @@
33
; RUN: | FileCheck -check-prefix=RV32I %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
55
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO %s
88
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefix=RV64I %s
1010
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s
12-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
12+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s
1414

1515

1616
; RUN: llc -mtriple=riscv32 -mattr=+a,+seq-cst-trailing-fence -verify-machineinstrs < %s \
1717
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-WMO-TRAILING-FENCE %s
18-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+seq-cst-trailing-fence -verify-machineinstrs < %s \
18+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso,+seq-cst-trailing-fence -verify-machineinstrs < %s \
1919
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-TSO-TRAILING-FENCE %s
2020

2121
; RUN: llc -mtriple=riscv64 -mattr=+a,+seq-cst-trailing-fence -verify-machineinstrs < %s \
2222
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO-TRAILING-FENCE %s
23-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+seq-cst-trailing-fence -verify-machineinstrs < %s \
23+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+seq-cst-trailing-fence -verify-machineinstrs < %s \
2424
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO-TRAILING-FENCE %s
2525

2626

‎llvm/test/CodeGen/RISCV/atomic-rmw.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,31 +3,31 @@
33
; RUN: | FileCheck -check-prefix=RV32I %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
55
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-NOZACAS,RV32IA-WMO,RV32IA-WMO-NOZACAS %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-NOZACAS,RV32IA-TSO,RV32IA-TSO-NOZACAS %s
88
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefix=RV64I %s
1010
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-NOZACAS,RV64IA-WMO,RV64IA-WMO-NOZACAS %s
12-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
12+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-NOZACAS,RV64IA-TSO,RV64IA-TSO-NOZACAS %s
1414

1515
; RUN: llc -mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs < %s \
1616
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-WMO,RV32IA-WMO-ZACAS %s
17-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
17+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso,+zacas -verify-machineinstrs < %s \
1818
; RUN: | FileCheck -check-prefixes=RV32IA,RV32IA-ZACAS,RV32IA-TSO,RV32IA-TSO-ZACAS %s
1919
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
2020
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO,RV64IA-WMO-ZACAS %s
21-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs < %s \
21+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas -verify-machineinstrs < %s \
2222
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO,RV64IA-TSO-ZACAS %s
2323

2424
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs < %s \
2525
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-NOZACAS %s
26-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha -verify-machineinstrs < %s \
26+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zabha -verify-machineinstrs < %s \
2727
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-NOZACAS %s
2828
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha,+zacas -verify-machineinstrs < %s \
2929
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-ZACAS %s
30-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso,+zabha,+zacas -verify-machineinstrs < %s \
30+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zabha,+zacas -verify-machineinstrs < %s \
3131
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-ZACAS %s
3232

3333
define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {

‎llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,13 @@
33
; RUN: | FileCheck -check-prefix=RV32I %s
44
; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
55
; RUN: | FileCheck -check-prefix=RV32IA %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs < %s \
6+
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
77
; RUN: | FileCheck -check-prefix=RV32IA %s
88
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
99
; RUN: | FileCheck -check-prefix=RV64I %s
1010
; RUN: llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefix=RV64IA %s
12-
; RUN: llc -mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs < %s \
12+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
1313
; RUN: | FileCheck -check-prefix=RV64IA %s
1414

1515

‎llvm/test/CodeGen/RISCV/attributes.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -211,7 +211,7 @@
211211
; RUN: llc -mtriple=riscv64 -mattr=+za128rs %s -o - | FileCheck --check-prefixes=CHECK,RV64ZA128RS %s
212212
; RUN: llc -mtriple=riscv64 -mattr=+zama16b %s -o - | FileCheck --check-prefixes=CHECK,RV64ZAMA16B %s
213213
; RUN: llc -mtriple=riscv64 -mattr=+zawrs %s -o - | FileCheck --check-prefixes=CHECK,RV64ZAWRS %s
214-
; RUN: llc -mtriple=riscv64 -mattr=+ztso %s -o - | FileCheck --check-prefixes=CHECK,RV64ZTSO %s
214+
; RUN: llc -mtriple=riscv64 -mattr=+experimental-ztso %s -o - | FileCheck --check-prefixes=CHECK,RV64ZTSO %s
215215
; RUN: llc -mtriple=riscv64 -mattr=+zaamo %s -o - | FileCheck --check-prefix=RV64ZAAMO %s
216216
; RUN: llc -mtriple=riscv64 -mattr=+zalrsc %s -o - | FileCheck --check-prefix=RV64ZALRSC %s
217217
; RUN: llc -mtriple=riscv64 -mattr=+zca %s -o - | FileCheck --check-prefixes=CHECK,RV64ZCA %s
@@ -492,7 +492,7 @@
492492
; RV64XTHEADMEMPAIR: .attribute 5, "rv64i2p1_xtheadmempair1p0"
493493
; RV64XTHEADSYNC: .attribute 5, "rv64i2p1_xtheadsync1p0"
494494
; RV64XTHEADVDOT: .attribute 5, "rv64i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0_xtheadvdot1p0"
495-
; RV64ZTSO: .attribute 5, "rv64i2p1_ztso1p0"
495+
; RV64ZTSO: .attribute 5, "rv64i2p1_ztso0p1"
496496
; RV64ZAAMO: .attribute 5, "rv64i2p1_zaamo1p0"
497497
; RV64ZALRSC: .attribute 5, "rv64i2p1_zalrsc1p0"
498498
; RV64ZCA: .attribute 5, "rv64i2p1_zca1p0"

‎llvm/test/CodeGen/RISCV/module-elf-flags.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,4 +10,4 @@ define i32 @addi(i32 %a) {
1010
!llvm.module.flags = !{!0}
1111

1212
!0 = !{i32 6, !"riscv-isa", !1}
13-
!1 = !{!"rv64i2p1_c2p0_ztso1p0"}
13+
!1 = !{!"rv64i2p1_c2p0_ztso0p1"}

‎llvm/test/MC/RISCV/Ztso.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+ztso -riscv-no-aliases 2>&1 | FileCheck %s
2-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+ztso -riscv-no-aliases 2>&1 | FileCheck %s
1+
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-ztso -riscv-no-aliases 2>&1 | FileCheck %s
2+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-ztso -riscv-no-aliases 2>&1 | FileCheck %s
33

44
# Note: Ztso doesn't add or remove any instructions, so this is basically
55
# just checking that a) we accepted the attribute name, and b) codegen did

‎llvm/test/MC/RISCV/attribute-arch.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -276,8 +276,8 @@
276276
.attribute arch, "rv32izawrs1p0"
277277
# CHECK: attribute 5, "rv32i2p1_zawrs1p0"
278278

279-
.attribute arch, "rv32iztso1p0"
280-
# CHECK: attribute 5, "rv32i2p1_ztso1p0"
279+
.attribute arch, "rv32iztso0p1"
280+
# CHECK: attribute 5, "rv32i2p1_ztso0p1"
281281

282282
.attribute arch, "rv32izicsr2p0"
283283
# CHECK: attribute 5, "rv32i2p1_zicsr2p0"

‎llvm/test/MC/RISCV/elf-flags.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,8 @@
1010
# RUN: llvm-mc -triple=riscv64 -mattr=+e -filetype=obj < %s \
1111
# RUN: | llvm-readobj --file-headers - \
1212
# RUN: | FileCheck -check-prefix=CHECK-RVE %s
13-
# RUN: llvm-mc -triple=riscv32 -mattr=+ztso -filetype=obj < %s | llvm-readobj --file-headers - | FileCheck -check-prefixes=CHECK-TSO %s
14-
# RUN: llvm-mc -triple=riscv64 -mattr=+ztso -filetype=obj < %s | llvm-readobj --file-headers - | FileCheck -check-prefixes=CHECK-TSO %s
13+
# RUN: llvm-mc -triple=riscv32 -mattr=+experimental-ztso -filetype=obj < %s | llvm-readobj --file-headers - | FileCheck -check-prefixes=CHECK-TSO %s
14+
# RUN: llvm-mc -triple=riscv64 -mattr=+experimental-ztso -filetype=obj < %s | llvm-readobj --file-headers - | FileCheck -check-prefixes=CHECK-TSO %s
1515

1616
# CHECK-RVI: Flags [ (0x0)
1717
# CHECK-RVI-NEXT: ]

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