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test/CodeGen/RISCV/GlobalISel/irtranslator 2 files changed +3
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lines changed Original file line number Diff line number Diff line change @@ -1435,7 +1435,7 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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if (DstTy.getElementType () != SrcEltTy)
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report (" G_BUILD_VECTOR result element type must match source type" , MI);
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- if (DstTy.getElementCount (). getKnownMinValue () > MI->getNumOperands () - 1 )
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+ if (DstTy.getNumElements () != MI->getNumOperands () - 1 )
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report (" G_BUILD_VECTOR must have an operand for each elemement" , MI);
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for (const MachineOperand &MO : llvm::drop_begin (MI->operands (), 2 ))
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+v,+experimental-zvfbfmin,+zvfh -global-isel -stop-after=irtranslator \
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- ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV32,RV32-F16 %s
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+ ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV32 %s
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; RUN: llc -mtriple=riscv64 -mattr=+v,+experimental-zvfbfmin,+zvfh -global-isel -stop-after=irtranslator \
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- ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV64,RV64-F16 %s
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+ ; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=RV64 %s
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; ==========================================================================
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; ============================= Scalable Types =============================
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