[ARM] Re-generate a test

Author: ostannard

llvm/test/CodeGen/ARM/fp-arg-shuffle.ll

@@ -1,8 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: llc -mtriple=arm-eabi -mattr=+neon -float-abi=soft %s -o - | FileCheck %s
 
 ; CHECK: function1
 ; CHECK-NOT: vmov
 define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
+; CHECK-LABEL: function1:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    .save {r4, r5, r11, lr}
+; CHECK-NEXT:    push {r4, r5, r11, lr}
+; CHECK-NEXT:    .pad #32
+; CHECK-NEXT:    sub sp, sp, #32
+; CHECK-NEXT:    add lr, sp, #64
+; CHECK-NEXT:    vldr d16, [sp, #56]
+; CHECK-NEXT:    str r2, [sp, #16]
+; CHECK-NEXT:    ldm lr, {r4, r5, r12, lr}
+; CHECK-NEXT:    str r3, [sp, #20]
+; CHECK-NEXT:    mov r3, r5
+; CHECK-NEXT:    str r0, [sp, #24]
+; CHECK-NEXT:    mov r0, r12
+; CHECK-NEXT:    str r1, [sp, #28]
+; CHECK-NEXT:    mov r1, lr
+; CHECK-NEXT:    mov r2, r4
+; CHECK-NEXT:    vldr d17, [sp, #48]
+; CHECK-NEXT:    vstmia sp, {d16, d17}
+; CHECK-NEXT:    bl function2
+; CHECK-NEXT:    add sp, sp, #32
+; CHECK-NEXT:    pop {r4, r5, r11, lr}
+; CHECK-NEXT:    mov pc, lr
 entry:
   %call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
   ret double %call