|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 |
| 2 | +; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s |
| 3 | + |
| 4 | + |
| 5 | +define i64 @pr62565_incoming_value_known_undef(i64 %a, ptr %src) { |
| 6 | +; CHECK-LABEL: define i64 @pr62565_incoming_value_known_undef |
| 7 | +; CHECK-SAME: (i64 [[A:%.*]], ptr [[SRC:%.*]]) { |
| 8 | +; CHECK-NEXT: entry: |
| 9 | +; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| 10 | +; CHECK: vector.ph: |
| 11 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A]], i64 0 |
| 12 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer |
| 13 | +; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] |
| 14 | +; CHECK: vector.body: |
| 15 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] |
| 16 | +; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i64> [ undef, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] |
| 17 | +; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 1, [[INDEX]] |
| 18 | +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[OFFSET_IDX]], 0 |
| 19 | +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP0]] |
| 20 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0 |
| 21 | +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4 |
| 22 | +; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], <i32 1, i32 1> |
| 23 | +; CHECK-NEXT: [[TMP4]] = select <2 x i1> [[TMP3]], <2 x i64> [[VEC_PHI]], <2 x i64> [[BROADCAST_SPLAT]] |
| 24 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 |
| 25 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 32 |
| 26 | +; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| 27 | +; CHECK: middle.block: |
| 28 | +; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne <2 x i64> [[TMP4]], undef |
| 29 | +; CHECK-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> [[RDX_SELECT_CMP]]) |
| 30 | +; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP6]], i64 [[A]], i64 undef |
| 31 | +; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 32, 32 |
| 32 | +; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] |
| 33 | +; CHECK: scalar.ph: |
| 34 | +; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 33, [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY:%.*]] ] |
| 35 | +; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ undef, [[ENTRY]] ], [ [[RDX_SELECT]], [[MIDDLE_BLOCK]] ] |
| 36 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 37 | +; CHECK: loop: |
| 38 | +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ] |
| 39 | +; CHECK-NEXT: [[RED:%.*]] = phi i64 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[SELECT:%.*]], [[LOOP]] ] |
| 40 | +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[IV]] |
| 41 | +; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[GEP]], align 4 |
| 42 | +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 1 |
| 43 | +; CHECK-NEXT: [[SELECT]] = select i1 [[C]], i64 [[RED]], i64 [[A]] |
| 44 | +; CHECK-NEXT: [[ADD]] = add nuw i32 [[IV]], 1 |
| 45 | +; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV]], 32 |
| 46 | +; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] |
| 47 | +; CHECK: exit: |
| 48 | +; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[SELECT]], [[LOOP]] ], [ [[RDX_SELECT]], [[MIDDLE_BLOCK]] ] |
| 49 | +; CHECK-NEXT: ret i64 [[PHI]] |
| 50 | +; |
| 51 | +entry: |
| 52 | + br label %loop |
| 53 | + |
| 54 | +loop: |
| 55 | + %iv = phi i32 [ 1, %entry ], [ %add, %loop ] |
| 56 | + %red = phi i64 [ undef, %entry ], [ %select, %loop ] |
| 57 | + %gep = getelementptr inbounds i32, ptr %src, i32 %iv |
| 58 | + %l = load i32, ptr %gep |
| 59 | + %c = icmp eq i32 %l, 1 |
| 60 | + %select = select i1 %c, i64 %red, i64 %a |
| 61 | + %add = add nuw i32 %iv, 1 |
| 62 | + %ec = icmp eq i32 %iv, 32 |
| 63 | + br i1 %ec, label %exit, label %loop |
| 64 | + |
| 65 | +exit: |
| 66 | + %phi = phi i64 [ %select, %loop ] |
| 67 | + ret i64 %phi |
| 68 | +} |
| 69 | + |
| 70 | +define i64 @pr62565_incoming_value_known_poison(i64 %a, ptr %src) { |
| 71 | +; CHECK-LABEL: define i64 @pr62565_incoming_value_known_poison |
| 72 | +; CHECK-SAME: (i64 [[A:%.*]], ptr [[SRC:%.*]]) { |
| 73 | +; CHECK-NEXT: entry: |
| 74 | +; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| 75 | +; CHECK: vector.ph: |
| 76 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A]], i64 0 |
| 77 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer |
| 78 | +; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] |
| 79 | +; CHECK: vector.body: |
| 80 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] |
| 81 | +; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i64> [ poison, [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] |
| 82 | +; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 1, [[INDEX]] |
| 83 | +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[OFFSET_IDX]], 0 |
| 84 | +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP0]] |
| 85 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0 |
| 86 | +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4 |
| 87 | +; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], <i32 1, i32 1> |
| 88 | +; CHECK-NEXT: [[TMP4]] = select <2 x i1> [[TMP3]], <2 x i64> [[VEC_PHI]], <2 x i64> [[BROADCAST_SPLAT]] |
| 89 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 |
| 90 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 32 |
| 91 | +; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| 92 | +; CHECK: middle.block: |
| 93 | +; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne <2 x i64> [[TMP4]], poison |
| 94 | +; CHECK-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> [[RDX_SELECT_CMP]]) |
| 95 | +; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP6]], i64 [[A]], i64 poison |
| 96 | +; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 32, 32 |
| 97 | +; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] |
| 98 | +; CHECK: scalar.ph: |
| 99 | +; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 33, [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY:%.*]] ] |
| 100 | +; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ poison, [[ENTRY]] ], [ [[RDX_SELECT]], [[MIDDLE_BLOCK]] ] |
| 101 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 102 | +; CHECK: loop: |
| 103 | +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ] |
| 104 | +; CHECK-NEXT: [[RED:%.*]] = phi i64 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[SELECT:%.*]], [[LOOP]] ] |
| 105 | +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[IV]] |
| 106 | +; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[GEP]], align 4 |
| 107 | +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 1 |
| 108 | +; CHECK-NEXT: [[SELECT]] = select i1 [[C]], i64 [[RED]], i64 [[A]] |
| 109 | +; CHECK-NEXT: [[ADD]] = add nuw i32 [[IV]], 1 |
| 110 | +; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV]], 32 |
| 111 | +; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]] |
| 112 | +; CHECK: exit: |
| 113 | +; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[SELECT]], [[LOOP]] ], [ [[RDX_SELECT]], [[MIDDLE_BLOCK]] ] |
| 114 | +; CHECK-NEXT: ret i64 [[PHI]] |
| 115 | +; |
| 116 | +entry: |
| 117 | + br label %loop |
| 118 | + |
| 119 | +loop: |
| 120 | + %iv = phi i32 [ 1, %entry ], [ %add, %loop ] |
| 121 | + %red = phi i64 [ poison, %entry ], [ %select, %loop ] |
| 122 | + %gep = getelementptr inbounds i32, ptr %src, i32 %iv |
| 123 | + %l = load i32, ptr %gep |
| 124 | + %c = icmp eq i32 %l, 1 |
| 125 | + %select = select i1 %c, i64 %red, i64 %a |
| 126 | + %add = add nuw i32 %iv, 1 |
| 127 | + %ec = icmp eq i32 %iv, 32 |
| 128 | + br i1 %ec, label %exit, label %loop |
| 129 | + |
| 130 | +exit: |
| 131 | + %phi = phi i64 [ %select, %loop ] |
| 132 | + ret i64 %phi |
| 133 | +} |
| 134 | + |
| 135 | +define i64 @pr62565_incoming_value_may_be_poison(i64 %a, ptr %src, i64 %start) { |
| 136 | +; CHECK-LABEL: define i64 @pr62565_incoming_value_may_be_poison |
| 137 | +; CHECK-SAME: (i64 [[A:%.*]], ptr [[SRC:%.*]], i64 [[START:%.*]]) { |
| 138 | +; CHECK-NEXT: entry: |
| 139 | +; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| 140 | +; CHECK: vector.ph: |
| 141 | +; CHECK-NEXT: [[MINMAX_IDENT_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[START]], i64 0 |
| 142 | +; CHECK-NEXT: [[MINMAX_IDENT_SPLAT:%.*]] = shufflevector <2 x i64> [[MINMAX_IDENT_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer |
| 143 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A]], i64 0 |
| 144 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer |
| 145 | +; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] |
| 146 | +; CHECK: vector.body: |
| 147 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] |
| 148 | +; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i64> [ [[MINMAX_IDENT_SPLAT]], [[VECTOR_PH]] ], [ [[TMP4:%.*]], [[VECTOR_BODY]] ] |
| 149 | +; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 1, [[INDEX]] |
| 150 | +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[OFFSET_IDX]], 0 |
| 151 | +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[TMP0]] |
| 152 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 0 |
| 153 | +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP2]], align 4 |
| 154 | +; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <2 x i32> [[WIDE_LOAD]], <i32 1, i32 1> |
| 155 | +; CHECK-NEXT: [[TMP4]] = select <2 x i1> [[TMP3]], <2 x i64> [[VEC_PHI]], <2 x i64> [[BROADCAST_SPLAT]] |
| 156 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 |
| 157 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 32 |
| 158 | +; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| 159 | +; CHECK: middle.block: |
| 160 | +; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[START]], i64 0 |
| 161 | +; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <2 x i64> [[DOTSPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer |
| 162 | +; CHECK-NEXT: [[RDX_SELECT_CMP:%.*]] = icmp ne <2 x i64> [[TMP4]], [[DOTSPLAT]] |
| 163 | +; CHECK-NEXT: [[TMP6:%.*]] = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> [[RDX_SELECT_CMP]]) |
| 164 | +; CHECK-NEXT: [[RDX_SELECT:%.*]] = select i1 [[TMP6]], i64 [[A]], i64 [[START]] |
| 165 | +; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 32, 32 |
| 166 | +; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] |
| 167 | +; CHECK: scalar.ph: |
| 168 | +; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 33, [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY:%.*]] ] |
| 169 | +; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i64 [ [[START]], [[ENTRY]] ], [ [[RDX_SELECT]], [[MIDDLE_BLOCK]] ] |
| 170 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 171 | +; CHECK: loop: |
| 172 | +; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP]] ] |
| 173 | +; CHECK-NEXT: [[RED:%.*]] = phi i64 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[SELECT:%.*]], [[LOOP]] ] |
| 174 | +; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[IV]] |
| 175 | +; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[GEP]], align 4 |
| 176 | +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 1 |
| 177 | +; CHECK-NEXT: [[SELECT]] = select i1 [[C]], i64 [[RED]], i64 [[A]] |
| 178 | +; CHECK-NEXT: [[ADD]] = add nuw i32 [[IV]], 1 |
| 179 | +; CHECK-NEXT: [[EC:%.*]] = icmp eq i32 [[IV]], 32 |
| 180 | +; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]] |
| 181 | +; CHECK: exit: |
| 182 | +; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[SELECT]], [[LOOP]] ], [ [[RDX_SELECT]], [[MIDDLE_BLOCK]] ] |
| 183 | +; CHECK-NEXT: ret i64 [[PHI]] |
| 184 | +; |
| 185 | +entry: |
| 186 | + br label %loop |
| 187 | + |
| 188 | +loop: |
| 189 | + %iv = phi i32 [ 1, %entry ], [ %add, %loop ] |
| 190 | + %red = phi i64 [ %start, %entry ], [ %select, %loop ] |
| 191 | + %gep = getelementptr inbounds i32, ptr %src, i32 %iv |
| 192 | + %l = load i32, ptr %gep |
| 193 | + %c = icmp eq i32 %l, 1 |
| 194 | + %select = select i1 %c, i64 %red, i64 %a |
| 195 | + %add = add nuw i32 %iv, 1 |
| 196 | + %ec = icmp eq i32 %iv, 32 |
| 197 | + br i1 %ec, label %exit, label %loop |
| 198 | + |
| 199 | +exit: |
| 200 | + %phi = phi i64 [ %select, %loop ] |
| 201 | + ret i64 %phi |
| 202 | +} |
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