Re-apply '[AArch64] Enable "sink-and-fold" in MachineSink by default (#67432)'

This reverts revert 1950507.

An issue was fixed in bea3684
and some newly appeared tests updated.

Author: momchil-velikov

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

@@ -200,7 +200,7 @@ static cl::opt<bool> EnableGISelLoadStoreOptPostLegal(
 static cl::opt<bool>
     EnableSinkFold("aarch64-enable-sink-fold",
                    cl::desc("Enable sinking and folding of instruction copies"),
-                   cl::init(false), cl::Hidden);
+                   cl::init(true), cl::Hidden);
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
   // Register the target.

llvm/test/CodeGen/AArch64/aarch64-mulv.ll

@@ -584,10 +584,11 @@ define i128 @mulv_v2i128(<2 x i128> %a) {
 ; CHECK-GI-LABEL: mulv_v2i128:
 ; CHECK-GI:       // %bb.0: // %entry
 ; CHECK-GI-NEXT:    mul x9, x0, x3
-; CHECK-GI-NEXT:    umulh x8, x0, x2
+; CHECK-GI-NEXT:    mul x8, x0, x2
+; CHECK-GI-NEXT:    umulh x10, x0, x2
 ; CHECK-GI-NEXT:    madd x9, x1, x2, x9
-; CHECK-GI-NEXT:    mul x0, x0, x2
-; CHECK-GI-NEXT:    add x1, x9, x8
+; CHECK-GI-NEXT:    mov x0, x8
+; CHECK-GI-NEXT:    add x1, x9, x10
 ; CHECK-GI-NEXT:    ret
 entry:
   %arg1 = call i128 @llvm.vector.reduce.mul.v2i128(<2 x i128> %a)