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[SDAG] enhance sub->xor fold to ignore signbit
As suggested in the post-commit feedback for D128123, we can ease the mask constraint to ignore the MSB (and make the code easier to read by adjusting the check). https://alive2.llvm.org/ce/z/bbvqWv
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+10
-8
lines changed

2 files changed

+10
-8
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3762,12 +3762,15 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
37623762
}
37633763
}
37643764

3765-
// If there's no chance any bit will need to borrow from an adjacent bit:
3766-
// sub C, X --> xor X, C
3765+
// If there's no chance of borrowing from adjacent bits, then sub is xor:
3766+
// sub C0, X --> xor X, C0
37673767
if (ConstantSDNode *C0 = isConstOrConstSplat(N0)) {
3768-
if (!C0->isOpaque() &&
3769-
(~DAG.computeKnownBits(N1).Zero).isSubsetOf(C0->getAPIntValue()))
3770-
return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
3768+
if (!C0->isOpaque()) {
3769+
const APInt &C0Val = C0->getAPIntValue();
3770+
const APInt &MaybeOnes = ~DAG.computeKnownBits(N1).Zero;
3771+
if ((C0Val - MaybeOnes) == (C0Val ^ MaybeOnes))
3772+
return DAG.getNode(ISD::XOR, DL, VT, N1, N0);
3773+
}
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}
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37733776
return SDValue();

llvm/test/CodeGen/AArch64/sub1.ll

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -26,15 +26,14 @@ define i8 @masked_sub_i8(i8 %x) {
2626
ret i8 %m
2727
}
2828

29-
; TODO: Borrow from the MSB is ok.
29+
; Borrow from the MSB is ok.
3030

3131
define i8 @masked_sub_high_bit_mask_i8(i8 %x) {
3232
; CHECK-LABEL: masked_sub_high_bit_mask_i8:
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; CHECK: // %bb.0:
3434
; CHECK-NEXT: mov w8, #-96
35-
; CHECK-NEXT: mov w9, #60
3635
; CHECK-NEXT: and w8, w0, w8
37-
; CHECK-NEXT: sub w0, w9, w8
36+
; CHECK-NEXT: eor w0, w8, #0x3c
3837
; CHECK-NEXT: ret
3938
%maskx = and i8 %x, 160 ; 0b10100000
4039
%s = sub i8 60, %maskx ; 0b00111100

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