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[RISCV] Pattern-match frameindex (#120917)
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4 files changed

+23
-37
lines changed

4 files changed

+23
-37
lines changed

llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -131,6 +131,8 @@ class RISCVInstructionSelector : public InstructionSelector {
131131
int OpIdx) const;
132132
void renderImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
133133
int OpIdx) const;
134+
void renderFrameIndex(MachineInstrBuilder &MIB, const MachineInstr &MI,
135+
int OpIdx) const;
134136

135137
void renderTrailingZeros(MachineInstrBuilder &MIB, const MachineInstr &MI,
136138
int OpIdx) const;
@@ -715,14 +717,6 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
715717
MI.setDesc(TII.get(RISCV::PseudoBRIND));
716718
MI.addOperand(MachineOperand::CreateImm(0));
717719
return constrainSelectedInstRegOperands(MI, TII, TRI, RBI);
718-
case TargetOpcode::G_FRAME_INDEX: {
719-
// TODO: We may want to replace this code with the SelectionDAG patterns,
720-
// which fail to get imported because it uses FrameAddrRegImm, which is a
721-
// ComplexPattern
722-
MI.setDesc(TII.get(RISCV::ADDI));
723-
MI.addOperand(MachineOperand::CreateImm(0));
724-
return constrainSelectedInstRegOperands(MI, TII, TRI, RBI);
725-
}
726720
case TargetOpcode::G_SELECT:
727721
return selectSelect(MI, MIB);
728722
case TargetOpcode::G_FCMP:
@@ -859,6 +853,14 @@ void RISCVInstructionSelector::renderImm(MachineInstrBuilder &MIB,
859853
MIB.addImm(CstVal);
860854
}
861855

856+
void RISCVInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB,
857+
const MachineInstr &MI,
858+
int OpIdx) const {
859+
assert(MI.getOpcode() == TargetOpcode::G_FRAME_INDEX && OpIdx == -1 &&
860+
"Expected G_FRAME_INDEX");
861+
MIB.add(MI.getOperand(1));
862+
}
863+
862864
void RISCVInstructionSelector::renderTrailingZeros(MachineInstrBuilder &MIB,
863865
const MachineInstr &MI,
864866
int OpIdx) const {

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 0 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -2531,29 +2531,6 @@ bool RISCVDAGToDAGISel::SelectAddrFrameIndex(SDValue Addr, SDValue &Base,
25312531
return false;
25322532
}
25332533

2534-
// Select a frame index and an optional immediate offset from an ADD or OR.
2535-
bool RISCVDAGToDAGISel::SelectFrameAddrRegImm(SDValue Addr, SDValue &Base,
2536-
SDValue &Offset) {
2537-
if (SelectAddrFrameIndex(Addr, Base, Offset))
2538-
return true;
2539-
2540-
if (!CurDAG->isBaseWithConstantOffset(Addr))
2541-
return false;
2542-
2543-
if (auto *FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
2544-
int64_t CVal = cast<ConstantSDNode>(Addr.getOperand(1))->getSExtValue();
2545-
if (isInt<12>(CVal)) {
2546-
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(),
2547-
Subtarget->getXLenVT());
2548-
Offset = CurDAG->getSignedTargetConstant(CVal, SDLoc(Addr),
2549-
Subtarget->getXLenVT());
2550-
return true;
2551-
}
2552-
}
2553-
2554-
return false;
2555-
}
2556-
25572534
// Fold constant addresses.
25582535
static bool selectConstantAddr(SelectionDAG *CurDAG, const SDLoc &DL,
25592536
const MVT VT, const RISCVSubtarget *Subtarget,

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,6 @@ class RISCVDAGToDAGISel : public SelectionDAGISel {
4646
std::vector<SDValue> &OutOps) override;
4747

4848
bool SelectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset);
49-
bool SelectFrameAddrRegImm(SDValue Addr, SDValue &Base, SDValue &Offset);
5049
bool SelectAddrRegImm(SDValue Addr, SDValue &Base, SDValue &Offset,
5150
bool IsRV32Zdinx = false);
5251
bool SelectAddrRegImmRV32Zdinx(SDValue Addr, SDValue &Base, SDValue &Offset) {

llvm/lib/Target/RISCV/RISCVInstrInfo.td

Lines changed: 13 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -400,9 +400,6 @@ def uimm6gt32 : ImmLeaf<XLenVT, [{
400400
}]>;
401401

402402
// Addressing modes.
403-
// Necessary because a frameindex can't be matched directly in a pattern.
404-
def FrameAddrRegImm : ComplexPattern<iPTR, 2, "SelectFrameAddrRegImm",
405-
[frameindex, or, add]>;
406403
def AddrRegImm : ComplexPattern<iPTR, 2, "SelectAddrRegImm">;
407404

408405
// Return the negation of an immediate value.
@@ -1401,8 +1398,19 @@ def PseudoAddTPRel : Pseudo<(outs GPR:$rd),
14011398

14021399
/// FrameIndex calculations
14031400

1404-
def : Pat<(FrameAddrRegImm (iPTR GPR:$rs1), simm12:$imm12),
1405-
(ADDI GPR:$rs1, simm12:$imm12)>;
1401+
// Transforms frameindex -> tframeindex.
1402+
def to_tframeindex : SDNodeXForm<frameindex, [{
1403+
return CurDAG->getTargetFrameIndex(N->getIndex(), N->getValueType(0));
1404+
}]>;
1405+
1406+
def : GICustomOperandRenderer<"renderFrameIndex">,
1407+
GISDNodeXFormEquiv<to_tframeindex>;
1408+
1409+
def : Pat<(frameindex:$fi), (ADDI (iPTR (to_tframeindex $fi)), 0)>;
1410+
1411+
def : Pat<(add_like frameindex:$fi, simm12:$offset),
1412+
(ADDI (iPTR (to_tframeindex $fi)), simm12:$offset)>;
1413+
14061414
def GIAddrRegImm :
14071415
GIComplexOperandMatcher<s32, "selectAddrRegImm">,
14081416
GIComplexPatternEquiv<AddrRegImm>;

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