@@ -71,28 +71,28 @@ class PatSRL<SDPatternOperator OpNode, RVInst Inst, ValueType vt = XLenVT>
71
71
72
72
let Predicates = [HasStdExtZalasr] in {
73
73
def : PatLAQ<acquiring_load<atomic_load_8>, LB_AQ_AQ>;
74
- def : PatLAQ<seq_cst_load<atomic_load_8>, LB_AQ_AQ_RL>;
74
+ def : PatLAQ<seq_cst_load<atomic_load_8>, LB_AQ_AQ>; // these use lb.aq instead of lb.aqrl to match the psABI
75
75
76
76
def : PatLAQ<acquiring_load<atomic_load_16>, LH_AQ_AQ>;
77
- def : PatLAQ<seq_cst_load<atomic_load_16>, LH_AQ_AQ_RL >;
77
+ def : PatLAQ<seq_cst_load<atomic_load_16>, LH_AQ_AQ >;
78
78
79
79
def : PatLAQ<acquiring_load<atomic_load_32>, LW_AQ_AQ>;
80
- def : PatLAQ<seq_cst_load<atomic_load_32>, LW_AQ_AQ_RL >;
80
+ def : PatLAQ<seq_cst_load<atomic_load_32>, LW_AQ_AQ >;
81
81
82
82
def : PatSRL<releasing_store<atomic_store_8>, SB_RL_RL>;
83
- def : PatSRL<seq_cst_store<atomic_store_8>, SB_RL_AQ_RL>;
83
+ def : PatSRL<seq_cst_store<atomic_store_8>, SB_RL_RL>; // these use sb.rl instead of sb.aqrl to match the psABI
84
84
85
85
def : PatSRL<releasing_store<atomic_store_16>, SH_RL_RL>;
86
- def : PatSRL<seq_cst_store<atomic_store_16>, SH_RL_AQ_RL >;
86
+ def : PatSRL<seq_cst_store<atomic_store_16>, SH_RL_RL >;
87
87
88
88
def : PatSRL<releasing_store<atomic_store_32>, SW_RL_RL>;
89
- def : PatSRL<seq_cst_store<atomic_store_32>, SW_RL_AQ_RL >;
89
+ def : PatSRL<seq_cst_store<atomic_store_32>, SW_RL_RL >;
90
90
} // Predicates HasStdExtZalasr
91
91
92
92
let Predicates = [HasStdExtZalasr, IsRV64] in {
93
93
def : PatLAQ<acquiring_load<atomic_load_64>, LD_AQ_AQ>;
94
- def : PatLAQ<seq_cst_load<atomic_load_64>, LD_AQ_AQ_RL >;
94
+ def : PatLAQ<seq_cst_load<atomic_load_64>, LD_AQ_AQ >;
95
95
96
96
def : PatSRL<releasing_store<atomic_store_64>, SD_RL_RL>;
97
- def : PatSRL<seq_cst_store<atomic_store_64>, SD_RL_AQ_RL >;
97
+ def : PatSRL<seq_cst_store<atomic_store_64>, SD_RL_RL >;
98
98
} // Predicates HasStdExtZalasr, IsRV64
0 commit comments