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.isa
1 parent cfa322f commit b0acbbeCopy full SHA for b0acbbe
mlir/lib/Dialect/Vector/IR/VectorOps.cpp
@@ -5348,7 +5348,7 @@ class FoldContiguousGather final : public OpRewritePattern<GatherOp> {
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using OpRewritePattern::OpRewritePattern;
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LogicalResult matchAndRewrite(GatherOp op,
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PatternRewriter &rewriter) const override {
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- if (!op.getBase().getType().isa<MemRefType>())
+ if (!isa<MemRefType>(op.getBase().getType()))
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return rewriter.notifyMatchFailure(op, "base must be of memref type");
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if (failed(isZeroBasedContiguousSeq(op.getIndexVec())))
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