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alexey-bataevalexey-bataev
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[SLP]Fix the analysis of the user buildvector nodes for minbitwidth
If the user node is a buildvector/gather node and it has no internal instructions state, need to check properly for this state and check the type of the node itself, not its operands. Fixes #129242
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2 files changed

+263
-2
lines changed

2 files changed

+263
-2
lines changed

‎llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11425,11 +11425,14 @@ BoUpSLP::getEntryCost(const TreeEntry *E, ArrayRef<Value *> VectorizedVals,
1142511425
E->Idx != 0 &&
1142611426
(E->getOpcode() != Instruction::Load || E->UserTreeIndex)) {
1142711427
const EdgeInfo &EI = E->UserTreeIndex;
11428-
if (EI.UserTE->getOpcode() != Instruction::Select ||
11428+
if (!EI.UserTE->hasState() ||
11429+
EI.UserTE->getOpcode() != Instruction::Select ||
1142911430
EI.EdgeIdx != 0) {
1143011431
auto UserBWIt = MinBWs.find(EI.UserTE);
1143111432
Type *UserScalarTy =
11432-
EI.UserTE->getOperand(EI.EdgeIdx).front()->getType();
11433+
EI.UserTE->isGather()
11434+
? EI.UserTE->Scalars.front()->getType()
11435+
: EI.UserTE->getOperand(EI.EdgeIdx).front()->getType();
1143311436
if (UserBWIt != MinBWs.end())
1143411437
UserScalarTy = IntegerType::get(ScalarTy->getContext(),
1143511438
UserBWIt->second.first);

‎llvm/test/Transforms/SLPVectorizer/X86/user-buildvector-with-minbiwidth.ll

Lines changed: 258 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,258 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2+
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
3+
4+
define i32 @test(i8 %0, i32 %conv2, i1 %cmp.i, i64 %shl.i) {
5+
; CHECK-LABEL: define i32 @test(
6+
; CHECK-SAME: i8 [[TMP0:%.*]], i32 [[CONV2:%.*]], i1 [[CMP_I:%.*]], i64 [[SHL_I:%.*]]) {
7+
; CHECK-NEXT: [[ENTRY:.*:]]
8+
; CHECK-NEXT: [[CONV21:%.*]] = sext i8 [[TMP0]] to i32
9+
; CHECK-NEXT: [[CONV7:%.*]] = zext i32 [[CONV2]] to i64
10+
; CHECK-NEXT: [[COND_I:%.*]] = shl i64 [[CONV7]], [[SHL_I]]
11+
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[COND_I]], 4294967295
12+
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i64 [[TMP1]], 1
13+
; CHECK-NEXT: [[CONV7_1:%.*]] = zext i32 [[CONV2]] to i64
14+
; CHECK-NEXT: [[COND_I_1:%.*]] = shl i64 [[CONV7_1]], [[SHL_I]]
15+
; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[COND_I_1]], 4294967295
16+
; CHECK-NEXT: [[DOTNOT_1:%.*]] = icmp eq i64 [[TMP2]], 1
17+
; CHECK-NEXT: [[SUB_2:%.*]] = or i32 [[CONV21]], 1
18+
; CHECK-NEXT: [[COND_2:%.*]] = select i1 [[CMP_I]], i32 [[SUB_2]], i32 0
19+
; CHECK-NEXT: [[CONV7_2:%.*]] = zext i32 [[COND_2]] to i64
20+
; CHECK-NEXT: [[CMP_I_2:%.*]] = icmp slt i32 [[COND_2]], 1
21+
; CHECK-NEXT: [[SHL_I_2:%.*]] = zext i1 [[CMP_I_2]] to i64
22+
; CHECK-NEXT: [[COND_I_2:%.*]] = shl i64 [[CONV7_2]], [[SHL_I_2]]
23+
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[COND_I_2]], 4294967295
24+
; CHECK-NEXT: [[DOTNOT_2:%.*]] = icmp eq i64 [[TMP3]], 1
25+
; CHECK-NEXT: [[SUB_3:%.*]] = or i32 [[CONV21]], 1
26+
; CHECK-NEXT: [[COND_3:%.*]] = select i1 [[CMP_I]], i32 [[SUB_3]], i32 0
27+
; CHECK-NEXT: [[CONV7_3:%.*]] = zext i32 [[COND_3]] to i64
28+
; CHECK-NEXT: [[CMP_I_3:%.*]] = icmp slt i32 [[COND_3]], 1
29+
; CHECK-NEXT: [[SHL_I_3:%.*]] = zext i1 [[CMP_I_3]] to i64
30+
; CHECK-NEXT: [[COND_I_3:%.*]] = shl i64 [[CONV7_3]], [[SHL_I_3]]
31+
; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[COND_I_3]], 4294967295
32+
; CHECK-NEXT: [[DOTNOT_3:%.*]] = icmp eq i64 [[TMP4]], 1
33+
; CHECK-NEXT: [[SUB_4:%.*]] = or i32 [[CONV21]], 1
34+
; CHECK-NEXT: [[COND_4:%.*]] = select i1 [[CMP_I]], i32 [[SUB_4]], i32 0
35+
; CHECK-NEXT: [[CONV7_4:%.*]] = zext i32 [[COND_4]] to i64
36+
; CHECK-NEXT: [[CMP_I_4:%.*]] = icmp slt i32 [[COND_4]], 1
37+
; CHECK-NEXT: [[SHL_I_4:%.*]] = zext i1 [[CMP_I_4]] to i64
38+
; CHECK-NEXT: [[COND_I_4:%.*]] = shl i64 [[CONV7_4]], [[SHL_I_4]]
39+
; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[COND_I_4]], 4294967295
40+
; CHECK-NEXT: [[DOTNOT_4:%.*]] = icmp eq i64 [[TMP5]], 1
41+
; CHECK-NEXT: [[SUB_5:%.*]] = or i32 [[CONV21]], 1
42+
; CHECK-NEXT: [[COND_5:%.*]] = select i1 [[CMP_I]], i32 [[SUB_5]], i32 0
43+
; CHECK-NEXT: [[CONV7_5:%.*]] = zext i32 [[COND_5]] to i64
44+
; CHECK-NEXT: [[CMP_I_5:%.*]] = icmp slt i32 [[COND_5]], 1
45+
; CHECK-NEXT: [[SHL_I_5:%.*]] = zext i1 [[CMP_I_5]] to i64
46+
; CHECK-NEXT: [[COND_I_5:%.*]] = shl i64 [[CONV7_5]], [[SHL_I_5]]
47+
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[COND_I_5]], 4294967295
48+
; CHECK-NEXT: [[DOTNOT_5:%.*]] = icmp eq i64 [[TMP6]], 1
49+
; CHECK-NEXT: [[SUB_6:%.*]] = or i32 [[CONV21]], 1
50+
; CHECK-NEXT: [[COND_6:%.*]] = select i1 [[CMP_I]], i32 [[SUB_6]], i32 0
51+
; CHECK-NEXT: [[CONV7_6:%.*]] = zext i32 [[COND_6]] to i64
52+
; CHECK-NEXT: [[CMP_I_6:%.*]] = icmp slt i32 [[COND_6]], 1
53+
; CHECK-NEXT: [[SHL_I_6:%.*]] = zext i1 [[CMP_I_6]] to i64
54+
; CHECK-NEXT: [[COND_I_6:%.*]] = shl i64 [[CONV7_6]], [[SHL_I_6]]
55+
; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[COND_I_6]], 4294967295
56+
; CHECK-NEXT: [[DOTNOT_6:%.*]] = icmp eq i64 [[TMP7]], 1
57+
; CHECK-NEXT: [[SUB_7:%.*]] = or i32 [[CONV21]], 1
58+
; CHECK-NEXT: [[COND_7:%.*]] = select i1 [[CMP_I]], i32 [[SUB_7]], i32 0
59+
; CHECK-NEXT: [[CONV7_7:%.*]] = zext i32 [[COND_7]] to i64
60+
; CHECK-NEXT: [[CMP_I_7:%.*]] = icmp slt i32 [[COND_7]], 1
61+
; CHECK-NEXT: [[SHL_I_7:%.*]] = zext i1 [[CMP_I_7]] to i64
62+
; CHECK-NEXT: [[COND_I_7:%.*]] = shl i64 [[CONV7_7]], [[SHL_I_7]]
63+
; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[COND_I_7]], 4294967295
64+
; CHECK-NEXT: [[DOTNOT_7:%.*]] = icmp eq i64 [[TMP8]], 1
65+
; CHECK-NEXT: [[SUB_8:%.*]] = or i32 [[CONV21]], 1
66+
; CHECK-NEXT: [[COND_8:%.*]] = select i1 [[CMP_I]], i32 [[SUB_8]], i32 0
67+
; CHECK-NEXT: [[CONV7_8:%.*]] = zext i32 [[COND_8]] to i64
68+
; CHECK-NEXT: [[CMP_I_8:%.*]] = icmp slt i32 [[COND_8]], 1
69+
; CHECK-NEXT: [[SHL_I_8:%.*]] = zext i1 [[CMP_I_8]] to i64
70+
; CHECK-NEXT: [[COND_I_8:%.*]] = shl i64 [[CONV7_8]], [[SHL_I_8]]
71+
; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[COND_I_8]], 4294967295
72+
; CHECK-NEXT: [[DOTNOT_8:%.*]] = icmp eq i64 [[TMP9]], 1
73+
; CHECK-NEXT: [[SUB_9:%.*]] = or i32 [[CONV21]], 1
74+
; CHECK-NEXT: [[COND_9:%.*]] = select i1 [[CMP_I]], i32 [[SUB_9]], i32 0
75+
; CHECK-NEXT: [[CONV7_9:%.*]] = zext i32 [[COND_9]] to i64
76+
; CHECK-NEXT: [[CMP_I_9:%.*]] = icmp slt i32 [[COND_9]], 1
77+
; CHECK-NEXT: [[SHL_I_9:%.*]] = zext i1 [[CMP_I_9]] to i64
78+
; CHECK-NEXT: [[COND_I_9:%.*]] = shl i64 [[CONV7_9]], [[SHL_I_9]]
79+
; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[COND_I_9]], 4294967295
80+
; CHECK-NEXT: [[DOTNOT_9:%.*]] = icmp eq i64 [[TMP10]], 1
81+
; CHECK-NEXT: br label %[[WHILE_BODY:.*]]
82+
; CHECK: [[WHILE_BODY]]:
83+
; CHECK-NEXT: br i1 [[DOTNOT]], label %[[FOR_INC:.*]], label %[[IF_THEN10:.*]]
84+
; CHECK: [[IF_THEN10]]:
85+
; CHECK-NEXT: br label %[[FOR_INC]]
86+
; CHECK: [[FOR_INC]]:
87+
; CHECK-NEXT: br i1 [[DOTNOT_1]], label %[[FOR_INC_1:.*]], label %[[IF_THEN10_1:.*]]
88+
; CHECK: [[IF_THEN10_1]]:
89+
; CHECK-NEXT: br label %[[FOR_INC_1]]
90+
; CHECK: [[FOR_INC_1]]:
91+
; CHECK-NEXT: br i1 [[DOTNOT_2]], label %[[FOR_INC_2:.*]], label %[[IF_THEN10_2:.*]]
92+
; CHECK: [[IF_THEN10_2]]:
93+
; CHECK-NEXT: br label %[[FOR_INC_2]]
94+
; CHECK: [[FOR_INC_2]]:
95+
; CHECK-NEXT: br i1 [[DOTNOT_3]], label %[[FOR_INC_3:.*]], label %[[IF_THEN10_3:.*]]
96+
; CHECK: [[IF_THEN10_3]]:
97+
; CHECK-NEXT: br label %[[FOR_INC_3]]
98+
; CHECK: [[FOR_INC_3]]:
99+
; CHECK-NEXT: br i1 [[DOTNOT_4]], label %[[FOR_INC_4:.*]], label %[[IF_THEN10_4:.*]]
100+
; CHECK: [[IF_THEN10_4]]:
101+
; CHECK-NEXT: br label %[[FOR_INC_4]]
102+
; CHECK: [[FOR_INC_4]]:
103+
; CHECK-NEXT: br i1 [[DOTNOT_5]], label %[[FOR_INC_5:.*]], label %[[IF_THEN10_5:.*]]
104+
; CHECK: [[IF_THEN10_5]]:
105+
; CHECK-NEXT: br label %[[FOR_INC_5]]
106+
; CHECK: [[FOR_INC_5]]:
107+
; CHECK-NEXT: br i1 [[DOTNOT_6]], label %[[FOR_INC_6:.*]], label %[[IF_THEN10_6:.*]]
108+
; CHECK: [[IF_THEN10_6]]:
109+
; CHECK-NEXT: br label %[[FOR_INC_6]]
110+
; CHECK: [[FOR_INC_6]]:
111+
; CHECK-NEXT: br i1 [[DOTNOT_7]], label %[[FOR_INC_7:.*]], label %[[IF_THEN10_7:.*]]
112+
; CHECK: [[IF_THEN10_7]]:
113+
; CHECK-NEXT: br label %[[FOR_INC_7]]
114+
; CHECK: [[FOR_INC_7]]:
115+
; CHECK-NEXT: br i1 [[DOTNOT_8]], label %[[FOR_INC_8:.*]], label %[[IF_THEN10_8:.*]]
116+
; CHECK: [[IF_THEN10_8]]:
117+
; CHECK-NEXT: br label %[[FOR_INC_8]]
118+
; CHECK: [[FOR_INC_8]]:
119+
; CHECK-NEXT: br i1 [[DOTNOT_9]], label %[[WHILE_BODY]], label %[[IF_THEN10_9:.*]]
120+
; CHECK: [[IF_THEN10_9]]:
121+
; CHECK-NEXT: br label %[[WHILE_BODY]]
122+
;
123+
entry:
124+
%conv21 = sext i8 %0 to i32
125+
%conv7 = zext i32 %conv2 to i64
126+
%cond.i = shl i64 %conv7, %shl.i
127+
%1 = and i64 %cond.i, 4294967295
128+
%.not = icmp eq i64 %1, 1
129+
%conv7.1 = zext i32 %conv2 to i64
130+
%cond.i.1 = shl i64 %conv7.1, %shl.i
131+
%2 = and i64 %cond.i.1, 4294967295
132+
%.not.1 = icmp eq i64 %2, 1
133+
%sub.2 = or i32 %conv21, 1
134+
%cond.2 = select i1 %cmp.i, i32 %sub.2, i32 0
135+
%conv7.2 = zext i32 %cond.2 to i64
136+
%cmp.i.2 = icmp slt i32 %cond.2, 1
137+
%shl.i.2 = zext i1 %cmp.i.2 to i64
138+
%cond.i.2 = shl i64 %conv7.2, %shl.i.2
139+
%3 = and i64 %cond.i.2, 4294967295
140+
%.not.2 = icmp eq i64 %3, 1
141+
%sub.3 = or i32 %conv21, 1
142+
%cond.3 = select i1 %cmp.i, i32 %sub.3, i32 0
143+
%conv7.3 = zext i32 %cond.3 to i64
144+
%cmp.i.3 = icmp slt i32 %cond.3, 1
145+
%shl.i.3 = zext i1 %cmp.i.3 to i64
146+
%cond.i.3 = shl i64 %conv7.3, %shl.i.3
147+
%4 = and i64 %cond.i.3, 4294967295
148+
%.not.3 = icmp eq i64 %4, 1
149+
%sub.4 = or i32 %conv21, 1
150+
%cond.4 = select i1 %cmp.i, i32 %sub.4, i32 0
151+
%conv7.4 = zext i32 %cond.4 to i64
152+
%cmp.i.4 = icmp slt i32 %cond.4, 1
153+
%shl.i.4 = zext i1 %cmp.i.4 to i64
154+
%cond.i.4 = shl i64 %conv7.4, %shl.i.4
155+
%5 = and i64 %cond.i.4, 4294967295
156+
%.not.4 = icmp eq i64 %5, 1
157+
%sub.5 = or i32 %conv21, 1
158+
%cond.5 = select i1 %cmp.i, i32 %sub.5, i32 0
159+
%conv7.5 = zext i32 %cond.5 to i64
160+
%cmp.i.5 = icmp slt i32 %cond.5, 1
161+
%shl.i.5 = zext i1 %cmp.i.5 to i64
162+
%cond.i.5 = shl i64 %conv7.5, %shl.i.5
163+
%6 = and i64 %cond.i.5, 4294967295
164+
%.not.5 = icmp eq i64 %6, 1
165+
%sub.6 = or i32 %conv21, 1
166+
%cond.6 = select i1 %cmp.i, i32 %sub.6, i32 0
167+
%conv7.6 = zext i32 %cond.6 to i64
168+
%cmp.i.6 = icmp slt i32 %cond.6, 1
169+
%shl.i.6 = zext i1 %cmp.i.6 to i64
170+
%cond.i.6 = shl i64 %conv7.6, %shl.i.6
171+
%7 = and i64 %cond.i.6, 4294967295
172+
%.not.6 = icmp eq i64 %7, 1
173+
%sub.7 = or i32 %conv21, 1
174+
%cond.7 = select i1 %cmp.i, i32 %sub.7, i32 0
175+
%conv7.7 = zext i32 %cond.7 to i64
176+
%cmp.i.7 = icmp slt i32 %cond.7, 1
177+
%shl.i.7 = zext i1 %cmp.i.7 to i64
178+
%cond.i.7 = shl i64 %conv7.7, %shl.i.7
179+
%8 = and i64 %cond.i.7, 4294967295
180+
%.not.7 = icmp eq i64 %8, 1
181+
%sub.8 = or i32 %conv21, 1
182+
%cond.8 = select i1 %cmp.i, i32 %sub.8, i32 0
183+
%conv7.8 = zext i32 %cond.8 to i64
184+
%cmp.i.8 = icmp slt i32 %cond.8, 1
185+
%shl.i.8 = zext i1 %cmp.i.8 to i64
186+
%cond.i.8 = shl i64 %conv7.8, %shl.i.8
187+
%9 = and i64 %cond.i.8, 4294967295
188+
%.not.8 = icmp eq i64 %9, 1
189+
%sub.9 = or i32 %conv21, 1
190+
%cond.9 = select i1 %cmp.i, i32 %sub.9, i32 0
191+
%conv7.9 = zext i32 %cond.9 to i64
192+
%cmp.i.9 = icmp slt i32 %cond.9, 1
193+
%shl.i.9 = zext i1 %cmp.i.9 to i64
194+
%cond.i.9 = shl i64 %conv7.9, %shl.i.9
195+
%10 = and i64 %cond.i.9, 4294967295
196+
%.not.9 = icmp eq i64 %10, 1
197+
br label %while.body
198+
199+
while.body:
200+
br i1 %.not, label %for.inc, label %if.then10
201+
202+
if.then10:
203+
br label %for.inc
204+
205+
for.inc:
206+
br i1 %.not.1, label %for.inc.1, label %if.then10.1
207+
208+
if.then10.1:
209+
br label %for.inc.1
210+
211+
for.inc.1:
212+
br i1 %.not.2, label %for.inc.2, label %if.then10.2
213+
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if.then10.2:
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br label %for.inc.2
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for.inc.2:
218+
br i1 %.not.3, label %for.inc.3, label %if.then10.3
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if.then10.3:
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br label %for.inc.3
222+
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for.inc.3:
224+
br i1 %.not.4, label %for.inc.4, label %if.then10.4
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if.then10.4:
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br label %for.inc.4
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229+
for.inc.4:
230+
br i1 %.not.5, label %for.inc.5, label %if.then10.5
231+
232+
if.then10.5:
233+
br label %for.inc.5
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235+
for.inc.5:
236+
br i1 %.not.6, label %for.inc.6, label %if.then10.6
237+
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if.then10.6:
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br label %for.inc.6
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for.inc.6:
242+
br i1 %.not.7, label %for.inc.7, label %if.then10.7
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if.then10.7:
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br label %for.inc.7
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247+
for.inc.7:
248+
br i1 %.not.8, label %for.inc.8, label %if.then10.8
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250+
if.then10.8:
251+
br label %for.inc.8
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253+
for.inc.8:
254+
br i1 %.not.9, label %while.body, label %if.then10.9
255+
256+
if.then10.9:
257+
br label %while.body
258+
}

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