@@ -635,7 +635,7 @@ void InstrEmitter::EmitSubregNode(SDNode *Node,
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void
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InstrEmitter::EmitCopyToRegClassNode (SDNode *Node,
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DenseMap<SDValue, Register> &VRBaseMap) {
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- unsigned VReg = getVR (Node->getOperand (0 ), VRBaseMap);
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+ Register VReg = getVR (Node->getOperand (0 ), VRBaseMap);
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// Create the new VReg in the destination class and emit a copy.
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unsigned DstRCIdx = Node->getConstantOperandVal (1 );
@@ -678,7 +678,7 @@ void InstrEmitter::EmitRegSequence(SDNode *Node,
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// insert copies for them in TwoAddressInstructionPass anyway.
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if (!R || !R->getReg ().isPhysical ()) {
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unsigned SubIdx = Op->getAsZExtVal ();
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- unsigned SubReg = getVR (Node->getOperand (i- 1 ), VRBaseMap);
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+ Register SubReg = getVR (Node->getOperand (i - 1 ), VRBaseMap);
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const TargetRegisterClass *TRC = MRI->getRegClass (SubReg);
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const TargetRegisterClass *SRC =
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TRI->getMatchingSuperRegClass (RC, TRC, SubIdx);
@@ -1274,7 +1274,7 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
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break ;
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}
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case ISD::CopyFromReg: {
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- unsigned SrcReg = cast<RegisterSDNode>(Node->getOperand (1 ))->getReg ();
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+ Register SrcReg = cast<RegisterSDNode>(Node->getOperand (1 ))->getReg ();
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EmitCopyFromReg (Node, 0 , IsClone, SrcReg, VRBaseMap);
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break ;
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}
@@ -1343,7 +1343,7 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
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SmallVector<unsigned , 8 > GroupIdx;
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// Remember registers that are part of early-clobber defs.
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- SmallVector<unsigned , 8 > ECRegs;
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+ SmallVector<Register , 8 > ECRegs;
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// Add all of the operand registers to the instruction.
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for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
@@ -1424,7 +1424,7 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
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// used), but this does not match the semantics of our early-clobber flag.
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// If an early-clobber operand register is also an input operand register,
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// then remove the early-clobber flag.
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- for (unsigned Reg : ECRegs) {
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+ for (Register Reg : ECRegs) {
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if (MIB->readsRegister (Reg, TRI)) {
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MachineOperand *MO =
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MIB->findRegisterDefOperand (Reg, TRI, false , false );
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