fixup! [llvm][RISCV] Support RISCV vector tuple type in llvm IR

Author: 4vtomat

clang/utils/TableGen/RISCVVEmitter.cpp

@@ -218,9 +218,7 @@ static unsigned getSegInstLog2SEW(StringRef InstName) {
 #undef KEY_VAL_ALL_NF
 #undef KEY_VAL
 
-  if (SegInsts.contains(InstName))
-    return SegInsts[InstName];
-  return 0;
+  return SegInsts.lookup(InstName);
 }
 
 void emitCodeGenSwitchBody(const RVVIntrinsic *RVVI, raw_ostream &OS) {

llvm/include/llvm/IR/Type.h

@@ -266,7 +266,7 @@ class Type {
     return getTypeID() == ScalableVectorTyID || getTypeID() == FixedVectorTyID;
   }
 
-  // True if this is an instance of TargetExtType of RISCV vector tuple.
+  // True if this is an instance of TargetExtType of RISC-V vector tuple.
   bool isRISCVVectorTupleTy() const;
 
   /// Return true if this type could be converted with a lossless BitCast to

llvm/lib/IR/Type.cpp

@@ -852,16 +852,17 @@ static TargetTypeInfo getTargetTypeInfo(const TargetExtType *Ty) {
     return TargetTypeInfo(ScalableVectorType::get(Type::getInt1Ty(C), 16),
                           TargetExtType::HasZeroInit);
 
-  // RISCV vector tuple type. The layout is represented as the type that needs
+  // RISC-V vector tuple type. The layout is represented as the type that needs
   // the same number of vector registers(VREGS) as this tuple type, represented
   // as <vscale x (VREGS * 8) x i8>.
   if (Name == "riscv_vec_tuple") {
     unsigned TotalNumElts =
         std::max(cast<ScalableVectorType>(Ty->getTypeParameter(0))
                      ->getMinNumElements(),
-                 8UL) *
+                 (uint64_t)8) *
         Ty->getIntParameter(0);
-    return TargetTypeInfo(ScalableVectorType::get(Type::getInt8Ty(C), TotalNumElts));
+    return TargetTypeInfo(
+        ScalableVectorType::get(Type::getInt8Ty(C), TotalNumElts));
   }
 
   return TargetTypeInfo(Type::getVoidTy(C));