Skip to content

Commit 902ea58

Browse files
aheejinaheejin
committed
[WebAssembly] Rename atomic.notify and *.atomic.wait
- atomic.notify -> memory.atomic.notify - i32.atomic.wait -> memory.atomic.wait32 - i64.atomic.wait -> memory.atomic.wait64 See WebAssembly/threads#149. Reviewed By: tlively Differential Revision: https://reviews.llvm.org/D91447
1 parent a20220d commit 902ea58

File tree

11 files changed

+194
-185
lines changed

11 files changed

+194
-185
lines changed

‎clang/include/clang/Basic/BuiltinsWebAssembly.def

+3-3
Original file line numberDiff line numberDiff line change
@@ -41,9 +41,9 @@ TARGET_BUILTIN(__builtin_wasm_throw, "vIUiv*", "r", "exception-handling")
4141
TARGET_BUILTIN(__builtin_wasm_rethrow_in_catch, "v", "r", "exception-handling")
4242

4343
// Atomic wait and notify.
44-
TARGET_BUILTIN(__builtin_wasm_atomic_wait_i32, "ii*iLLi", "n", "atomics")
45-
TARGET_BUILTIN(__builtin_wasm_atomic_wait_i64, "iLLi*LLiLLi", "n", "atomics")
46-
TARGET_BUILTIN(__builtin_wasm_atomic_notify, "Uii*Ui", "n", "atomics")
44+
TARGET_BUILTIN(__builtin_wasm_memory_atomic_wait32, "ii*iLLi", "n", "atomics")
45+
TARGET_BUILTIN(__builtin_wasm_memory_atomic_wait64, "iLLi*LLiLLi", "n", "atomics")
46+
TARGET_BUILTIN(__builtin_wasm_memory_atomic_notify, "Uii*Ui", "n", "atomics")
4747

4848
// Trapping fp-to-int conversions
4949
BUILTIN(__builtin_wasm_trunc_s_i32_f32, "if", "nc")

‎clang/lib/CodeGen/CGBuiltin.cpp

+6-6
Original file line numberDiff line numberDiff line change
@@ -16425,24 +16425,24 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1642516425
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_rethrow_in_catch);
1642616426
return Builder.CreateCall(Callee);
1642716427
}
16428-
case WebAssembly::BI__builtin_wasm_atomic_wait_i32: {
16428+
case WebAssembly::BI__builtin_wasm_memory_atomic_wait32: {
1642916429
Value *Addr = EmitScalarExpr(E->getArg(0));
1643016430
Value *Expected = EmitScalarExpr(E->getArg(1));
1643116431
Value *Timeout = EmitScalarExpr(E->getArg(2));
16432-
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_wait_i32);
16432+
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_atomic_wait32);
1643316433
return Builder.CreateCall(Callee, {Addr, Expected, Timeout});
1643416434
}
16435-
case WebAssembly::BI__builtin_wasm_atomic_wait_i64: {
16435+
case WebAssembly::BI__builtin_wasm_memory_atomic_wait64: {
1643616436
Value *Addr = EmitScalarExpr(E->getArg(0));
1643716437
Value *Expected = EmitScalarExpr(E->getArg(1));
1643816438
Value *Timeout = EmitScalarExpr(E->getArg(2));
16439-
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_wait_i64);
16439+
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_atomic_wait64);
1644016440
return Builder.CreateCall(Callee, {Addr, Expected, Timeout});
1644116441
}
16442-
case WebAssembly::BI__builtin_wasm_atomic_notify: {
16442+
case WebAssembly::BI__builtin_wasm_memory_atomic_notify: {
1644316443
Value *Addr = EmitScalarExpr(E->getArg(0));
1644416444
Value *Count = EmitScalarExpr(E->getArg(1));
16445-
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_notify);
16445+
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_atomic_notify);
1644616446
return Builder.CreateCall(Callee, {Addr, Count});
1644716447
}
1644816448
case WebAssembly::BI__builtin_wasm_trunc_s_i32_f32:

‎clang/test/CodeGen/builtins-wasm.c

+12-12
Original file line numberDiff line numberDiff line change
@@ -55,22 +55,22 @@ void rethrow_in_catch(void) {
5555
// WEBASSEMBLY64: call void @llvm.wasm.rethrow.in.catch()
5656
}
5757

58-
int atomic_wait_i32(int *addr, int expected, long long timeout) {
59-
return __builtin_wasm_atomic_wait_i32(addr, expected, timeout);
60-
// WEBASSEMBLY32: call i32 @llvm.wasm.atomic.wait.i32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
61-
// WEBASSEMBLY64: call i32 @llvm.wasm.atomic.wait.i32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
58+
int memory_atomic_wait32(int *addr, int expected, long long timeout) {
59+
return __builtin_wasm_memory_atomic_wait32(addr, expected, timeout);
60+
// WEBASSEMBLY32: call i32 @llvm.wasm.memory.atomic.wait32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
61+
// WEBASSEMBLY64: call i32 @llvm.wasm.memory.atomic.wait32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
6262
}
6363

64-
int atomic_wait_i64(long long *addr, long long expected, long long timeout) {
65-
return __builtin_wasm_atomic_wait_i64(addr, expected, timeout);
66-
// WEBASSEMBLY32: call i32 @llvm.wasm.atomic.wait.i64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
67-
// WEBASSEMBLY64: call i32 @llvm.wasm.atomic.wait.i64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
64+
int memory_atomic_wait64(long long *addr, long long expected, long long timeout) {
65+
return __builtin_wasm_memory_atomic_wait64(addr, expected, timeout);
66+
// WEBASSEMBLY32: call i32 @llvm.wasm.memory.atomic.wait64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
67+
// WEBASSEMBLY64: call i32 @llvm.wasm.memory.atomic.wait64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
6868
}
6969

70-
unsigned int atomic_notify(int *addr, unsigned int count) {
71-
return __builtin_wasm_atomic_notify(addr, count);
72-
// WEBASSEMBLY32: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
73-
// WEBASSEMBLY64: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
70+
unsigned int memory_atomic_notify(int *addr, unsigned int count) {
71+
return __builtin_wasm_memory_atomic_notify(addr, count);
72+
// WEBASSEMBLY32: call i32 @llvm.wasm.memory.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
73+
// WEBASSEMBLY64: call i32 @llvm.wasm.memory.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
7474
}
7575

7676
int trunc_s_i32_f32(float f) {

‎llvm/include/llvm/IR/IntrinsicsWebAssembly.td

+12-11
Original file line numberDiff line numberDiff line change
@@ -79,22 +79,23 @@ def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
7979
//===----------------------------------------------------------------------===//
8080

8181
// wait / notify
82-
def int_wasm_atomic_wait_i32 :
82+
def int_wasm_memory_atomic_wait32 :
8383
Intrinsic<[llvm_i32_ty],
8484
[LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
85-
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>,
86-
IntrHasSideEffects],
87-
"", [SDNPMemOperand]>;
88-
def int_wasm_atomic_wait_i64 :
85+
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
86+
NoCapture<ArgIndex<0>>, IntrHasSideEffects],
87+
"", [SDNPMemOperand]>;
88+
def int_wasm_memory_atomic_wait64 :
8989
Intrinsic<[llvm_i32_ty],
9090
[LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty],
91-
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>,
92-
IntrHasSideEffects],
93-
"", [SDNPMemOperand]>;
94-
def int_wasm_atomic_notify:
91+
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
92+
NoCapture<ArgIndex<0>>, IntrHasSideEffects],
93+
"", [SDNPMemOperand]>;
94+
def int_wasm_memory_atomic_notify:
9595
Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty],
96-
[IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>, IntrHasSideEffects], "",
97-
[SDNPMemOperand]>;
96+
[IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
97+
IntrHasSideEffects],
98+
"", [SDNPMemOperand]>;
9899

99100
//===----------------------------------------------------------------------===//
100101
// SIMD intrinsics

‎llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -249,8 +249,8 @@ inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
249249
WASM_LOAD_STORE(ATOMIC_RMW32_U_XCHG_I64)
250250
WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I32)
251251
WASM_LOAD_STORE(ATOMIC_RMW32_U_CMPXCHG_I64)
252-
WASM_LOAD_STORE(ATOMIC_NOTIFY)
253-
WASM_LOAD_STORE(ATOMIC_WAIT_I32)
252+
WASM_LOAD_STORE(MEMORY_ATOMIC_NOTIFY)
253+
WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT32)
254254
WASM_LOAD_STORE(LOAD_SPLAT_v32x4)
255255
WASM_LOAD_STORE(LOAD_ZERO_v4i32)
256256
WASM_LOAD_STORE(LOAD_LANE_v4i32)
@@ -269,7 +269,7 @@ inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
269269
WASM_LOAD_STORE(ATOMIC_RMW_XOR_I64)
270270
WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I64)
271271
WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I64)
272-
WASM_LOAD_STORE(ATOMIC_WAIT_I64)
272+
WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT64)
273273
WASM_LOAD_STORE(LOAD_SPLAT_v64x2)
274274
WASM_LOAD_STORE(LOAD_EXTEND_S_v8i16)
275275
WASM_LOAD_STORE(LOAD_EXTEND_U_v8i16)

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -646,7 +646,7 @@ bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
646646
MachineFunction &MF,
647647
unsigned Intrinsic) const {
648648
switch (Intrinsic) {
649-
case Intrinsic::wasm_atomic_notify:
649+
case Intrinsic::wasm_memory_atomic_notify:
650650
Info.opc = ISD::INTRINSIC_W_CHAIN;
651651
Info.memVT = MVT::i32;
652652
Info.ptrVal = I.getArgOperand(0);
@@ -660,15 +660,15 @@ bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
660660
// consistent. The same applies for wasm_atomic_wait intrinsics too.
661661
Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
662662
return true;
663-
case Intrinsic::wasm_atomic_wait_i32:
663+
case Intrinsic::wasm_memory_atomic_wait32:
664664
Info.opc = ISD::INTRINSIC_W_CHAIN;
665665
Info.memVT = MVT::i32;
666666
Info.ptrVal = I.getArgOperand(0);
667667
Info.offset = 0;
668668
Info.align = Align(4);
669669
Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
670670
return true;
671-
case Intrinsic::wasm_atomic_wait_i64:
671+
case Intrinsic::wasm_memory_atomic_wait64:
672672
Info.opc = ISD::INTRINSIC_W_CHAIN;
673673
Info.memVT = MVT::i64;
674674
Info.ptrVal = I.getArgOperand(0);

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td

+64-56
Original file line numberDiff line numberDiff line change
@@ -33,96 +33,98 @@ multiclass ATOMIC_NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
3333
//===----------------------------------------------------------------------===//
3434

3535
let hasSideEffects = 1 in {
36-
defm ATOMIC_NOTIFY_A32 :
36+
defm MEMORY_ATOMIC_NOTIFY_A32 :
3737
ATOMIC_I<(outs I32:$dst),
3838
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$count),
3939
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
40-
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
41-
"atomic.notify \t${off}${p2align}", 0x00, "false">;
42-
defm ATOMIC_NOTIFY_A64 :
40+
"memory.atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
41+
"memory.atomic.notify \t${off}${p2align}", 0x00, "false">;
42+
defm MEMORY_ATOMIC_NOTIFY_A64 :
4343
ATOMIC_I<(outs I32:$dst),
4444
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$count),
4545
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
46-
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
47-
"atomic.notify \t${off}${p2align}", 0x00, "true">;
46+
"memory.atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
47+
"memory.atomic.notify \t${off}${p2align}", 0x00, "true">;
4848
let mayLoad = 1 in {
49-
defm ATOMIC_WAIT_I32_A32 :
49+
defm MEMORY_ATOMIC_WAIT32_A32 :
5050
ATOMIC_I<(outs I32:$dst),
5151
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$exp,
5252
I64:$timeout),
5353
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
54-
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
55-
"i32.atomic.wait \t${off}${p2align}", 0x01, "false">;
56-
defm ATOMIC_WAIT_I32_A64 :
54+
"memory.atomic.wait32 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
55+
"memory.atomic.wait32 \t${off}${p2align}", 0x01, "false">;
56+
defm MEMORY_ATOMIC_WAIT32_A64 :
5757
ATOMIC_I<(outs I32:$dst),
5858
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$exp,
5959
I64:$timeout),
6060
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
61-
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
62-
"i32.atomic.wait \t${off}${p2align}", 0x01, "true">;
63-
defm ATOMIC_WAIT_I64_A32 :
61+
"memory.atomic.wait32 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
62+
"memory.atomic.wait32 \t${off}${p2align}", 0x01, "true">;
63+
defm MEMORY_ATOMIC_WAIT64_A32 :
6464
ATOMIC_I<(outs I32:$dst),
6565
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp,
6666
I64:$timeout),
6767
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
68-
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
69-
"i64.atomic.wait \t${off}${p2align}", 0x02, "false">;
70-
defm ATOMIC_WAIT_I64_A64 :
68+
"memory.atomic.wait64 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
69+
"memory.atomic.wait64 \t${off}${p2align}", 0x02, "false">;
70+
defm MEMORY_ATOMIC_WAIT64_A64 :
7171
ATOMIC_I<(outs I32:$dst),
7272
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I64:$exp,
7373
I64:$timeout),
7474
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
75-
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
76-
"i64.atomic.wait \t${off}${p2align}", 0x02, "true">;
75+
"memory.atomic.wait64 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
76+
"memory.atomic.wait64 \t${off}${p2align}", 0x02, "true">;
7777
} // mayLoad = 1
7878
} // hasSideEffects = 1
7979

8080
let Predicates = [HasAtomics] in {
8181
// Select notifys with no constant offset.
8282
def NotifyPatNoOffset_A32 :
83-
Pat<(i32 (int_wasm_atomic_notify I32:$addr, I32:$count)),
84-
(ATOMIC_NOTIFY_A32 0, 0, I32:$addr, I32:$count)>,
83+
Pat<(i32 (int_wasm_memory_atomic_notify I32:$addr, I32:$count)),
84+
(MEMORY_ATOMIC_NOTIFY_A32 0, 0, I32:$addr, I32:$count)>,
8585
Requires<[HasAddr32]>;
8686
def NotifyPatNoOffset_A64 :
87-
Pat<(i32 (int_wasm_atomic_notify I64:$addr, I32:$count)),
88-
(ATOMIC_NOTIFY_A64 0, 0, I64:$addr, I32:$count)>,
87+
Pat<(i32 (int_wasm_memory_atomic_notify I64:$addr, I32:$count)),
88+
(MEMORY_ATOMIC_NOTIFY_A64 0, 0, I64:$addr, I32:$count)>,
8989
Requires<[HasAddr64]>;
9090

9191
// Select notifys with a constant offset.
9292

9393
// Pattern with address + immediate offset
9494
multiclass NotifyPatImmOff<PatFrag operand, string inst> {
95-
def : Pat<(i32 (int_wasm_atomic_notify (operand I32:$addr, imm:$off),
95+
def : Pat<(i32 (int_wasm_memory_atomic_notify (operand I32:$addr, imm:$off),
9696
I32:$count)),
9797
(!cast<NI>(inst#_A32) 0, imm:$off, I32:$addr, I32:$count)>,
9898
Requires<[HasAddr32]>;
99-
def : Pat<(i32 (int_wasm_atomic_notify (operand I64:$addr, imm:$off),
99+
def : Pat<(i32 (int_wasm_memory_atomic_notify (operand I64:$addr, imm:$off),
100100
I32:$count)),
101101
(!cast<NI>(inst#_A64) 0, imm:$off, I64:$addr, I32:$count)>,
102102
Requires<[HasAddr64]>;
103103
}
104-
defm : NotifyPatImmOff<regPlusImm, "ATOMIC_NOTIFY">;
105-
defm : NotifyPatImmOff<or_is_add, "ATOMIC_NOTIFY">;
104+
defm : NotifyPatImmOff<regPlusImm, "MEMORY_ATOMIC_NOTIFY">;
105+
defm : NotifyPatImmOff<or_is_add, "MEMORY_ATOMIC_NOTIFY">;
106106

107107
// Select notifys with just a constant offset.
108108
def NotifyPatOffsetOnly_A32 :
109-
Pat<(i32 (int_wasm_atomic_notify imm:$off, I32:$count)),
110-
(ATOMIC_NOTIFY_A32 0, imm:$off, (CONST_I32 0), I32:$count)>,
109+
Pat<(i32 (int_wasm_memory_atomic_notify imm:$off, I32:$count)),
110+
(MEMORY_ATOMIC_NOTIFY_A32 0, imm:$off, (CONST_I32 0), I32:$count)>,
111111
Requires<[HasAddr32]>;
112112
def NotifyPatOffsetOnly_A64 :
113-
Pat<(i32 (int_wasm_atomic_notify imm:$off, I32:$count)),
114-
(ATOMIC_NOTIFY_A64 0, imm:$off, (CONST_I64 0), I32:$count)>,
113+
Pat<(i32 (int_wasm_memory_atomic_notify imm:$off, I32:$count)),
114+
(MEMORY_ATOMIC_NOTIFY_A64 0, imm:$off, (CONST_I64 0), I32:$count)>,
115115
Requires<[HasAddr64]>;
116116

117117
def NotifyPatGlobalAddrOffOnly_A32 :
118-
Pat<(i32 (int_wasm_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
119-
I32:$count)),
120-
(ATOMIC_NOTIFY_A32 0, tglobaladdr:$off, (CONST_I32 0), I32:$count)>,
118+
Pat<(i32 (int_wasm_memory_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
119+
I32:$count)),
120+
(MEMORY_ATOMIC_NOTIFY_A32 0, tglobaladdr:$off, (CONST_I32 0), I32:$count)
121+
>,
121122
Requires<[HasAddr32]>;
122123
def NotifyPatGlobalAddrOffOnly_A64 :
123-
Pat<(i32 (int_wasm_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
124-
I32:$count)),
125-
(ATOMIC_NOTIFY_A64 0, tglobaladdr:$off, (CONST_I64 0), I32:$count)>,
124+
Pat<(i32 (int_wasm_memory_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
125+
I32:$count)),
126+
(MEMORY_ATOMIC_NOTIFY_A64 0, tglobaladdr:$off, (CONST_I64 0), I32:$count)
127+
>,
126128
Requires<[HasAddr64]>;
127129

128130
// Select waits with no constant offset.
@@ -135,10 +137,14 @@ multiclass WaitPatNoOffset<ValueType ty, Intrinsic kind,
135137
(!cast<NI>(inst#_A64) 0, 0, I64:$addr, ty:$exp, I64:$timeout)>,
136138
Requires<[HasAddr64]>;
137139
}
138-
defm : WaitPatNoOffset<i32, int_wasm_atomic_wait_i32, "ATOMIC_WAIT_I32">;
139-
defm : WaitPatNoOffset<i64, int_wasm_atomic_wait_i64, "ATOMIC_WAIT_I64">;
140-
defm : WaitPatNoOffset<i32, int_wasm_atomic_wait_i32, "ATOMIC_WAIT_I32">;
141-
defm : WaitPatNoOffset<i64, int_wasm_atomic_wait_i64, "ATOMIC_WAIT_I64">;
140+
defm : WaitPatNoOffset<i32, int_wasm_memory_atomic_wait32,
141+
"MEMORY_ATOMIC_WAIT32">;
142+
defm : WaitPatNoOffset<i64, int_wasm_memory_atomic_wait64,
143+
"MEMORY_ATOMIC_WAIT64">;
144+
defm : WaitPatNoOffset<i32, int_wasm_memory_atomic_wait32,
145+
"MEMORY_ATOMIC_WAIT32">;
146+
defm : WaitPatNoOffset<i64, int_wasm_memory_atomic_wait64,
147+
"MEMORY_ATOMIC_WAIT64">;
142148

143149
// Select waits with a constant offset.
144150

@@ -154,16 +160,16 @@ multiclass WaitPatImmOff<ValueType ty, Intrinsic kind, PatFrag operand,
154160
I64:$timeout)>,
155161
Requires<[HasAddr64]>;
156162
}
157-
defm : WaitPatImmOff<i32, int_wasm_atomic_wait_i32, regPlusImm,
158-
"ATOMIC_WAIT_I32">;
159-
defm : WaitPatImmOff<i32, int_wasm_atomic_wait_i32, or_is_add,
160-
"ATOMIC_WAIT_I32">;
161-
defm : WaitPatImmOff<i64, int_wasm_atomic_wait_i64, regPlusImm,
162-
"ATOMIC_WAIT_I64">;
163-
defm : WaitPatImmOff<i64, int_wasm_atomic_wait_i64, or_is_add,
164-
"ATOMIC_WAIT_I64">;
165-
166-
// Select wait_i32, "ATOMIC_WAIT_I32s with just a constant offset.
163+
defm : WaitPatImmOff<i32, int_wasm_memory_atomic_wait32, regPlusImm,
164+
"MEMORY_ATOMIC_WAIT32">;
165+
defm : WaitPatImmOff<i32, int_wasm_memory_atomic_wait32, or_is_add,
166+
"MEMORY_ATOMIC_WAIT32">;
167+
defm : WaitPatImmOff<i64, int_wasm_memory_atomic_wait64, regPlusImm,
168+
"MEMORY_ATOMIC_WAIT64">;
169+
defm : WaitPatImmOff<i64, int_wasm_memory_atomic_wait64, or_is_add,
170+
"MEMORY_ATOMIC_WAIT64">;
171+
172+
// Select waits with just a constant offset.
167173
multiclass WaitPatOffsetOnly<ValueType ty, Intrinsic kind, string inst> {
168174
def : Pat<(i32 (kind imm:$off, ty:$exp, I64:$timeout)),
169175
(!cast<NI>(inst#_A32) 0, imm:$off, (CONST_I32 0), ty:$exp,
@@ -174,8 +180,10 @@ multiclass WaitPatOffsetOnly<ValueType ty, Intrinsic kind, string inst> {
174180
I64:$timeout)>,
175181
Requires<[HasAddr64]>;
176182
}
177-
defm : WaitPatOffsetOnly<i32, int_wasm_atomic_wait_i32, "ATOMIC_WAIT_I32">;
178-
defm : WaitPatOffsetOnly<i64, int_wasm_atomic_wait_i64, "ATOMIC_WAIT_I64">;
183+
defm : WaitPatOffsetOnly<i32, int_wasm_memory_atomic_wait32,
184+
"MEMORY_ATOMIC_WAIT32">;
185+
defm : WaitPatOffsetOnly<i64, int_wasm_memory_atomic_wait64,
186+
"MEMORY_ATOMIC_WAIT64">;
179187

180188
multiclass WaitPatGlobalAddrOffOnly<ValueType ty, Intrinsic kind, string inst> {
181189
def : Pat<(i32 (kind (WebAssemblywrapper tglobaladdr:$off), ty:$exp,
@@ -189,10 +197,10 @@ multiclass WaitPatGlobalAddrOffOnly<ValueType ty, Intrinsic kind, string inst> {
189197
I64:$timeout)>,
190198
Requires<[HasAddr64]>;
191199
}
192-
defm : WaitPatGlobalAddrOffOnly<i32, int_wasm_atomic_wait_i32,
193-
"ATOMIC_WAIT_I32">;
194-
defm : WaitPatGlobalAddrOffOnly<i64, int_wasm_atomic_wait_i64,
195-
"ATOMIC_WAIT_I64">;
200+
defm : WaitPatGlobalAddrOffOnly<i32, int_wasm_memory_atomic_wait32,
201+
"MEMORY_ATOMIC_WAIT32">;
202+
defm : WaitPatGlobalAddrOffOnly<i64, int_wasm_memory_atomic_wait64,
203+
"MEMORY_ATOMIC_WAIT64">;
196204
} // Predicates = [HasAtomics]
197205

198206
//===----------------------------------------------------------------------===//

0 commit comments

Comments
 (0)