@@ -99,6 +99,7 @@ def SIDPGFX950FullSpeedModel : SISchedMachineModel;
99
99
def GFX10SpeedModel : SISchedMachineModel;
100
100
def GFX11SpeedModel : SISchedMachineModel;
101
101
def GFX12SpeedModel : SISchedMachineModel;
102
+ def GFX1250SpeedModel : SISchedMachineModel;
102
103
103
104
// XXX: Are the resource counts correct?
104
105
def HWBranch : ProcResource<1> {
@@ -455,3 +456,35 @@ def : HWWriteRes<WriteBarrier, [HWBranch], 2000>;
455
456
def : InstRW<[WriteCopy], (instrs COPY)>;
456
457
457
458
} // End SchedModel = GFX12SpeedModel
459
+
460
+ multiclass GFX125xCommonWriteRes {
461
+
462
+ def : HWWriteRes<Write32Bit, [HWVALU, HWRC], 5>;
463
+ def : HWWriteRes<WriteFloatCvt, [HWVALU, HWRC], 5>;
464
+ def : HWWriteRes<WriteTrans32, [HWTransVALU, HWRC], 7>;
465
+ def : HWWriteRes<WriteQuarterRate32, [HWVALU, HWRC], 6>;
466
+ def : HWWriteRes<WriteFloatFMA, [HWVALU, HWRC], 5>;
467
+ def : HWWriteRes<WritePseudoScalarTrans, [HWVALU, HWRC], 8>;
468
+
469
+ def : HWWriteRes<WriteBranch, [HWBranch], 32>;
470
+ def : HWWriteRes<WriteExport, [HWExport, HWRC], 16>;
471
+ def : HWWriteRes<WriteLDS, [HWLGKM, HWRC], 20>;
472
+ def : HWWriteRes<WriteSALU, [HWSALU, HWRC], 2>;
473
+ def : HWWriteRes<WriteSFPU, [HWSALU, HWRC], 4>;
474
+ def : HWWriteRes<WriteSMEM, [HWLGKM, HWRC], 20>;
475
+ def : HWWriteRes<WriteVMEM, [HWVMEM, HWRC], 320>;
476
+ def : HWWriteRes<WriteBarrier, [HWBranch], 2000>;
477
+
478
+ def : InstRW<[WriteCopy], (instrs COPY)>;
479
+ } // End GFX125xCommonWriteRes
480
+
481
+ let SchedModel = GFX1250SpeedModel in {
482
+ defm : GFX125xCommonWriteRes;
483
+
484
+ def : HWWriteRes<Write64Bit, [HWVALU, HWRC], 7>;
485
+ def : HWWriteRes<WriteIntMul, [HWVALU, HWRC], 11>;
486
+ def : HWWriteRes<WriteDouble, [HWVALU, HWRC], 32>;
487
+ def : HWWriteRes<WriteDoubleAdd, [HWVALU, HWRC], 32>;
488
+ def : HWWriteRes<WriteDoubleCvt, [HWVALU, HWRC], 32>;
489
+ def : HWWriteRes<WriteTrans64, [HWVALU, HWTransVALU, HWRC], 38>;
490
+ } // SchedModel = GFX1250SpeedModel
0 commit comments