@@ -3704,205 +3704,6 @@ Intrinsic::ID llvm::getIntrinsicForCallSite(const CallBase &CB,
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return Intrinsic::not_intrinsic;
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}
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- /// Deprecated, use computeKnownFPClass instead.
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- ///
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- /// If \p SignBitOnly is true, test for a known 0 sign bit rather than a
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- /// standard ordered compare. e.g. make -0.0 olt 0.0 be true because of the sign
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- /// bit despite comparing equal.
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- static bool cannotBeOrderedLessThanZeroImpl(const Value *V,
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- const DataLayout &DL,
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- const TargetLibraryInfo *TLI,
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- bool SignBitOnly, unsigned Depth) {
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- // TODO: This function does not do the right thing when SignBitOnly is true
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- // and we're lowering to a hypothetical IEEE 754-compliant-but-evil platform
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- // which flips the sign bits of NaNs. See
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- // https://llvm.org/bugs/show_bug.cgi?id=31702.
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-
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- if (const ConstantFP *CFP = dyn_cast<ConstantFP>(V)) {
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- return !CFP->getValueAPF().isNegative() ||
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- (!SignBitOnly && CFP->getValueAPF().isZero());
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- }
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-
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- // Handle vector of constants.
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- if (auto *CV = dyn_cast<Constant>(V)) {
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- if (auto *CVFVTy = dyn_cast<FixedVectorType>(CV->getType())) {
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- unsigned NumElts = CVFVTy->getNumElements();
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- for (unsigned i = 0; i != NumElts; ++i) {
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- auto *CFP = dyn_cast_or_null<ConstantFP>(CV->getAggregateElement(i));
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- if (!CFP)
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- return false;
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- if (CFP->getValueAPF().isNegative() &&
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- (SignBitOnly || !CFP->getValueAPF().isZero()))
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- return false;
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- }
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-
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- // All non-negative ConstantFPs.
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- return true;
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- }
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- }
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-
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- if (Depth == MaxAnalysisRecursionDepth)
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- return false;
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-
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- const Operator *I = dyn_cast<Operator>(V);
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- if (!I)
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- return false;
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-
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- switch (I->getOpcode()) {
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- default:
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- break;
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- // Unsigned integers are always nonnegative.
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- case Instruction::UIToFP:
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- return true;
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- case Instruction::FDiv:
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- // X / X is always exactly 1.0 or a NaN.
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- if (I->getOperand(0) == I->getOperand(1) &&
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- (!SignBitOnly || cast<FPMathOperator>(I)->hasNoNaNs()))
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- return true;
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-
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- // Set SignBitOnly for RHS, because X / -0.0 is -Inf (or NaN).
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1) &&
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- cannotBeOrderedLessThanZeroImpl(I->getOperand(1), DL, TLI,
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- /*SignBitOnly*/ true, Depth + 1);
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- case Instruction::FMul:
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- // X * X is always non-negative or a NaN.
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- if (I->getOperand(0) == I->getOperand(1) &&
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- (!SignBitOnly || cast<FPMathOperator>(I)->hasNoNaNs()))
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- return true;
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-
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- [[fallthrough]];
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- case Instruction::FAdd:
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- case Instruction::FRem:
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1) &&
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- cannotBeOrderedLessThanZeroImpl(I->getOperand(1), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Instruction::Select:
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(1), DL, TLI,
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- SignBitOnly, Depth + 1) &&
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- cannotBeOrderedLessThanZeroImpl(I->getOperand(2), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Instruction::FPExt:
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- case Instruction::FPTrunc:
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- // Widening/narrowing never change sign.
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Instruction::ExtractElement:
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- // Look through extract element. At the moment we keep this simple and skip
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- // tracking the specific element. But at least we might find information
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- // valid for all elements of the vector.
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Instruction::Call:
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- const auto *CI = cast<CallInst>(I);
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- Intrinsic::ID IID = getIntrinsicForCallSite(*CI, TLI);
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- switch (IID) {
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- default:
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- break;
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- case Intrinsic::canonicalize:
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- case Intrinsic::arithmetic_fence:
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- case Intrinsic::floor:
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- case Intrinsic::ceil:
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- case Intrinsic::trunc:
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- case Intrinsic::rint:
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- case Intrinsic::nearbyint:
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- case Intrinsic::round:
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- case Intrinsic::roundeven:
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- case Intrinsic::fptrunc_round:
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Intrinsic::maxnum: {
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- Value *V0 = I->getOperand(0), *V1 = I->getOperand(1);
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- auto isPositiveNum = [&](Value *V) {
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- if (SignBitOnly) {
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- // With SignBitOnly, this is tricky because the result of
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- // maxnum(+0.0, -0.0) is unspecified. Just check if the operand is
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- // a constant strictly greater than 0.0.
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- const APFloat *C;
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- return match(V, m_APFloat(C)) &&
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- *C > APFloat::getZero(C->getSemantics());
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- }
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-
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- // -0.0 compares equal to 0.0, so if this operand is at least -0.0,
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- // maxnum can't be ordered-less-than-zero.
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- return isKnownNeverNaN(V, DL, TLI) &&
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- cannotBeOrderedLessThanZeroImpl(V, DL, TLI, false, Depth + 1);
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- };
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-
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- // TODO: This could be improved. We could also check that neither operand
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- // has its sign bit set (and at least 1 is not-NAN?).
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- return isPositiveNum(V0) || isPositiveNum(V1);
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- }
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-
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- case Intrinsic::maximum:
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1) ||
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- cannotBeOrderedLessThanZeroImpl(I->getOperand(1), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Intrinsic::minnum:
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- case Intrinsic::minimum:
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1) &&
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- cannotBeOrderedLessThanZeroImpl(I->getOperand(1), DL, TLI,
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- SignBitOnly, Depth + 1);
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- case Intrinsic::exp:
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- case Intrinsic::exp2:
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- case Intrinsic::fabs:
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- return true;
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- case Intrinsic::copysign:
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- // Only the sign operand matters.
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(1), DL, TLI, true,
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- Depth + 1);
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- case Intrinsic::sqrt:
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- // sqrt(x) is always >= -0 or NaN. Moreover, sqrt(x) == -0 iff x == -0.
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- if (!SignBitOnly)
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- return true;
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- return CI->hasNoNaNs() &&
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- (CI->hasNoSignedZeros() ||
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- cannotBeNegativeZero(CI->getOperand(0), DL, TLI));
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-
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- case Intrinsic::powi:
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- if (ConstantInt *Exponent = dyn_cast<ConstantInt>(I->getOperand(1))) {
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- // powi(x,n) is non-negative if n is even.
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- if (Exponent->getBitWidth() <= 64 && Exponent->getSExtValue() % 2u == 0)
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- return true;
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- }
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- // TODO: This is not correct. Given that exp is an integer, here are the
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- // ways that pow can return a negative value:
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- //
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- // pow(x, exp) --> negative if exp is odd and x is negative.
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- // pow(-0, exp) --> -inf if exp is negative odd.
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- // pow(-0, exp) --> -0 if exp is positive odd.
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- // pow(-inf, exp) --> -0 if exp is negative odd.
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- // pow(-inf, exp) --> -inf if exp is positive odd.
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- //
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- // Therefore, if !SignBitOnly, we can return true if x >= +0 or x is NaN,
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- // but we must return false if x == -0. Unfortunately we do not currently
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- // have a way of expressing this constraint. See details in
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- // https://llvm.org/bugs/show_bug.cgi?id=31702.
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- return cannotBeOrderedLessThanZeroImpl(I->getOperand(0), DL, TLI,
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- SignBitOnly, Depth + 1);
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-
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- case Intrinsic::fma:
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- case Intrinsic::fmuladd:
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- // x*x+y is non-negative if y is non-negative.
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- return I->getOperand(0) == I->getOperand(1) &&
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- (!SignBitOnly || cast<FPMathOperator>(I)->hasNoNaNs()) &&
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- cannotBeOrderedLessThanZeroImpl(I->getOperand(2), DL, TLI,
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- SignBitOnly, Depth + 1);
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- }
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- break;
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- }
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- return false;
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- }
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-
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- bool llvm::SignBitMustBeZero(const Value *V, const DataLayout &DL,
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- const TargetLibraryInfo *TLI) {
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- // FIXME: Use computeKnownFPClass and pass all arguments
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- return cannotBeOrderedLessThanZeroImpl(V, DL, TLI, true, 0);
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- }
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-
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/// Return true if it's possible to assume IEEE treatment of input denormals in
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/// \p F for \p Val.
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static bool inputDenormalIsIEEE(const Function &F, const Type *Ty) {
@@ -4307,7 +4108,6 @@ static void computeKnownFPClassForFPTrunc(const Operator *Op,
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// Infinity needs a range check.
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}
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- // TODO: Merge implementation of cannotBeOrderedLessThanZero into here.
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void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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FPClassTest InterestedClasses, KnownFPClass &Known,
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unsigned Depth, const SimplifyQuery &Q) {
@@ -4332,6 +4132,8 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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const Constant *CV = dyn_cast<Constant>(V);
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if (VFVTy && CV) {
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Known.KnownFPClasses = fcNone;
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+ bool SignBitAllZero = true;
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+ bool SignBitAllOne = true;
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// For vectors, verify that each element is not NaN.
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unsigned NumElts = VFVTy->getNumElements();
@@ -4349,10 +4151,15 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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return;
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}
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- KnownFPClass KnownElt{CElt->getValueAPF().classify(), CElt->isNegative()};
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- Known |= KnownElt;
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+ const APFloat &C = CElt->getValueAPF();
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+ Known.KnownFPClasses |= C.classify();
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+ if (C.isNegative())
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+ SignBitAllZero = false;
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+ else
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+ SignBitAllOne = false;
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}
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-
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+ if (SignBitAllOne != SignBitAllZero)
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+ Known.SignBit = SignBitAllOne;
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return;
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}
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@@ -4488,7 +4295,6 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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computeKnownFPClass(II->getArgOperand(2), DemandedElts, InterestedClasses,
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KnownAddend, Depth + 1, Q);
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- // TODO: Known sign bit with no nans
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if (KnownAddend.cannotBeOrderedLessThanZero())
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Known.knownNot(fcNegative);
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break;
@@ -4522,7 +4328,7 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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(F && KnownSrc.isKnownNeverLogicalNegZero(*F, II->getType()))) {
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Known.knownNot(fcNegZero);
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if (KnownSrc.isKnownNeverNaN())
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- Known.SignBit = false ;
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+ Known.signBitMustBeZero() ;
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}
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break;
@@ -4592,7 +4398,6 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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// subtargets on AMDGPU the min/max instructions would not flush the
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// output and return the original value.
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//
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- // TODO: This could be refined based on the sign
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if ((Known.KnownFPClasses & fcZero) != fcNone &&
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!Known.isKnownNeverSubnormal()) {
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const Function *Parent = II->getFunction();
@@ -4605,6 +4410,26 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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Known.KnownFPClasses |= fcZero;
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}
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+ if (Known.isKnownNeverNaN()) {
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+ if (KnownLHS.SignBit && KnownRHS.SignBit &&
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+ *KnownLHS.SignBit == *KnownRHS.SignBit) {
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+ if (*KnownLHS.SignBit)
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+ Known.signBitMustBeOne();
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+ else
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+ Known.signBitMustBeZero();
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+ } else if ((IID == Intrinsic::maximum || IID == Intrinsic::minimum) ||
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+ ((KnownLHS.isKnownNeverNegZero() ||
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+ KnownRHS.isKnownNeverPosZero()) &&
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+ (KnownLHS.isKnownNeverPosZero() ||
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+ KnownRHS.isKnownNeverNegZero()))) {
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+ if ((IID == Intrinsic::maximum || IID == Intrinsic::maxnum) &&
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+ (KnownLHS.SignBit == false || KnownRHS.SignBit == false))
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+ Known.signBitMustBeZero();
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+ else if ((IID == Intrinsic::minimum || IID == Intrinsic::minnum) &&
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+ (KnownLHS.SignBit == true || KnownRHS.SignBit == true))
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+ Known.signBitMustBeOne();
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+ }
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+ }
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break;
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}
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case Intrinsic::canonicalize: {
@@ -4704,7 +4529,7 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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KnownSrc, Depth + 1, Q);
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if (KnownSrc.isKnownNeverNaN()) {
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Known.knownNot(fcNan);
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- Known.SignBit = false ;
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+ Known.signBitMustBeZero() ;
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}
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break;
@@ -4954,6 +4779,13 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
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if (!KnownLHS.isKnownNeverNaN())
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break;
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+ if (KnownLHS.SignBit && KnownRHS.SignBit) {
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+ if (*KnownLHS.SignBit == *KnownRHS.SignBit)
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+ Known.signBitMustBeZero();
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+ else
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+ Known.signBitMustBeOne();
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+ }
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+
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// If 0 * +/-inf produces NaN.
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if (KnownLHS.isKnownNeverInfinity() && KnownRHS.isKnownNeverInfinity()) {
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Known.knownNot(fcNan);
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