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Emit error on instruction selection of when the GLSL extended instruction set is not being used
1 parent 79991d5 commit 782e1a2

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2 files changed

+31
-3
lines changed

2 files changed

+31
-3
lines changed

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
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#include "llvm/IR/IntrinsicsSPIRV.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#define DEBUG_TYPE "spirv-isel"
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@@ -3031,9 +3032,14 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
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case Intrinsic::spv_normalize:
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return selectExtInst(ResVReg, ResType, I, CL::normalize, GL::Normalize);
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case Intrinsic::spv_reflect:
3034-
if (STI.isVulkanEnv()) // There is no CL equivalent of Reflect
3035-
return selectExtInst(ResVReg, ResType, I, GL::Reflect);
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break;
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if (!STI.canUseExtInstSet(SPIRV::InstructionSet::InstructionSet::GLSL_std_450)) {
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std::string DiagMsg;
3037+
raw_string_ostream OS(DiagMsg);
3038+
I.print(OS);
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DiagMsg = "Intrinsic selection not supported for this instruction set: " + DiagMsg;
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report_fatal_error(DiagMsg.c_str(), false);
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}
3042+
return selectExtInst(ResVReg, ResType, I, GL::Reflect);
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case Intrinsic::spv_rsqrt:
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return selectExtInst(ResVReg, ResType, I, CL::rsqrt, GL::InverseSqrt);
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case Intrinsic::spv_sign:
Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
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; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 | FileCheck %s
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; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
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; RUN: not %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o /dev/null 2>&1 -filetype=obj %}
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; CHECK: LLVM ERROR: Intrinsic selection not supported for this instruction set: %{{.*}} = G_INTRINSIC intrinsic(@llvm.spv.reflect), %{{.*}}, %{{.*}}
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8+
define noundef <4 x half> @reflect_half4(<4 x half> noundef %a, <4 x half> noundef %b) {
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entry:
10+
%spv.reflect = call <4 x half> @llvm.spv.reflect.f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %spv.reflect
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}
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define noundef <4 x float> @reflect_float4(<4 x float> noundef %a, <4 x float> noundef %b) {
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entry:
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%spv.reflect = call <4 x float> @llvm.spv.reflect.f32(<4 x float> %a, <4 x float> %b)
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ret <4 x float> %spv.reflect
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}
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declare <4 x half> @llvm.spv.reflect.f16(<4 x half>, <4 x half>)
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declare <4 x float> @llvm.spv.reflect.f32(<4 x float>, <4 x float>)
22+

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