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Fix typo of colon to semicolon in lit tests
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16 files changed

+32
-32
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16 files changed

+32
-32
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‎lldb/test/Shell/ScriptInterpreter/Python/command_relative_import.test

+2-2
Original file line numberDiff line numberDiff line change
@@ -8,9 +8,9 @@
88
# RUN: -o 'command source %t/foo/magritte.in' \
99
# RUN: -o 'command source %t/foo/zip.in' \
1010
# RUN: -o 'command source %t/foo/magritte.in' \
11-
# RUN; -o 'zip' \
11+
# RUN: -o 'zip' \
1212
# RUN: -o 'hello'
13-
# RUN -o 'magritte' 2>&1 | FileCheck %s
13+
# RUN: -o 'magritte' 2>&1 | FileCheck %s
1414

1515
# The first time importing 'magritte' fails because we didn't pass -c.
1616
# CHECK: ModuleNotFoundError: No module named 'magritte'

‎llvm/test/Bitcode/attributes.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -404,7 +404,7 @@ define void @f68() mustprogress
404404
ret void
405405
}
406406

407-
; CHECK; define void @f69() #42
407+
; CHECK: define void @f69() #42
408408
define void @f69() nocallback
409409
{
410410
ret void

‎llvm/test/CodeGen/AArch64/cmp-to-cmn.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ define i1 @test_EQ_IssEbT(i16 %a, i16 %b) {
125125
; CHECK: sxth w8, w1
126126
; CHECK-NEXT: cmn w8, w0, sxth
127127
; CHECK-NEXT: cset w0, eq
128-
; CHECK-NEXT; ret
128+
; CHECK-NEXT: ret
129129
entry:
130130
%conv = sext i16 %a to i32
131131
%conv1 = sext i16 %b to i32
@@ -139,7 +139,7 @@ define i1 @test_EQ_IscEbT(i16 %a, i8 %b) {
139139
; CHECK: and w8, w1, #0xff
140140
; CHECK-NEXT: cmn w8, w0, sxth
141141
; CHECK-NEXT: cset w0, eq
142-
; CHECK-NEXT; ret
142+
; CHECK-NEXT: ret
143143
entry:
144144
%conv = sext i16 %a to i32
145145
%conv1 = zext i8 %b to i32

‎llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@
9797

9898
; GCN: ; %Flow5
9999
; GCN-NEXT: s_or_b64 exec, exec,
100-
; GCN-NEXT; s_and_saveexec_b64 {{s\[[0-9]+:[0-9]+\]}}, [[EXIT0]]
100+
; GCN-NEXT: s_and_saveexec_b64 {{s\[[0-9]+:[0-9]+\]}}, [[EXIT0]]
101101

102102
; GCN: ; %exit0
103103
; GCN: buffer_store_dword

‎llvm/test/CodeGen/ARM/no-fpscr-liveness.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ target triple = "thumbv7s-apple-ios"
1414
; VMRS instruction comes before any other instruction writing FPSCR:
1515
; CHECK-NOT: vcmp
1616
; CHECK: vmrs {{r[0-9]}}, fpscr
17-
; CHECK; vcmp
17+
; CHECK: vcmp
1818
; ...
1919
; CHECK: add sp, #8
2020
; CHECK: bx lr

‎llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
4242
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
4343

4444
; 32BIT-LABEL: name: int_va_arg
45-
; 32BIT-LABEL; liveins:
45+
; 32BIT-LABEL: liveins:
4646
; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
4747
; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
4848
; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }

‎llvm/test/CodeGen/PowerPC/vec_sldwi.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,7 @@ entry:
105105
%0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
106106
ret <4 x i32> %0
107107
; CHECK-LE-LABEL: @check_le_swap_vec_sldwi_va_vb_0
108-
; CHECK-LE; vmr 2, 3
108+
; CHECK-LE: vmr 2, 3
109109
; CHECK-LE: blr
110110
}
111111

@@ -211,7 +211,7 @@ entry:
211211
%0 = shufflevector <4 x i32> %VA, <4 x i32> %VB, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
212212
ret <4 x i32> %0
213213
; CHECK-BE-LABEL: @check_be_swap_vec_sldwi_va_vb_0
214-
; CHECK-LE; vmr 2, 3
214+
; CHECK-LE: vmr 2, 3
215215
; CHECK-BE: blr
216216
}
217217

‎llvm/test/CodeGen/X86/elf-associated-discarded.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
; CHECK: .section .data.b,"awo",@progbits,foo
1111

1212
;; No 'L' (SHF_LINK_ORDER). sh_link=0.
13-
; SEC; Name {{.*}} Flg Lk Inf
13+
; SEC: Name {{.*}} Flg Lk Inf
1414
; SEC: .data.a {{.*}} WAL 0 0
1515
; SEC: .data.b {{.*}} WAL 0 0
1616

‎llvm/test/ExecutionEngine/OrcLazy/printargv.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
; CHECK: argc = 4
44
; CHECK-NEXT: argv = ["{{.*}}printargv.ll", "a", "b", "c"]
5-
; CHECK-NEXT; argv[4] = null
5+
; CHECK-NEXT: argv[4] = null
66

77
@.str = private unnamed_addr constant [11 x i8] c"argc = %i\0A\00", align 1
88
@.str.1 = private unnamed_addr constant [9 x i8] c"argv = [\00", align 1

‎llvm/test/Linker/scalable-vector-type-construction.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; RUN: llvm-link %p/Inputs/fixed-vector-type-construction.ll %s -S -o - | FileCheck %s
22
%t = type {i32, float}
33
; CHECK: define void @foo(<4 x
4-
; CHECK; define void @bar(<vscale x 4 x
4+
; CHECK: define void @bar(<vscale x 4 x
55
define void @bar(<vscale x 4 x %t*> %x) {
66
ret void
77
}

‎llvm/test/MC/AMDGPU/vop3-convert.s

+1-1
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ v_ffbh_i32_e32 v1, v2
4949
v_frexp_exp_i32_f64 v1, v[2:3]
5050

5151
// SICI: v_frexp_mant_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x7b,0x02,0x7e]
52-
// VI; v_frexp_mant_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x63,0x02,0x7e]
52+
// VI: v_frexp_mant_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x63,0x02,0x7e]
5353
v_frexp_mant_f64 v[1:2], v[2:3]
5454

5555
// SICI: v_fract_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x7d,0x02,0x7e]

‎llvm/test/MC/Mips/macro-aliases.s

+12-12
Original file line numberDiff line numberDiff line change
@@ -4,32 +4,32 @@
44
# rendering the operand.
55

66
subu $4, $4, 4 # CHECK: ADDiu
7-
# CHECK; Imm:-4
7+
# CHECK: Imm:-4
88
subu $gp, $gp, 4 # CHECK: ADDiu
9-
# CHECK; Imm:-4
9+
# CHECK: Imm:-4
1010
subu $sp, $sp, 4 # CHECK: ADDiu
11-
# CHECK; Imm:-4
11+
# CHECK: Imm:-4
1212
subu $4, $4, -4 # CHECK: ADDiu
13-
# CHECK; Imm:4
13+
# CHECK: Imm:4
1414
subu $gp, $gp, -4 # CHECK: ADDiu
15-
# CHECK; Imm:4
15+
# CHECK: Imm:4
1616
subu $sp, $sp, -4 # CHECK: ADDiu
17-
# CHECK; Imm:4
17+
# CHECK: Imm:4
1818
subu $sp, $sp, -(4 + 4) # CHECK: ADDiu
1919
# CHECK: Imm:8
2020

2121
subu $4, 8 # CHECK: ADDiu
22-
# CHECK; Imm:-8
22+
# CHECK: Imm:-8
2323
subu $gp, 8 # CHECK: ADDiu
24-
# CHECK; Imm:-8
24+
# CHECK: Imm:-8
2525
subu $sp, 8 # CHECK: ADDiu
26-
# CHECK; Imm:-8
26+
# CHECK: Imm:-8
2727
subu $4, -8 # CHECK: ADDiu
28-
# CHECK; Imm:8
28+
# CHECK: Imm:8
2929
subu $gp, -8 # CHECK: ADDiu
30-
# CHECK; Imm:8
30+
# CHECK: Imm:8
3131
subu $sp, -8 # CHECK: ADDiu
32-
# CHECK; Imm:8
32+
# CHECK: Imm:8
3333
subu $sp, -(4 + 4) # CHECK: ADDiu
3434
# CHECK: Imm:8
3535

‎llvm/test/MC/Mips/macro-drem.s

+1-1
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,7 @@
186186
# CHECK-TRAP: ddiv $zero, $5, $6 # encoding: [0x1e,0x00,0xa6,0x00]
187187
# CHECK-TRAP: addiu $1, $zero, -1 # encoding: [0xff,0xff,0x01,0x24]
188188
# CHECK-TRAP: bne $6, $1, .Ltmp3 # encoding: [A,A,0xc1,0x14]
189-
# CHECK-TRAP; # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
189+
# CHECK-TRAP: # fixup A - offset: 0, value: .Ltmp3-4, kind: fixup_Mips_PC16
190190
# CHECK-TRAP: addiu $1, $zero, 1 # encoding: [0x01,0x00,0x01,0x24]
191191
# CHECK-TRAP: dsll32 $1, $1, 31 # encoding: [0xfc,0x0f,0x01,0x00]
192192
# CHECK-TRAP: teq $5, $1, 6 # encoding: [0xb4,0x01,0xa1,0x00]

‎llvm/test/Transforms/InstCombine/bitcast-store.ll

+1-1
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ entry:
3535
; Check that we don't combine the bitcast into the store. This would create a
3636
; bitcast of the swifterror which is invalid.
3737

38-
; CHECK-LABEL; @swifterror_store
38+
; CHECK-LABEL: @swifterror_store
3939
; CHECK: bitcast i64
4040
; CHECK: store %swift.error
4141

‎llvm/test/tools/llvm-reduce/remove-function-arguments-of-funcs-used-in-blockaddress.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,8 @@ bb:
1111

1212
; CHECK-ALL: bb4
1313
bb4:
14-
; CHECK-INTERESTINGNESS; callbr void asm
15-
; CHECK-INTERESTINGNESS-SAME; blockaddress
14+
; CHECK-INTERESTINGNESS: callbr void asm
15+
; CHECK-INTERESTINGNESS-SAME: blockaddress
1616
; CHECK-FINAL: callbr void asm sideeffect "", "X"(i8* blockaddress(@func, %bb11))
1717
; CHECK-ALL: to label %bb5 [label %bb11]
1818
callbr void asm sideeffect "", "X"(i8* blockaddress(@func, %bb11))

‎polly/test/ScopInfo/scop-affine-parameter-ordering.ll

+2-2
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,8 @@ target triple = "aarch64--linux-android"
88
; CHECK-NEXT: [p_0] -> { Stmt_for_body8_us_us95_i[i0] : 0 <= i0 <= 4 };
99
; CHECK-NEXT: Schedule :=
1010
; CHECK-NEXT: [p_0] -> { Stmt_for_body8_us_us95_i[i0] -> [i0] };
11-
; CHECK-NEXT; MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
12-
; CHECK-NEXT; [p_0] -> { Stmt_for_body8_us_us95_i[i0] -> MemRef_0[1 + p_0] };
11+
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
12+
; CHECK-NEXT: [p_0] -> { Stmt_for_body8_us_us95_i[i0] -> MemRef_0[1 + p_0] };
1313
; CHECK-NEXT }
1414

1515
define void @test1() unnamed_addr align 2 {

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