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[MachineSched] Add a first valid reason [nfc]
For debugging, distinguish the first valid candidate encountered and a preference decision driven by node number.
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4 files changed

+17
-15
lines changed

4 files changed

+17
-15
lines changed

llvm/include/llvm/CodeGen/MachineScheduler.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1099,7 +1099,8 @@ class GenericSchedulerBase : public MachineSchedStrategy {
10991099
BotPathReduce,
11001100
TopDepthReduce,
11011101
TopPathReduce,
1102-
NodeOrder
1102+
NodeOrder,
1103+
FirstValid
11031104
};
11041105

11051106
#ifndef NDEBUG

llvm/lib/CodeGen/MachineScheduler.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3267,6 +3267,7 @@ const char *GenericSchedulerBase::getReasonStr(
32673267
case BotHeightReduce:return "BOT-HEIGHT";
32683268
case BotPathReduce: return "BOT-PATH ";
32693269
case NodeOrder: return "ORDER ";
3270+
case FirstValid: return "FIRST ";
32703271
};
32713272
// clang-format on
32723273
llvm_unreachable("Unknown reason!");
@@ -3688,7 +3689,7 @@ bool GenericScheduler::tryCandidate(SchedCandidate &Cand,
36883689
SchedBoundary *Zone) const {
36893690
// Initialize the candidate if needed.
36903691
if (!Cand.isValid()) {
3691-
TryCand.Reason = NodeOrder;
3692+
TryCand.Reason = FirstValid;
36923693
return true;
36933694
}
36943695

@@ -4103,7 +4104,7 @@ bool PostGenericScheduler::tryCandidate(SchedCandidate &Cand,
41034104
SchedCandidate &TryCand) {
41044105
// Initialize the candidate if needed.
41054106
if (!Cand.isValid()) {
4106-
TryCand.Reason = NodeOrder;
4107+
TryCand.Reason = FirstValid;
41074108
return true;
41084109
}
41094110

llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -387,8 +387,8 @@ body: |
387387
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @3c
388388
# CHECK-NEXT: Queue BotQ.P:
389389
# CHECK-NEXT: Queue BotQ.A: 12 11
390-
# CHECK-NEXT: Cand SU(12) ORDER
391-
# CHECK-NEXT: Pick Bot ORDER
390+
# CHECK-NEXT: Cand SU(12) FIRST
391+
# CHECK-NEXT: Pick Bot FIRST
392392
# CHECK-NEXT: Scheduling SU(12) $q1 = COPY %12:fpr128
393393
# CHECK-NEXT: Ready @3c
394394
# CHECK-NEXT: CortexA55UnitALU +1x1u
@@ -561,8 +561,8 @@ body: |
561561
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @7c
562562
# CHECK-NEXT: Queue BotQ.P:
563563
# CHECK-NEXT: Queue BotQ.A: 10 8
564-
# CHECK-NEXT: Cand SU(10) ORDER
565-
# CHECK-NEXT: Pick Bot ORDER
564+
# CHECK-NEXT: Cand SU(10) FIRST
565+
# CHECK-NEXT: Pick Bot FIRST
566566
# CHECK-NEXT: Scheduling SU(10) %12:fpr128 = UMULLv4i16_v4i32 %3.dsub:fpr128, %11:fpr64
567567
# CHECK-NEXT: Ready @7c
568568
# CHECK-NEXT: CortexA55UnitFPALU +2x1u
@@ -830,8 +830,8 @@ body: |
830830
# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @10c
831831
# CHECK-NEXT: Queue BotQ.P: 3
832832
# CHECK-NEXT: Queue BotQ.A: 7 5
833-
# CHECK-NEXT: Cand SU(7) ORDER
834-
# CHECK-NEXT: Pick Bot ORDER
833+
# CHECK-NEXT: Cand SU(7) FIRST
834+
# CHECK-NEXT: Pick Bot FIRST
835835
# CHECK-NEXT: Scheduling SU(7) %9:fpr64 = XTNv4i16 %8:fpr128
836836
# CHECK-NEXT: Ready @10c
837837
# CHECK-NEXT: CortexA55UnitFPALU +1x1u
@@ -1040,7 +1040,7 @@ body: |
10401040
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @12c
10411041
# CHECK-NEXT: Queue BotQ.P: 0
10421042
# CHECK-NEXT: Queue BotQ.A: 3 6
1043-
# CHECK-NEXT: Cand SU(3) ORDER
1043+
# CHECK-NEXT: Cand SU(3) FIRST
10441044
# CHECK-NEXT: Cand SU(6) ORDER
10451045
# CHECK-NEXT: Pick Bot ORDER
10461046
# CHECK-NEXT: Scheduling SU(6) %8:fpr128 = ANDv16i8 %1:fpr128, %6:fpr128
@@ -1155,7 +1155,7 @@ body: |
11551155
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @13c
11561156
# CHECK-NEXT: Queue BotQ.P: 1 4
11571157
# CHECK-NEXT: Queue BotQ.A: 3 0
1158-
# CHECK-NEXT: Cand SU(3) ORDER
1158+
# CHECK-NEXT: Cand SU(3) FIRST
11591159
# CHECK-NEXT: Pick Bot PHYS-REG
11601160
# CHECK-NEXT: Scheduling SU(3) %3:fpr128 = EXTv16i8 %0:fpr128, %0:fpr128, 8
11611161
# CHECK-NEXT: Ready @13c
@@ -1405,7 +1405,7 @@ body: |
14051405
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @16c
14061406
# CHECK-NEXT: Queue BotQ.P:
14071407
# CHECK-NEXT: Queue BotQ.A: 2 4
1408-
# CHECK-NEXT: Cand SU(2) ORDER
1408+
# CHECK-NEXT: Cand SU(2) FIRST
14091409
# CHECK-NEXT: Cand SU(4) PHYS-REG
14101410
# CHECK-NEXT: Pick Bot PHYS-REG
14111411
# CHECK-NEXT: Scheduling SU(4) %6:fpr128 = MOVIv2d_ns 17

llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -224,8 +224,8 @@ body: |
224224
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
225225
# CHECK-NEXT: Queue BotQ.P:
226226
# CHECK-NEXT: Queue BotQ.A: 2 1 0
227-
# CHECK-NEXT: Cand SU(2) ORDER
228-
# CHECK-NEXT: Pick Bot ORDER
227+
# CHECK-NEXT: Cand SU(2) FIRST
228+
# CHECK-NEXT: Pick Bot FIRST
229229
# CHECK-NEXT: Scheduling SU(2) $x5 = ADDXrr $x2, $x2
230230
# CHECK-NEXT: Ready @0c
231231
# CHECK-NEXT: CortexA55UnitALU +1x1u
@@ -318,7 +318,7 @@ body: |
318318
# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
319319
# CHECK-NEXT: Queue BotQ.P:
320320
# CHECK-NEXT: Queue BotQ.A: 0 1
321-
# CHECK-NEXT: Cand SU(0) ORDER
321+
# CHECK-NEXT: Cand SU(0) FIRST
322322
# CHECK-NEXT: Cand SU(1) ORDER
323323
# CHECK-NEXT: Pick Bot ORDER
324324
# CHECK-NEXT: Scheduling SU(1) $x4 = ADDXrr $x1, $x1

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