Skip to content

Commit 44e997a

Browse files
jayfoadjayfoad
authored
[TwoAddressInstruction] Use isPlainlyKilled in processTiedPairs (#65976)
Calling isPlainlyKilled instead of directly checking for a kill flag should make processTiedPairs behave the same with LiveIntervals (i.e. when compiling with -early-live-intervals) as it does with LiveVariables.
1 parent 22d0bd8 commit 44e997a

File tree

5 files changed

+39
-73
lines changed

5 files changed

+39
-73
lines changed

‎llvm/lib/CodeGen/TwoAddressInstructionPass.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1566,7 +1566,7 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
15661566
MachineOperand &MO = MI->getOperand(SrcIdx);
15671567
assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&
15681568
"inconsistent operand info for 2-reg pass");
1569-
if (MO.isKill()) {
1569+
if (isPlainlyKilled(MO)) {
15701570
MO.setIsKill(false);
15711571
RemovedKillFlag = true;
15721572
}
@@ -1587,7 +1587,7 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
15871587
for (MachineOperand &MO : MI->all_uses()) {
15881588
if (MO.getReg() == RegB) {
15891589
if (MO.getSubReg() == SubRegB && !IsEarlyClobber) {
1590-
if (MO.isKill()) {
1590+
if (isPlainlyKilled(MO)) {
15911591
MO.setIsKill(false);
15921592
RemovedKillFlag = true;
15931593
}

‎llvm/test/CodeGen/SystemZ/rot-02.ll

Lines changed: 8 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; Test removal of AND operations that don't affect last 6 bits of rotate amount
33
; operand.
44
;
5-
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefixes=CHECK,CHECK-LV
6-
; RUN: llc < %s -mtriple=s390x-linux-gnu -early-live-intervals | FileCheck %s -check-prefixes=CHECK,CHECK-LIS
5+
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
6+
; RUN: llc < %s -mtriple=s390x-linux-gnu -early-live-intervals | FileCheck %s
77

88
; Test that AND is not removed when some lower 5 bits are not set.
99
define i32 @f1(i32 %val, i32 %amt) {
@@ -76,20 +76,12 @@ define i64 @f4(i64 %val, i64 %amt) {
7676

7777
; Test that AND is not entirely removed if the result is reused.
7878
define i32 @f5(i32 %val, i32 %amt) {
79-
; CHECK-LV-LABEL: f5:
80-
; CHECK-LV: # %bb.0:
81-
; CHECK-LV-NEXT: rll %r2, %r2, 0(%r3)
82-
; CHECK-LV-NEXT: nilf %r3, 63
83-
; CHECK-LV-NEXT: ar %r2, %r3
84-
; CHECK-LV-NEXT: br %r14
85-
;
86-
; CHECK-LIS-LABEL: f5:
87-
; CHECK-LIS: # %bb.0:
88-
; CHECK-LIS-NEXT: rll %r0, %r2, 0(%r3)
89-
; CHECK-LIS-NEXT: nilf %r3, 63
90-
; CHECK-LIS-NEXT: ar %r3, %r0
91-
; CHECK-LIS-NEXT: lr %r2, %r3
92-
; CHECK-LIS-NEXT: br %r14
79+
; CHECK-LABEL: f5:
80+
; CHECK: # %bb.0:
81+
; CHECK-NEXT: rll %r2, %r2, 0(%r3)
82+
; CHECK-NEXT: nilf %r3, 63
83+
; CHECK-NEXT: ar %r2, %r3
84+
; CHECK-NEXT: br %r14
9385
%and = and i32 %amt, 63
9486

9587
%inv = sub i32 32, %and

‎llvm/test/CodeGen/X86/combine-or.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -253,7 +253,8 @@ define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
253253
; CHECK-LIS-NEXT: pblendw {{.*#+}} xmm3 = xmm0[0,1],xmm3[2,3,4,5,6,7]
254254
; CHECK-LIS-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,0,1,1]
255255
; CHECK-LIS-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
256-
; CHECK-LIS-NEXT: por %xmm2, %xmm0
256+
; CHECK-LIS-NEXT: por %xmm0, %xmm2
257+
; CHECK-LIS-NEXT: movdqa %xmm2, %xmm0
257258
; CHECK-LIS-NEXT: retq
258259
%shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 4>
259260
%shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>

‎llvm/test/CodeGen/X86/combine-rotates.ll

Lines changed: 26 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,SSE2-LV
3-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -early-live-intervals | FileCheck %s --check-prefixes=CHECK,SSE2,SSE2-LIS
2+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
3+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -early-live-intervals | FileCheck %s --check-prefixes=CHECK,SSE2
44
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,XOP
55
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
66
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
@@ -115,56 +115,30 @@ define i32 @combine_rot_select_zero(i32, i32) {
115115
}
116116

117117
define <4 x i32> @combine_vec_rot_select_zero(<4 x i32>, <4 x i32>) {
118-
; SSE2-LV-LABEL: combine_vec_rot_select_zero:
119-
; SSE2-LV: # %bb.0:
120-
; SSE2-LV-NEXT: pxor %xmm2, %xmm2
121-
; SSE2-LV-NEXT: pcmpeqd %xmm1, %xmm2
122-
; SSE2-LV-NEXT: pslld $23, %xmm1
123-
; SSE2-LV-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
124-
; SSE2-LV-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
125-
; SSE2-LV-NEXT: cvttps2dq %xmm1, %xmm1
126-
; SSE2-LV-NEXT: movdqa %xmm0, %xmm3
127-
; SSE2-LV-NEXT: pmuludq %xmm1, %xmm3
128-
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
129-
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
130-
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
131-
; SSE2-LV-NEXT: pmuludq %xmm5, %xmm1
132-
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
133-
; SSE2-LV-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
134-
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
135-
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
136-
; SSE2-LV-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
137-
; SSE2-LV-NEXT: por %xmm4, %xmm3
138-
; SSE2-LV-NEXT: pand %xmm2, %xmm0
139-
; SSE2-LV-NEXT: pandn %xmm3, %xmm2
140-
; SSE2-LV-NEXT: por %xmm2, %xmm0
141-
; SSE2-LV-NEXT: retq
142-
;
143-
; SSE2-LIS-LABEL: combine_vec_rot_select_zero:
144-
; SSE2-LIS: # %bb.0:
145-
; SSE2-LIS-NEXT: movdqa %xmm0, %xmm2
146-
; SSE2-LIS-NEXT: pxor %xmm0, %xmm0
147-
; SSE2-LIS-NEXT: pcmpeqd %xmm1, %xmm0
148-
; SSE2-LIS-NEXT: pslld $23, %xmm1
149-
; SSE2-LIS-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
150-
; SSE2-LIS-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
151-
; SSE2-LIS-NEXT: cvttps2dq %xmm1, %xmm1
152-
; SSE2-LIS-NEXT: movdqa %xmm2, %xmm3
153-
; SSE2-LIS-NEXT: pmuludq %xmm1, %xmm3
154-
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
155-
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
156-
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
157-
; SSE2-LIS-NEXT: pmuludq %xmm5, %xmm1
158-
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
159-
; SSE2-LIS-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
160-
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
161-
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
162-
; SSE2-LIS-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
163-
; SSE2-LIS-NEXT: por %xmm4, %xmm3
164-
; SSE2-LIS-NEXT: pand %xmm0, %xmm2
165-
; SSE2-LIS-NEXT: pandn %xmm3, %xmm0
166-
; SSE2-LIS-NEXT: por %xmm2, %xmm0
167-
; SSE2-LIS-NEXT: retq
118+
; SSE2-LABEL: combine_vec_rot_select_zero:
119+
; SSE2: # %bb.0:
120+
; SSE2-NEXT: pxor %xmm2, %xmm2
121+
; SSE2-NEXT: pcmpeqd %xmm1, %xmm2
122+
; SSE2-NEXT: pslld $23, %xmm1
123+
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
124+
; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
125+
; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
126+
; SSE2-NEXT: movdqa %xmm0, %xmm3
127+
; SSE2-NEXT: pmuludq %xmm1, %xmm3
128+
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
129+
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
130+
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
131+
; SSE2-NEXT: pmuludq %xmm5, %xmm1
132+
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
133+
; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
134+
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
135+
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
136+
; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
137+
; SSE2-NEXT: por %xmm4, %xmm3
138+
; SSE2-NEXT: pand %xmm2, %xmm0
139+
; SSE2-NEXT: pandn %xmm3, %xmm2
140+
; SSE2-NEXT: por %xmm2, %xmm0
141+
; SSE2-NEXT: retq
168142
;
169143
; XOP-LABEL: combine_vec_rot_select_zero:
170144
; XOP: # %bb.0:

‎llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -61,8 +61,7 @@ zero:
6161
; CHECK: bb.4
6262
; CHECK: bb.5
6363
; CHECK: %3:gr64 = COPY %10
64-
; CHECK-LV: %4:gr64 = COPY killed %10
65-
; CHECK-LIS: %4:gr64 = COPY %10
64+
; CHECK: %4:gr64 = COPY killed %10
6665
; CHECK: %4:gr64 = nuw ADD64ri32 %4, 8, implicit-def dead $eflags
6766
; CHECK: TEST64rr killed %1, %1, implicit-def $eflags
6867
; CHECK: JCC_1 %bb.1, 5, implicit killed $eflags

0 commit comments

Comments
 (0)