Revert "[lldb][AArch64] Linux corefile support for SME"

This reverts commit 43812c8.

Due to failures on x86_64: https://lab.llvm.org/buildbot/#/builders/68/builds/60416

Author: DavidSpickett

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h

@@ -54,18 +54,15 @@ class RegisterContextPOSIX_arm64 : public lldb_private::RegisterContext {
   size_t GetFPUSize() { return sizeof(RegisterInfoPOSIX_arm64::FPU); }
 
   bool IsSVE(unsigned reg) const;
+  bool IsSME(unsigned reg) const;
   bool IsPAuth(unsigned reg) const;
   bool IsTLS(unsigned reg) const;
-  bool IsSME(unsigned reg) const;
 
   bool IsSVEZ(unsigned reg) const { return m_register_info_up->IsSVEZReg(reg); }
   bool IsSVEP(unsigned reg) const { return m_register_info_up->IsSVEPReg(reg); }
   bool IsSVEVG(unsigned reg) const {
     return m_register_info_up->IsSVERegVG(reg);
   }
-  bool IsSMEZA(unsigned reg) const {
-    return m_register_info_up->IsSMERegZA(reg);
-  }
 
   uint32_t GetRegNumSVEZ0() const {
     return m_register_info_up->GetRegNumSVEZ0();

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp

@@ -23,13 +23,8 @@ RegisterContextCorePOSIX_arm64::Create(Thread &thread, const ArchSpec &arch,
                                        llvm::ArrayRef<CoreNote> notes) {
   Flags opt_regsets = RegisterInfoPOSIX_arm64::eRegsetMaskDefault;
 
-  DataExtractor ssve_data =
-      getRegset(notes, arch.GetTriple(), AARCH64_SSVE_Desc);
-  if (ssve_data.GetByteSize() >= sizeof(sve::user_sve_header))
-    opt_regsets.Set(RegisterInfoPOSIX_arm64::eRegsetMaskSSVE);
-
   DataExtractor sve_data = getRegset(notes, arch.GetTriple(), AARCH64_SVE_Desc);
-  if (sve_data.GetByteSize() >= sizeof(sve::user_sve_header))
+  if (sve_data.GetByteSize() > sizeof(sve::user_sve_header))
     opt_regsets.Set(RegisterInfoPOSIX_arm64::eRegsetMaskSVE);
 
   // Pointer Authentication register set data is based on struct
@@ -45,11 +40,6 @@ RegisterContextCorePOSIX_arm64::Create(Thread &thread, const ArchSpec &arch,
   if (tls_data.GetByteSize() >= sizeof(uint64_t))
     opt_regsets.Set(RegisterInfoPOSIX_arm64::eRegsetMaskTLS);
 
-  DataExtractor za_data = getRegset(notes, arch.GetTriple(), AARCH64_ZA_Desc);
-  // Nothing if ZA is not present, just the header if it is disabled.
-  if (za_data.GetByteSize() >= sizeof(sve::user_za_header))
-    opt_regsets.Set(RegisterInfoPOSIX_arm64::eRegsetMaskZA);
-
   auto register_info_up =
       std::make_unique<RegisterInfoPOSIX_arm64>(arch, opt_regsets);
   return std::unique_ptr<RegisterContextCorePOSIX_arm64>(
@@ -61,8 +51,6 @@ RegisterContextCorePOSIX_arm64::RegisterContextCorePOSIX_arm64(
     Thread &thread, std::unique_ptr<RegisterInfoPOSIX_arm64> register_info,
     const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
     : RegisterContextPOSIX_arm64(thread, std::move(register_info)) {
-  ::memset(&m_sme_pseudo_regs, 0, sizeof(m_sme_pseudo_regs));
-
   m_gpr_data.SetData(std::make_shared<DataBufferHeap>(gpregset.GetDataStart(),
                                                       gpregset.GetByteSize()));
   m_gpr_data.SetByteOrder(gpregset.GetByteOrder());
@@ -71,15 +59,7 @@ RegisterContextCorePOSIX_arm64::RegisterContextCorePOSIX_arm64(
       m_register_info_up->GetTargetArchitecture().GetTriple();
   m_fpr_data = getRegset(notes, target_triple, FPR_Desc);
 
-  if (m_register_info_up->IsSSVEEnabled()) {
-    m_sve_data = getRegset(notes, target_triple, AARCH64_SSVE_Desc);
-    lldb::offset_t flags_offset = 12;
-    uint16_t flags = m_sve_data.GetU32(&flags_offset);
-    if ((flags & sve::ptrace_regs_mask) == sve::ptrace_regs_sve)
-      m_sve_state = SVEState::Streaming;
-  }
-
-  if (m_sve_state != SVEState::Streaming && m_register_info_up->IsSVEEnabled())
+  if (m_register_info_up->IsSVEEnabled())
     m_sve_data = getRegset(notes, target_triple, AARCH64_SVE_Desc);
 
   if (m_register_info_up->IsPAuthEnabled())
@@ -88,9 +68,6 @@ RegisterContextCorePOSIX_arm64::RegisterContextCorePOSIX_arm64(
   if (m_register_info_up->IsTLSEnabled())
     m_tls_data = getRegset(notes, target_triple, AARCH64_TLS_Desc);
 
-  if (m_register_info_up->IsZAEnabled())
-    m_za_data = getRegset(notes, target_triple, AARCH64_ZA_Desc);
-
   ConfigureRegisterContext();
 }
 
@@ -118,18 +95,15 @@ void RegisterContextCorePOSIX_arm64::ConfigureRegisterContext() {
   if (m_sve_data.GetByteSize() > sizeof(sve::user_sve_header)) {
     uint64_t sve_header_field_offset = 8;
     m_sve_vector_length = m_sve_data.GetU16(&sve_header_field_offset);
-
-    if (m_sve_state != SVEState::Streaming) {
-      sve_header_field_offset = 12;
-      uint16_t sve_header_flags_field =
-          m_sve_data.GetU16(&sve_header_field_offset);
-      if ((sve_header_flags_field & sve::ptrace_regs_mask) ==
-          sve::ptrace_regs_fpsimd)
-        m_sve_state = SVEState::FPSIMD;
-      else if ((sve_header_flags_field & sve::ptrace_regs_mask) ==
-               sve::ptrace_regs_sve)
-        m_sve_state = SVEState::Full;
-    }
+    sve_header_field_offset = 12;
+    uint16_t sve_header_flags_field =
+        m_sve_data.GetU16(&sve_header_field_offset);
+    if ((sve_header_flags_field & sve::ptrace_regs_mask) ==
+        sve::ptrace_regs_fpsimd)
+      m_sve_state = SVEState::FPSIMD;
+    else if ((sve_header_flags_field & sve::ptrace_regs_mask) ==
+             sve::ptrace_regs_sve)
+      m_sve_state = SVEState::Full;
 
     if (!sve::vl_valid(m_sve_vector_length)) {
       m_sve_state = SVEState::Disabled;
@@ -141,23 +115,6 @@ void RegisterContextCorePOSIX_arm64::ConfigureRegisterContext() {
   if (m_sve_state != SVEState::Disabled)
     m_register_info_up->ConfigureVectorLengthSVE(
         sve::vq_from_vl(m_sve_vector_length));
-
-  if (m_sve_state == SVEState::Streaming)
-    m_sme_pseudo_regs.ctrl_reg |= 1;
-
-  if (m_za_data.GetByteSize() >= sizeof(sve::user_za_header)) {
-    lldb::offset_t vlen_offset = 8;
-    uint16_t svl = m_za_data.GetU16(&vlen_offset);
-    m_sme_pseudo_regs.svg_reg = svl / 8;
-    m_register_info_up->ConfigureVectorLengthZA(svl / 16);
-
-    // If there is register data then ZA is active. The size of the note may be
-    // misleading here so we use the size field of the embedded header.
-    lldb::offset_t size_offset = 0;
-    uint32_t size = m_za_data.GetU32(&size_offset);
-    if (size > sizeof(sve::user_za_header))
-      m_sme_pseudo_regs.ctrl_reg |= 1 << 1;
-  }
 }
 
 uint32_t RegisterContextCorePOSIX_arm64::CalculateSVEOffset(
@@ -167,8 +124,7 @@ uint32_t RegisterContextCorePOSIX_arm64::CalculateSVEOffset(
   if (m_sve_state == SVEState::FPSIMD) {
     const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
     sve_reg_offset = sve::ptrace_fpsimd_offset + (reg - GetRegNumSVEZ0()) * 16;
-  } else if (m_sve_state == SVEState::Full ||
-             m_sve_state == SVEState::Streaming) {
+  } else if (m_sve_state == SVEState::Full) {
     uint32_t sve_z0_offset = GetGPRSize() + 16;
     sve_reg_offset =
         sve::SigRegsOffset() + reg_info->byte_offset - sve_z0_offset;
@@ -207,19 +163,19 @@ bool RegisterContextCorePOSIX_arm64::ReadRegister(const RegisterInfo *reg_info,
       }
     } else {
       // FPSR and FPCR will be located right after Z registers in
-      // SVEState::FPSIMD while in SVEState::Full/SVEState::Streaming they will
-      // be located at the end of register data after an alignment correction
-      // based on currently selected vector length.
+      // SVEState::FPSIMD while in SVEState::Full they will be located at the
+      // end of register data after an alignment correction based on currently
+      // selected vector length.
       uint32_t sve_reg_num = LLDB_INVALID_REGNUM;
       if (reg == GetRegNumFPSR()) {
         sve_reg_num = reg;
-        if (m_sve_state == SVEState::Full || m_sve_state == SVEState::Streaming)
+        if (m_sve_state == SVEState::Full)
           offset = sve::PTraceFPSROffset(sve::vq_from_vl(m_sve_vector_length));
         else if (m_sve_state == SVEState::FPSIMD)
           offset = sve::ptrace_fpsimd_offset + (32 * 16);
       } else if (reg == GetRegNumFPCR()) {
         sve_reg_num = reg;
-        if (m_sve_state == SVEState::Full || m_sve_state == SVEState::Streaming)
+        if (m_sve_state == SVEState::Full)
           offset = sve::PTraceFPCROffset(sve::vq_from_vl(m_sve_vector_length));
         else if (m_sve_state == SVEState::FPSIMD)
           offset = sve::ptrace_fpsimd_offset + (32 * 16) + 4;
@@ -261,7 +217,6 @@ bool RegisterContextCorePOSIX_arm64::ReadRegister(const RegisterInfo *reg_info,
                               error);
     } break;
     case SVEState::Full:
-    case SVEState::Streaming:
       offset = CalculateSVEOffset(reg_info);
       assert(offset < m_sve_data.GetByteSize());
       value.SetFromMemoryData(*reg_info, GetSVEBuffer(offset),
@@ -282,54 +237,6 @@ bool RegisterContextCorePOSIX_arm64::ReadRegister(const RegisterInfo *reg_info,
     assert(offset < m_tls_data.GetByteSize());
     value.SetFromMemoryData(*reg_info, m_tls_data.GetDataStart() + offset,
                             reg_info->byte_size, lldb::eByteOrderLittle, error);
-  } else if (IsSME(reg)) {
-    // If you had SME in the process, active or otherwise, there will at least
-    // be a ZA header. No header, no SME at all.
-    if (m_za_data.GetByteSize() < sizeof(sve::user_za_header))
-      return false;
-
-    if (!IsSMEZA(reg)) {
-      offset = reg_info->byte_offset - m_register_info_up->GetSMEOffset();
-      assert(offset < sizeof(m_sme_pseudo_regs));
-      // Host endian since these values are derived instead of being read from a
-      // core file note.
-      value.SetFromMemoryData(
-          *reg_info, reinterpret_cast<uint8_t *>(&m_sme_pseudo_regs) + offset,
-          reg_info->byte_size, lldb_private::endian::InlHostByteOrder(), error);
-    } else {
-      // If the process did not have the SME extension.
-      if (m_za_data.GetByteSize() < sizeof(sve::user_za_header))
-        return false;
-
-      // Don't use the size of the note to tell whether ZA is enabled. There may
-      // be non-register padding data after the header. Use the embedded
-      // header's size field instead.
-      lldb::offset_t size_offset = 0;
-      uint32_t size = m_za_data.GetU32(&size_offset);
-      bool za_enabled = size > sizeof(sve::user_za_header);
-
-      size_t za_note_size = m_za_data.GetByteSize();
-      // For a disabled ZA we fake a value of all 0s.
-      if (!za_enabled) {
-        uint64_t svl = m_sme_pseudo_regs.svg_reg * 8;
-        za_note_size = sizeof(sve::user_za_header) + (svl * svl);
-      }
-
-      const uint8_t *src = nullptr;
-      std::vector<uint8_t> disabled_za_data;
-
-      if (za_enabled)
-        src = m_za_data.GetDataStart();
-      else {
-        disabled_za_data.resize(za_note_size);
-        std::fill(disabled_za_data.begin(), disabled_za_data.end(), 0);
-        src = disabled_za_data.data();
-      }
-
-      value.SetFromMemoryData(*reg_info, src + sizeof(sve::user_za_header),
-                              reg_info->byte_size, lldb::eByteOrderLittle,
-                              error);
-    }
   } else
     return false;
 

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h

@@ -58,20 +58,10 @@ class RegisterContextCorePOSIX_arm64 : public RegisterContextPOSIX_arm64 {
   lldb_private::DataExtractor m_sve_data;
   lldb_private::DataExtractor m_pac_data;
   lldb_private::DataExtractor m_tls_data;
-  lldb_private::DataExtractor m_za_data;
 
   SVEState m_sve_state;
   uint16_t m_sve_vector_length = 0;
 
-  // These are pseudo registers derived from the values in SSVE and ZA data.
-  struct __attribute__((packed)) sme_pseudo_regs {
-    uint64_t ctrl_reg;
-    uint64_t svg_reg;
-  };
-  static_assert(sizeof(sme_pseudo_regs) == 16);
-
-  struct sme_pseudo_regs m_sme_pseudo_regs;
-
   const uint8_t *GetSVEBuffer(uint64_t offset = 0);
 
   void ConfigureRegisterContext();

lldb/source/Plugins/Process/elf-core/RegisterUtilities.h

@@ -119,10 +119,6 @@ constexpr RegsetDesc AARCH64_SVE_Desc[] = {
     {llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_SVE},
 };
 
-constexpr RegsetDesc AARCH64_SSVE_Desc[] = {
-    {llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_SSVE},
-};
-
 constexpr RegsetDesc AARCH64_ZA_Desc[] = {
     {llvm::Triple::Linux, llvm::Triple::aarch64, llvm::ELF::NT_ARM_ZA},
 };