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[X86] pr57673.ll - generate MIR test checks
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‎llvm/test/CodeGen/X86/pr57673.ll

Lines changed: 100 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-LEAs -experimental-debug-variable-locations=false < %s \
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; RUN: | FileCheck %s --check-prefix=NORMAL
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-LEAs -experimental-debug-variable-locations < %s \
@@ -10,16 +11,110 @@
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; assert(MRI->use_empty(LastVReg) &&
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; "The LEA's def register must have no uses");
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; CHECK: LEA64r
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; CHECK-NOT: LEA64r
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; NORMAL: DBG_VALUE_LIST
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; INSTRREF: DBG_INSTR_REF
17-
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target triple = "x86_64-unknown-linux-gnu"
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%t10 = type { ptr, [32 x i8] }
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define void @foo() {
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; NORMAL-LABEL: name: foo
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; NORMAL: bb.0.bb_entry:
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; NORMAL-NEXT: successors: %bb.1(0x80000000)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
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; NORMAL-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY [[MOV32r0_]].sub_8bit
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; NORMAL-NEXT: [[LEA64r:%[0-9]+]]:gr64 = LEA64r %stack.1.i, 1, $noreg, 0, $noreg
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; NORMAL-NEXT: [[DEF:%[0-9]+]]:gr64 = IMPLICIT_DEF
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; NORMAL-NEXT: [[DEF1:%[0-9]+]]:gr64 = IMPLICIT_DEF
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: bb.1.bb_8:
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; NORMAL-NEXT: successors: %bb.5(0x40000000), %bb.2(0x40000000)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: TEST8rr [[COPY]], [[COPY]], implicit-def $eflags
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; NORMAL-NEXT: JCC_1 %bb.5, 5, implicit $eflags
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; NORMAL-NEXT: JMP_1 %bb.2
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: bb.2.bb_mid:
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; NORMAL-NEXT: successors: %bb.4(0x30000000), %bb.3(0x50000000)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: TEST64rr [[DEF1]], [[DEF1]], implicit-def $eflags
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; NORMAL-NEXT: JCC_1 %bb.4, 4, implicit $eflags
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; NORMAL-NEXT: JMP_1 %bb.3
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: bb.3.cond.false:
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; NORMAL-NEXT: successors: %bb.4(0x80000000)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: bb.4.cond.end:
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; NORMAL-NEXT: successors: %bb.5(0x80000000)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: [[MOVUPSrm:%[0-9]+]]:vr128 = MOVUPSrm [[LEA64r]], 1, $noreg, 40, $noreg :: (load (s128) from %ir.i4, align 8)
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; NORMAL-NEXT: MOVUPSmr $noreg, 1, $noreg, 0, $noreg, killed [[MOVUPSrm]] :: (store (s128) into `ptr null`, align 8)
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; NORMAL-NEXT: DBG_VALUE_LIST !3, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 40), [[LEA64r]], [[LEA64r]], debug-location !8
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; NORMAL-NEXT: [[MOVUPSrm1:%[0-9]+]]:vr128 = MOVUPSrm [[LEA64r]], 1, $noreg, 40, $noreg :: (load (s128) from %ir.i6, align 8)
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; NORMAL-NEXT: MOVUPSmr $noreg, 1, $noreg, 0, $noreg, killed [[MOVUPSrm1]] :: (store (s128) into `ptr null`, align 8)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: bb.5.bb_last:
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; NORMAL-NEXT: successors: %bb.1(0x80000000)
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; NORMAL-NEXT: {{ $}}
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; NORMAL-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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; NORMAL-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[MOV32r0_]], %subreg.sub_32bit
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; NORMAL-NEXT: $rdi = COPY [[SUBREG_TO_REG]]
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; NORMAL-NEXT: $rsi = COPY [[SUBREG_TO_REG]]
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; NORMAL-NEXT: $rdx = COPY [[SUBREG_TO_REG]]
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; NORMAL-NEXT: $ecx = COPY [[MOV32r0_]]
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; NORMAL-NEXT: $r8 = COPY [[LEA64r]]
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; NORMAL-NEXT: CALL64r [[DEF]], csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $rdx, implicit $ecx, implicit $r8, implicit-def $rsp, implicit-def $ssp
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; NORMAL-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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; NORMAL-NEXT: JMP_1 %bb.1
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;
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; INSTRREF-LABEL: name: foo
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; INSTRREF: bb.0.bb_entry:
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; INSTRREF-NEXT: successors: %bb.1(0x80000000)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
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; INSTRREF-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY [[MOV32r0_]].sub_8bit
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; INSTRREF-NEXT: [[LEA64r:%[0-9]+]]:gr64 = LEA64r %stack.1.i, 1, $noreg, 0, $noreg
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; INSTRREF-NEXT: [[DEF:%[0-9]+]]:gr64 = IMPLICIT_DEF
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; INSTRREF-NEXT: [[DEF1:%[0-9]+]]:gr64 = IMPLICIT_DEF
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: bb.1.bb_8:
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; INSTRREF-NEXT: successors: %bb.5(0x40000000), %bb.2(0x40000000)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: TEST8rr [[COPY]], [[COPY]], implicit-def $eflags
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; INSTRREF-NEXT: JCC_1 %bb.5, 5, implicit $eflags
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; INSTRREF-NEXT: JMP_1 %bb.2
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: bb.2.bb_mid:
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; INSTRREF-NEXT: successors: %bb.4(0x30000000), %bb.3(0x50000000)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: TEST64rr [[DEF1]], [[DEF1]], implicit-def $eflags
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; INSTRREF-NEXT: JCC_1 %bb.4, 4, implicit $eflags
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; INSTRREF-NEXT: JMP_1 %bb.3
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: bb.3.cond.false:
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; INSTRREF-NEXT: successors: %bb.4(0x80000000)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: bb.4.cond.end:
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; INSTRREF-NEXT: successors: %bb.5(0x80000000)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: [[MOVUPSrm:%[0-9]+]]:vr128 = MOVUPSrm [[LEA64r]], 1, $noreg, 40, $noreg :: (load (s128) from %ir.i4, align 8)
100+
; INSTRREF-NEXT: MOVUPSmr $noreg, 1, $noreg, 0, $noreg, killed [[MOVUPSrm]] :: (store (s128) into `ptr null`, align 8)
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; INSTRREF-NEXT: DBG_INSTR_REF !3, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), dbg-instr-ref(1, 0), debug-location !8
102+
; INSTRREF-NEXT: [[MOVUPSrm1:%[0-9]+]]:vr128 = MOVUPSrm [[LEA64r]], 1, $noreg, 40, $noreg :: (load (s128) from %ir.i6, align 8)
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; INSTRREF-NEXT: MOVUPSmr $noreg, 1, $noreg, 0, $noreg, killed [[MOVUPSrm1]] :: (store (s128) into `ptr null`, align 8)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: bb.5.bb_last:
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; INSTRREF-NEXT: successors: %bb.1(0x80000000)
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; INSTRREF-NEXT: {{ $}}
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; INSTRREF-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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; INSTRREF-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[MOV32r0_]], %subreg.sub_32bit
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; INSTRREF-NEXT: $rdi = COPY [[SUBREG_TO_REG]]
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; INSTRREF-NEXT: $rsi = COPY [[SUBREG_TO_REG]]
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; INSTRREF-NEXT: $rdx = COPY [[SUBREG_TO_REG]]
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; INSTRREF-NEXT: $ecx = COPY [[MOV32r0_]]
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; INSTRREF-NEXT: $r8 = COPY [[LEA64r]]
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; INSTRREF-NEXT: CALL64r [[DEF]], csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $rdx, implicit $ecx, implicit $r8, implicit-def $rsp, implicit-def $ssp
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; INSTRREF-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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; INSTRREF-NEXT: JMP_1 %bb.1
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bb_entry:
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%tmp11 = alloca [0 x [0 x i32]], i32 0, align 4
25120
%i = alloca %t10, align 8

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