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[VPlan] Don't mark VPBlendRecipe as phi-like.
VPBlendRecipes don't get lowered to phis and usually do not appear at the beginning of blocks, due to their masks appearing before them. This effectively relaxes an over-eager verifier message. Fixes #88297. Fixes #88804.
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‎llvm/lib/Transforms/Vectorize/VPlanValue.h

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Original file line numberDiff line numberDiff line change
@@ -361,8 +361,8 @@ class VPDef {
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VPWidenMemoryInstructionSC,
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VPWidenSC,
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VPWidenSelectSC,
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// START: Phi-like recipes. Need to be kept together.
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VPBlendSC,
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// START: Phi-like recipes. Need to be kept together.
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VPWidenPHISC,
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VPPredInstPHISC,
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// START: SubclassID for recipes that inherit VPHeaderPHIRecipe.
@@ -376,7 +376,7 @@ class VPDef {
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VPReductionPHISC,
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// END: SubclassID for recipes that inherit VPHeaderPHIRecipe
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// END: Phi-like recipes
379-
VPFirstPHISC = VPBlendSC,
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VPFirstPHISC = VPWidenPHISC,
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VPFirstHeaderPHISC = VPCanonicalIVPHISC,
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VPLastHeaderPHISC = VPReductionPHISC,
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VPLastPHISC = VPReductionPHISC,

‎llvm/test/Transforms/LoopVectorize/blend-in-header.ll

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,233 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -p loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
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; Test with blend recipe in header VPBB, from
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; https://github.com/llvm/llvm-project/issues/88297.
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define i64 @pr88297() {
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; CHECK-LABEL: define i64 @pr88297() {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000
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; CHECK-NEXT: br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
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; CHECK: loop.header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; CHECK-NEXT: br i1 false, label [[LOOP_LATCH]], label [[THEN:%.*]]
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; CHECK: then:
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[R:%.*]] = phi i64 [ 1, [[THEN]] ], [ 0, [[LOOP_HEADER]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp sgt i32 [[IV]], 1000
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; CHECK-NEXT: br i1 [[ICMP]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ], [ 1, [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i64 [[R_LCSSA]]
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 false, label %loop.latch, label %then
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then:
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br label %loop.latch
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loop.latch:
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%r = phi i64 [ 1, %then ], [ 0, %loop.header ]
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%iv.next = add i32 %iv, 1
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%icmp = icmp sgt i32 %iv, 1000
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br i1 %icmp, label %exit, label %loop.header
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exit:
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%r.lcssa = phi i64 [ %r, %loop.latch ]
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ret i64 %r.lcssa
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}
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define i64 @pr88297_incoming_ops_reordered() {
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; CHECK-LABEL: define i64 @pr88297_incoming_ops_reordered() {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000
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; CHECK-NEXT: br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
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; CHECK: loop.header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; CHECK-NEXT: br i1 false, label [[LOOP_LATCH]], label [[THEN:%.*]]
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; CHECK: then:
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[R:%.*]] = phi i64 [ 0, [[LOOP_HEADER]] ], [ 1, [[THEN]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp sgt i32 [[IV]], 1000
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; CHECK-NEXT: br i1 [[ICMP]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ], [ 1, [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i64 [[R_LCSSA]]
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 false, label %loop.latch, label %then
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then:
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br label %loop.latch
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loop.latch:
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%r = phi i64 [ 0, %loop.header ], [ 1, %then ]
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%iv.next = add i32 %iv, 1
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%icmp = icmp sgt i32 %iv, 1000
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br i1 %icmp, label %exit, label %loop.header
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exit:
106+
%r.lcssa = phi i64 [ %r, %loop.latch ]
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ret i64 %r.lcssa
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}
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110+
define i64 @invar_cond(i1 %c) {
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; CHECK-LABEL: define i64 @invar_cond(
112+
; CHECK-SAME: i1 [[C:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[BROADCAST_SPLAT]], <4 x i64> zeroinitializer, <4 x i64> <i64 1, i64 1, i64 1, i64 1>
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000
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; CHECK-NEXT: br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i64> [[PREDPHI]], i32 3
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; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
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; CHECK: loop.header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; CHECK-NEXT: br i1 [[C]], label [[LOOP_LATCH]], label [[THEN:%.*]]
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; CHECK: then:
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[R:%.*]] = phi i64 [ 1, [[THEN]] ], [ 0, [[LOOP_HEADER]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp sgt i32 [[IV]], 1000
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; CHECK-NEXT: br i1 [[ICMP]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP7:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ], [ [[TMP1]], [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i64 [[R_LCSSA]]
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 %c, label %loop.latch, label %then
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then:
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br label %loop.latch
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loop.latch:
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%r = phi i64 [ 1, %then ], [ 0, %loop.header ]
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%iv.next = add i32 %iv, 1
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%icmp = icmp sgt i32 %iv, 1000
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br i1 %icmp, label %exit, label %loop.header
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exit:
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%r.lcssa = phi i64 [ %r, %loop.latch ]
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ret i64 %r.lcssa
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}
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define i64 @invar_cond_incoming_ops_reordered(i1 %c) {
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; CHECK-LABEL: define i64 @invar_cond_incoming_ops_reordered(
168+
; CHECK-SAME: i1 [[C:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i1> [[BROADCAST_SPLAT]], <i1 true, i1 true, i1 true, i1 true>
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP1]], <4 x i64> <i64 1, i64 1, i64 1, i64 1>, <4 x i64> zeroinitializer
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000
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; CHECK-NEXT: br i1 [[TMP0]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i64> [[PREDPHI]], i32 3
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; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
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; CHECK: loop.header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; CHECK-NEXT: br i1 [[C]], label [[LOOP_LATCH]], label [[THEN:%.*]]
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; CHECK: then:
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; CHECK-NEXT: br label [[LOOP_LATCH]]
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; CHECK: loop.latch:
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; CHECK-NEXT: [[R:%.*]] = phi i64 [ 0, [[LOOP_HEADER]] ], [ 1, [[THEN]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[ICMP:%.*]] = icmp sgt i32 [[IV]], 1000
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; CHECK-NEXT: br i1 [[ICMP]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP9:![0-9]+]]
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; CHECK: exit:
199+
; CHECK-NEXT: [[R_LCSSA:%.*]] = phi i64 [ [[R]], [[LOOP_LATCH]] ], [ [[TMP2]], [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: ret i64 [[R_LCSSA]]
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;
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entry:
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br label %loop.header
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loop.header:
206+
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
207+
br i1 %c, label %loop.latch, label %then
208+
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then:
210+
br label %loop.latch
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loop.latch:
213+
%r = phi i64 [ 0, %loop.header ], [ 1, %then ]
214+
%iv.next = add i32 %iv, 1
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%icmp = icmp sgt i32 %iv, 1000
216+
br i1 %icmp, label %exit, label %loop.header
217+
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exit:
219+
%r.lcssa = phi i64 [ %r, %loop.latch ]
220+
ret i64 %r.lcssa
221+
}
222+
;.
223+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
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; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
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; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}
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; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
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; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]}
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; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
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; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META2]], [[META1]]}
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;.

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