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1 parent 463a096 commit 316f68fCopy full SHA for 316f68f
llvm/test/CodeGen/RISCV/bswap-shift.ll
@@ -8,10 +8,6 @@
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; RUN: llc -mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefixes=RV64ZB
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-; TODO: These tests can be optmised, with x%8 == 0
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-; fold (bswap(srl (bswap c), x)) -> (shl c, x)
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-; fold (bswap(shl (bswap c), x)) -> (srl c, x)
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-
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declare i16 @llvm.bswap.i16(i16)
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declare i32 @llvm.bswap.i32(i32)
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declare i64 @llvm.bswap.i64(i64)
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