File tree 1 file changed +3
-23
lines changed 1 file changed +3
-23
lines changed Original file line number Diff line number Diff line change @@ -2169,27 +2169,6 @@ bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {
2169
2169
return Ret;
2170
2170
}
2171
2171
2172
- static int sizeToSubRegIndex (unsigned Size ) {
2173
- switch (Size ) {
2174
- case 32 :
2175
- return AMDGPU::sub0;
2176
- case 64 :
2177
- return AMDGPU::sub0_sub1;
2178
- case 96 :
2179
- return AMDGPU::sub0_sub1_sub2;
2180
- case 128 :
2181
- return AMDGPU::sub0_sub1_sub2_sub3;
2182
- case 256 :
2183
- return AMDGPU::sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7;
2184
- default :
2185
- if (Size < 32 )
2186
- return AMDGPU::sub0;
2187
- if (Size > 256 )
2188
- return -1 ;
2189
- return sizeToSubRegIndex (llvm::bit_ceil (Size ));
2190
- }
2191
- }
2192
-
2193
2172
bool AMDGPUInstructionSelector::selectG_TRUNC (MachineInstr &I) const {
2194
2173
Register DstReg = I.getOperand (0 ).getReg ();
2195
2174
Register SrcReg = I.getOperand (1 ).getReg ();
@@ -2293,8 +2272,9 @@ bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {
2293
2272
return false ;
2294
2273
2295
2274
if (SrcSize > 32 ) {
2296
- int SubRegIdx = sizeToSubRegIndex (DstSize);
2297
- if (SubRegIdx == -1 )
2275
+ unsigned SubRegIdx =
2276
+ DstSize < 32 ? AMDGPU::sub0 : TRI.getSubRegFromChannel (0 , DstSize / 32 );
2277
+ if (SubRegIdx == AMDGPU::NoSubRegister)
2298
2278
return false ;
2299
2279
2300
2280
// Deal with weird cases where the class only partially supports the subreg
You can’t perform that action at this time.
0 commit comments