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[SLP]Fix a crash when trying to convert masked gather nodes to strided.
Need to check if the loads node is masked gather. Only vectorized loads can be converted to strided.
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llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

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@@ -7966,6 +7966,10 @@ void BoUpSLP::transformNodes() {
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TreeEntry &E = *TE.get();
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switch (E.getOpcode()) {
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case Instruction::Load: {
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// No need to reorder masked gather loads, just reorder the scalar
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// operands.
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if (E.State != TreeEntry::Vectorize)
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break;
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Type *ScalarTy = E.getMainOp()->getType();
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auto *VecTy = FixedVectorType::get(ScalarTy, E.Scalars.size());
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Align CommonAlignment = computeCommonAlignment<LoadInst>(E.Scalars);
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr=+v -slp-threshold=-11 < %s | FileCheck %s
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define <4 x i32> @test(<2 x i64> %v, ptr %p) {
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; CHECK-LABEL: define <4 x i32> @test(
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; CHECK-SAME: <2 x i64> [[V:%.*]], ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x ptr> poison, ptr [[P]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x ptr> [[TMP0]], <2 x ptr> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i16, <2 x ptr> [[TMP1]], <2 x i64> [[V]]
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; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i16> @llvm.masked.gather.v2i16.v2p0(<2 x ptr> [[TMP2]], i32 2, <2 x i1> <i1 true, i1 true>, <2 x i16> poison)
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x i16> [[TMP3]], <2 x i16> poison, <2 x i32> <i32 1, i32 0>
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; CHECK-NEXT: [[TMP7:%.*]] = zext <2 x i16> [[TMP4]] to <2 x i32>
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; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP7]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
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; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <4 x i32> zeroinitializer, <4 x i32> [[TMP6]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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; CHECK-NEXT: ret <4 x i32> [[TMP5]]
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;
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entry:
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%0 = extractelement <2 x i64> %v, i32 1
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%arrayidx127.2 = getelementptr i16, ptr %p, i64 %0
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%1 = load i16, ptr %arrayidx127.2, align 2
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%conv128.2 = zext i16 %1 to i32
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%2 = extractelement <2 x i64> %v, i32 0
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%arrayidx127.3 = getelementptr i16, ptr %p, i64 %2
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%3 = load i16, ptr %arrayidx127.3, align 2
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%conv128.3 = zext i16 %3 to i32
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%4 = insertelement <4 x i32> zeroinitializer, i32 %conv128.2, i32 0
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%5 = insertelement <4 x i32> %4, i32 %conv128.3, i32 1
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ret <4 x i32> %5
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}

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