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1 parent bd61b2c commit 2b08169Copy full SHA for 2b08169
mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/matmul.mlir
@@ -33,7 +33,8 @@ func.func @entry() {
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// Hence, when checking the outupt there will always be at least 4 elements
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// in every row. For implementations with wider vectors, you should see more
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// elements being printed.
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- // CHECK: [9.8596, 9.8596, 9.8596, 9.8596
+ // CHECK-NEXT: Unranked Memref {{.*}} rank = 2 offset = 0 sizes = [2, 16] strides = [16, 1] data =
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+ // CHECK-NEXT: [9.8596, 9.8596, 9.8596, 9.8596
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// CHECK-NEXT: [9.8596, 9.8596, 9.8596, 9.8596
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%xf = tensor.cast %C_out : tensor<?x?xf32> to tensor<*xf32>
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