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| 1 | +// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s |
| 2 | +// expected-no-diagnostics |
| 3 | + |
| 4 | +#ifndef HEADER |
| 5 | +#define HEADER |
| 6 | + |
| 7 | +void func1() { |
| 8 | +#pragma omp metadirective when(user = {condition(0)} \ |
| 9 | + : parallel for) otherwise() |
| 10 | + for (int i = 0; i < 100; i++) |
| 11 | + ; |
| 12 | + |
| 13 | +#pragma omp metadirective when(user = {condition(0)} \ |
| 14 | + : parallel for) |
| 15 | + for (int i = 0; i < 100; i++) |
| 16 | + ; |
| 17 | + |
| 18 | +#pragma omp metadirective when(user = {condition(0)} \ |
| 19 | + : parallel for) \ |
| 20 | + when(implementation = {extension(match_none)} \ |
| 21 | + : parallel) default(parallel for) |
| 22 | + |
| 23 | + for (int i = 0; i < 100; i++) |
| 24 | + ; |
| 25 | + |
| 26 | + |
| 27 | +} |
| 28 | + |
| 29 | +// CHECK-LABEL: define dso_local void @_Z5func1v() |
| 30 | +// CHECK: entry |
| 31 | +// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 |
| 32 | +// CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 |
| 33 | +// CHECK-NEXT: store i32 0, ptr [[I]], align 4 |
| 34 | +// CHECK-NEXT: br label %[[FOR_COND:.*]] |
| 35 | +// CHECK: [[FOR_COND]]: |
| 36 | +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4 |
| 37 | +// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 |
| 38 | +// CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]] |
| 39 | +// CHECK: [[FOR_BODY]]: |
| 40 | +// CHECK-NEXT: br label %[[FOR_INC:.*]] |
| 41 | +// CHECK: [[FOR_INC]]: |
| 42 | +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4 |
| 43 | +// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 |
| 44 | +// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4 |
| 45 | +// CHECK-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] |
| 46 | +// CHECK: [[FOR_END]]: |
| 47 | +// CHECK-NEXT: store i32 0, ptr [[I1]], align 4 |
| 48 | +// CHECK-NEXT: br label %[[FOR_COND2:.*]] |
| 49 | +// CHECK: [[FOR_COND2]]: |
| 50 | +// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I1]], align 4 |
| 51 | +// CHECK-NEXT: [[CMP3:%.*]] = icmp slt i32 [[TMP2]], 100 |
| 52 | +// CHECK-NEXT: br i1 [[CMP3]], label %[[FOR_BODY4:.*]], label %[[FOR_END7:.*]] |
| 53 | +// CHECK: [[FOR_BODY4]]: |
| 54 | +// CHECK-NEXT: br label %[[FOR_INC5:.*]] |
| 55 | +// CHECK: [[FOR_INC5]]: |
| 56 | +// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[I1]], align 4 |
| 57 | +// CHECK-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP3]], 1 |
| 58 | +// CHECK-NEXT: store i32 [[INC6]], ptr [[I1]], align 4 |
| 59 | +// CHECK-NEXT: br label %[[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]] |
| 60 | +// CHECK: [[FOR_END7]]: |
| 61 | +// CHECK: ret void |
| 62 | + |
| 63 | +void func2() { |
| 64 | +#pragma omp metadirective when(user = {condition(1)} \ |
| 65 | + : parallel for) otherwise() |
| 66 | + for (int i = 0; i < 100; i++) |
| 67 | + ; |
| 68 | + |
| 69 | +#pragma omp metadirective when(user = {condition(1)} \ |
| 70 | + : parallel for) |
| 71 | + for (int i = 0; i < 100; i++) |
| 72 | + ; |
| 73 | +} |
| 74 | + |
| 75 | +// CHECK-LABEL: define dso_local void @_Z5func2v() |
| 76 | +// CHECK: entry |
| 77 | +// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @_Z5func2v.omp_outlined) |
| 78 | +// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @_Z5func2v.omp_outlined.1) |
| 79 | +// CHECK-NEXT: ret void |
| 80 | + |
| 81 | + |
| 82 | +void func3() { |
| 83 | +#pragma omp metadirective when(user = {condition(0)} \ |
| 84 | + : parallel for) \ |
| 85 | + when(implementation = {extension(match_none)} \ |
| 86 | + : parallel) default(parallel for) |
| 87 | + |
| 88 | + for (int i = 0; i < 100; i++) |
| 89 | + ; |
| 90 | + |
| 91 | +} |
| 92 | + |
| 93 | +// CHECK-LABEL: define dso_local void @_Z5func3v() |
| 94 | +// CHECK: entry |
| 95 | +// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 0, ptr @_Z5func3v.omp_outlined) |
| 96 | +// CHECK-NEXT: ret void |
| 97 | +// CHECK-NEXT: } |
| 98 | + |
| 99 | +// CHECK-LABEL: define internal void @_Z5func3v.omp_outlined |
| 100 | +// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], |
| 101 | +// CHECK-SAME: ptr noalias noundef [[DOTBOUND_TID_:%.*]]) |
| 102 | +// CHECK-NEXT: entry |
| 103 | +// CHECK-NEXT: [[GLOB_TID__ADDR:%.*]] = alloca ptr, align 8 |
| 104 | +// CHECK-NEXT: [[BOUND_TID__ADDR:%.*]] = alloca ptr, align 8 |
| 105 | +// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 |
| 106 | +// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[GLOB_TID__ADDR]], align 8 |
| 107 | +// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[BOUND_TID__ADDR]], align 8 |
| 108 | +// CHECK-NEXT: store i32 0, ptr [[I]], align 4 |
| 109 | +// CHECK-NEXT: br label %for.cond |
| 110 | +// CHECK:for.cond: |
| 111 | +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4 |
| 112 | +// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100 |
| 113 | +// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] |
| 114 | +// CHECK:for.body: |
| 115 | +// CHECK-NEXT: br label [[FOR_INC:%.*]] |
| 116 | +// CHECK:for.inc: |
| 117 | +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4 |
| 118 | +// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 |
| 119 | +// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4 |
| 120 | +// CHECK-NEXT: br label [[FOR_COND:%.*]] |
| 121 | +// CHECK:for.end: |
| 122 | +// CHECK-NEXT: ret void |
| 123 | +// CHECK-NEXT:} |
| 124 | + |
| 125 | +#endif |
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