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DAG: Lower fcNormal is.fpclass to compare with inf
Looks worse for x86 without the fabs check. Not sure if this is useful for any targets.
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llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

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@@ -8652,6 +8652,31 @@ SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op,
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return DAG.getSetCC(DL, ResultVT, Op, Inf,
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IsOrdered ? OrderedCmpOpcode : UnorderedCmpOpcode);
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}
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if (FPTestMask == fcNormal) {
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// TODO: Handle unordered
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ISD::CondCode IsFiniteOp = IsInvertedFP ? ISD::SETUGE : ISD::SETOLT;
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ISD::CondCode IsNormalOp = IsInvertedFP ? ISD::SETOLT : ISD::SETUGE;
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if (isCondCodeLegalOrCustom(IsFiniteOp,
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OperandVT.getScalarType().getSimpleVT()) &&
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isCondCodeLegalOrCustom(IsNormalOp,
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OperandVT.getScalarType().getSimpleVT()) &&
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isFAbsFree(OperandVT)) {
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// isnormal(x) --> fabs(x) < infinity && !(fabs(x) < smallest_normal)
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SDValue Inf =
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DAG.getConstantFP(APFloat::getInf(Semantics), DL, OperandVT);
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SDValue SmallestNormal = DAG.getConstantFP(
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APFloat::getSmallestNormalized(Semantics), DL, OperandVT);
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SDValue Abs = DAG.getNode(ISD::FABS, DL, OperandVT, Op);
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SDValue IsFinite = DAG.getSetCC(DL, ResultVT, Abs, Inf, IsFiniteOp);
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SDValue IsNormal =
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DAG.getSetCC(DL, ResultVT, Abs, SmallestNormal, IsNormalOp);
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unsigned LogicOp = IsInvertedFP ? ISD::OR : ISD::AND;
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return DAG.getNode(LogicOp, DL, ResultVT, IsFinite, IsNormal);
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}
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}
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}
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// Some checks may be represented as inversion of simpler check, for example

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