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HanKuanChenHanKuanChen
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[SLP][REVEC] Fix the number of elements in the mask of a ShuffleVectorInst is not a power of 2. (#119689)
The following shufflevector should not be vectorized when slp-vectorize-non-power-of-2 is enabled. shufflevector <8 x float> %1, <8 x float> poison, <3 x i32> <i32 0, i32 1, i32 2> shufflevector <8 x float> %1, <8 x float> poison, <3 x i32> <i32 4, i32 5, i32 6>
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‎llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

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Original file line numberDiff line numberDiff line change
@@ -344,6 +344,8 @@ static unsigned getShufflevectorNumGroups(ArrayRef<Value *> VL) {
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unsigned SVNumElements =
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cast<FixedVectorType>(SV->getOperand(0)->getType())->getNumElements();
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unsigned ShuffleMaskSize = SV->getShuffleMask().size();
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if (SVNumElements % ShuffleMaskSize != 0)
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return 0;
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unsigned GroupSize = SVNumElements / ShuffleMaskSize;
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if (GroupSize == 0 || (VL.size() % GroupSize) != 0)
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return 0;

‎llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll

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@@ -1,5 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2-
; RUN: opt -mtriple=riscv64 -mcpu=sifive-x280 -passes=slp-vectorizer -S -slp-revec -slp-max-reg-size=1024 -slp-threshold=-100 %s | FileCheck %s
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; RUN: opt -mtriple=riscv64 -mcpu=sifive-x280 -passes=slp-vectorizer -S -slp-revec -slp-max-reg-size=1024 -slp-threshold=-100 %s | FileCheck --check-prefixes=CHECK,POWEROF2 %s
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; RUN: opt -mtriple=riscv64 -mcpu=sifive-x280 -passes=slp-vectorizer -S -slp-revec -slp-max-reg-size=1024 -slp-threshold=-100 -slp-vectorize-non-power-of-2 %s | FileCheck --check-prefixes=CHECK,NONPOWEROF2 %s
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define i32 @test() {
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; CHECK-LABEL: @test(
@@ -134,3 +135,99 @@ for.body:
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%6 = select <2 x i1> %4, <2 x float> %3, <2 x float> zeroinitializer
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br label %for.cond.cleanup
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}
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define ptr @test4() {
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; POWEROF2-LABEL: @test4(
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; POWEROF2-NEXT: [[TMP1:%.*]] = fadd <8 x float> zeroinitializer, zeroinitializer
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; POWEROF2-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <2 x i32> <i32 1, i32 2>
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; POWEROF2-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <2 x i32> <i32 5, i32 6>
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; POWEROF2-NEXT: [[TMP4:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <2 x i32> <i32 4, i32 0>
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; POWEROF2-NEXT: [[TMP5:%.*]] = call <4 x float> @llvm.vector.insert.v4f32.v2f32(<4 x float> poison, <2 x float> [[TMP2]], i64 0)
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; POWEROF2-NEXT: [[TMP6:%.*]] = call <4 x float> @llvm.vector.insert.v4f32.v2f32(<4 x float> [[TMP5]], <2 x float> [[TMP3]], i64 2)
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; POWEROF2-NEXT: br label [[TMP8:%.*]]
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; POWEROF2: 7:
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; POWEROF2-NEXT: br label [[TMP8]]
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; POWEROF2: 8:
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; POWEROF2-NEXT: [[TMP9:%.*]] = phi <2 x float> [ poison, [[TMP7:%.*]] ], [ [[TMP4]], [[TMP0:%.*]] ]
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; POWEROF2-NEXT: [[TMP10:%.*]] = phi <4 x float> [ poison, [[TMP7]] ], [ [[TMP6]], [[TMP0]] ]
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; POWEROF2-NEXT: br label [[TMP11:%.*]]
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; POWEROF2: 11:
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; POWEROF2-NEXT: [[TMP12:%.*]] = call <2 x float> @llvm.vector.extract.v2f32.v4f32(<4 x float> [[TMP10]], i64 0)
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; POWEROF2-NEXT: [[TMP13:%.*]] = fmul <2 x float> [[TMP12]], zeroinitializer
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; POWEROF2-NEXT: [[TMP14:%.*]] = call <2 x float> @llvm.vector.extract.v2f32.v4f32(<4 x float> [[TMP10]], i64 2)
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; POWEROF2-NEXT: [[TMP15:%.*]] = fmul <2 x float> zeroinitializer, [[TMP14]]
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; POWEROF2-NEXT: [[TMP16:%.*]] = extractelement <2 x float> [[TMP9]], i32 1
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; POWEROF2-NEXT: [[TMP17:%.*]] = fmul float 0.000000e+00, [[TMP16]]
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; POWEROF2-NEXT: [[TMP18:%.*]] = extractelement <2 x float> [[TMP9]], i32 0
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; POWEROF2-NEXT: [[TMP19:%.*]] = fmul float [[TMP18]], 0.000000e+00
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; POWEROF2-NEXT: [[TMP20:%.*]] = extractelement <2 x float> [[TMP13]], i32 0
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; POWEROF2-NEXT: [[TMP21:%.*]] = fadd reassoc nsz float [[TMP20]], [[TMP17]]
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; POWEROF2-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[TMP15]], i32 0
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; POWEROF2-NEXT: [[TMP23:%.*]] = fadd reassoc nsz float [[TMP22]], [[TMP19]]
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; POWEROF2-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[TMP13]], i32 1
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; POWEROF2-NEXT: [[TMP25:%.*]] = fadd reassoc nsz float [[TMP21]], [[TMP24]]
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; POWEROF2-NEXT: [[TMP26:%.*]] = extractelement <2 x float> [[TMP15]], i32 1
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; POWEROF2-NEXT: [[TMP27:%.*]] = fadd reassoc nsz float [[TMP23]], [[TMP26]]
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; POWEROF2-NEXT: [[TMP28:%.*]] = tail call float @llvm.sqrt.f32(float [[TMP25]])
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; POWEROF2-NEXT: [[TMP29:%.*]] = tail call float @llvm.sqrt.f32(float [[TMP27]])
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; POWEROF2-NEXT: ret ptr null
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;
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; NONPOWEROF2-LABEL: @test4(
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; NONPOWEROF2-NEXT: [[TMP1:%.*]] = fadd <8 x float> zeroinitializer, zeroinitializer
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; NONPOWEROF2-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <3 x i32> <i32 0, i32 1, i32 2>
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; NONPOWEROF2-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <3 x i32> <i32 4, i32 5, i32 6>
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; NONPOWEROF2-NEXT: [[TMP4:%.*]] = call <6 x float> @llvm.vector.insert.v6f32.v3f32(<6 x float> poison, <3 x float> [[TMP2]], i64 0)
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; NONPOWEROF2-NEXT: [[TMP5:%.*]] = call <6 x float> @llvm.vector.insert.v6f32.v3f32(<6 x float> [[TMP4]], <3 x float> [[TMP3]], i64 3)
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; NONPOWEROF2-NEXT: br label [[TMP7:%.*]]
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; NONPOWEROF2: 6:
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; NONPOWEROF2-NEXT: br label [[TMP7]]
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; NONPOWEROF2: 7:
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; NONPOWEROF2-NEXT: [[TMP8:%.*]] = phi <6 x float> [ poison, [[TMP6:%.*]] ], [ [[TMP5]], [[TMP0:%.*]] ]
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; NONPOWEROF2-NEXT: br label [[TMP9:%.*]]
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; NONPOWEROF2: 9:
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; NONPOWEROF2-NEXT: [[TMP10:%.*]] = call <3 x float> @llvm.vector.extract.v3f32.v6f32(<6 x float> [[TMP8]], i64 0)
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; NONPOWEROF2-NEXT: [[TMP11:%.*]] = fmul <3 x float> zeroinitializer, [[TMP10]]
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; NONPOWEROF2-NEXT: [[TMP12:%.*]] = call <3 x float> @llvm.vector.extract.v3f32.v6f32(<6 x float> [[TMP8]], i64 3)
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; NONPOWEROF2-NEXT: [[TMP13:%.*]] = fmul <3 x float> zeroinitializer, [[TMP12]]
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; NONPOWEROF2-NEXT: [[TMP14:%.*]] = call reassoc nsz float @llvm.vector.reduce.fadd.v3f32(float 0.000000e+00, <3 x float> [[TMP11]])
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; NONPOWEROF2-NEXT: [[TMP15:%.*]] = call reassoc nsz float @llvm.vector.reduce.fadd.v3f32(float 0.000000e+00, <3 x float> [[TMP13]])
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; NONPOWEROF2-NEXT: [[TMP16:%.*]] = tail call float @llvm.sqrt.f32(float [[TMP14]])
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; NONPOWEROF2-NEXT: [[TMP17:%.*]] = tail call float @llvm.sqrt.f32(float [[TMP15]])
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; NONPOWEROF2-NEXT: ret ptr null
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;
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%1 = fadd <8 x float> zeroinitializer, zeroinitializer
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%2 = extractelement <8 x float> %1, i64 0
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%3 = extractelement <8 x float> %1, i64 1
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%4 = extractelement <8 x float> %1, i64 2
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%5 = extractelement <8 x float> %1, i64 4
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%6 = extractelement <8 x float> %1, i64 5
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%7 = extractelement <8 x float> %1, i64 6
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br label %9
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8:
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br label %9
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9:
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%10 = phi float [ 0.000000e+00, %8 ], [ %7, %0 ]
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%11 = phi float [ 0.000000e+00, %8 ], [ %6, %0 ]
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%12 = phi float [ 0.000000e+00, %8 ], [ %5, %0 ]
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%13 = phi float [ 0.000000e+00, %8 ], [ %4, %0 ]
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%14 = phi float [ 0.000000e+00, %8 ], [ %3, %0 ]
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%15 = phi float [ 0.000000e+00, %8 ], [ %2, %0 ]
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br label %16
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16:
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%17 = fmul float %14, 0.000000e+00
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%18 = fmul float 0.000000e+00, %11
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%19 = fmul float 0.000000e+00, %15
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%20 = fmul float %12, 0.000000e+00
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%21 = fadd reassoc nsz float %17, %19
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%22 = fadd reassoc nsz float %18, %20
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%23 = fmul float %13, 0.000000e+00
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%24 = fmul float %10, 0.000000e+00
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%25 = fadd reassoc nsz float %21, %23
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%26 = fadd reassoc nsz float %22, %24
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%27 = tail call float @llvm.sqrt.f32(float %25)
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%28 = tail call float @llvm.sqrt.f32(float %26)
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ret ptr null
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}

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