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Revert "[AArch64] Add intrinsics for multi-vector to ZA array vector accumulators" (#91597)
Reverts #88266 due to test failures error: 'expected-error' diagnostics seen but not expected: (frontend): '-fsyntax-only' action ignored; '-emit-llvm' action specified previously
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clang/include/clang/Basic/arm_sme.td

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@@ -298,16 +298,6 @@ multiclass ZAAddSub<string n_suffix> {
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def NAME # _ZA64_VG1X2_F64 : Inst<"sv" # n_suffix # "_za64[_{d}]_vg1x2", "vm2", "d", MergeNone, "aarch64_sme_" # n_suffix # "_za64_vg1x2", [IsStreaming, IsInOutZA], []>;
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def NAME # _ZA64_VG1X4_F64 : Inst<"sv" # n_suffix # "_za64[_{d}]_vg1x4", "vm4", "d", MergeNone, "aarch64_sme_" # n_suffix # "_za64_vg1x4", [IsStreaming, IsInOutZA], []>;
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}
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let TargetGuard = "sme-f16f16|sme-f8f16" in {
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def NAME # _ZA16_VG1X2_F16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x2", "vm2", "h", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x2", [IsStreaming, IsInOutZA], []>;
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def NAME # _ZA16_VG1X4_F16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x4", "vm4", "h", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x4", [IsStreaming, IsInOutZA], []>;
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}
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let TargetGuard = "sme2,b16b16" in {
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def NAME # _ZA16_VG1X2_BF16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x2", "vm2", "b", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x2", [IsStreaming, IsInOutZA], []>;
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def NAME # _ZA16_VG1X4_BF16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x4", "vm4", "b", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x4", [IsStreaming, IsInOutZA], []>;
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}
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}
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defm SVADD : ZAAddSub<"add">;

clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c

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clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c

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llvm/include/llvm/IR/IntrinsicsAArch64.td

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@@ -3481,7 +3481,7 @@ let TargetPrefix = "aarch64" in {
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// Multi-vector add/sub and accumulate into ZA
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//
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foreach intr = ["add", "sub"] in {
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foreach za = ["za16","za32", "za64"] in {
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foreach za = ["za32", "za64"] in {
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def int_aarch64_sme_ # intr # _ # za # _vg1x2 : SME2_ZA_Write_VG2_Intrinsic;
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def int_aarch64_sme_ # intr # _ # za # _vg1x4 : SME2_ZA_Write_VG4_Intrinsic;
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}

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