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[RISCV] Use Root instead of N throughout the worklist loop in combineBinOp_VLToVWBinOp_VL. (#99416)
We were only checking that the node from the worklist is a supported root. We weren't checking the strategy or any of its operands unless it was the original node. For any other node, we just rechecked the original node's strategy and operands. The effect of this is that we don't do all of the transformations at once. Instead, when there were multiple possible nodes to transform we would only do them as each node was visited by the main DAG combine worklist. The test shows a case where we widened an instruction without removing all of the uses of the vsext. The sext is shared by one node that shares another sext node with the root another node that doesn't share anything with the root.
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2 files changed

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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -14998,8 +14998,8 @@ static SDValue combineBinOp_VLToVWBinOp_VL(SDNode *N,
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if (!NodeExtensionHelper::isSupportedRoot(Root, Subtarget))
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return SDValue();
1500015000

15001-
NodeExtensionHelper LHS(N, 0, DAG, Subtarget);
15002-
NodeExtensionHelper RHS(N, 1, DAG, Subtarget);
15001+
NodeExtensionHelper LHS(Root, 0, DAG, Subtarget);
15002+
NodeExtensionHelper RHS(Root, 1, DAG, Subtarget);
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auto AppendUsersIfNeeded = [&Worklist,
1500415004
&Inserted](const NodeExtensionHelper &Op) {
1500515005
if (Op.needToPromoteOtherUsers()) {
@@ -15016,18 +15016,18 @@ static SDValue combineBinOp_VLToVWBinOp_VL(SDNode *N,
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return SDValue();
1501715017

1501815018
SmallVector<NodeExtensionHelper::CombineToTry> FoldingStrategies =
15019-
NodeExtensionHelper::getSupportedFoldings(N);
15019+
NodeExtensionHelper::getSupportedFoldings(Root);
1502015020

1502115021
assert(!FoldingStrategies.empty() && "Nothing to be folded");
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bool Matched = false;
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for (int Attempt = 0;
15024-
(Attempt != 1 + NodeExtensionHelper::isCommutative(N)) && !Matched;
15024+
(Attempt != 1 + NodeExtensionHelper::isCommutative(Root)) && !Matched;
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++Attempt) {
1502615026

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for (NodeExtensionHelper::CombineToTry FoldingStrategy :
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FoldingStrategies) {
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std::optional<CombineResult> Res =
15030-
FoldingStrategy(N, LHS, RHS, DAG, Subtarget);
15030+
FoldingStrategy(Root, LHS, RHS, DAG, Subtarget);
1503115031
if (Res) {
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Matched = true;
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CombinesToApply.push_back(*Res);

llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -882,3 +882,41 @@ define <2 x i64> @vwmul_vx_v2i64_i64(ptr %x, ptr %y) {
882882
%g = mul <2 x i64> %e, %f
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ret <2 x i64> %g
884884
}
885+
886+
define <2 x i16> @vwmul_v2i16_multiuse(ptr %x, ptr %y, ptr %z, ptr %w) {
887+
; CHECK-LABEL: vwmul_v2i16_multiuse:
888+
; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
890+
; CHECK-NEXT: vle8.v v8, (a1)
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; CHECK-NEXT: vle8.v v9, (a2)
892+
; CHECK-NEXT: vle8.v v10, (a3)
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; CHECK-NEXT: vle8.v v11, (a0)
894+
; CHECK-NEXT: vsext.vf2 v12, v8
895+
; CHECK-NEXT: vsext.vf2 v8, v9
896+
; CHECK-NEXT: vsext.vf2 v9, v10
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; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
898+
; CHECK-NEXT: vwmul.vv v13, v11, v10
899+
; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
900+
; CHECK-NEXT: vmul.vv v9, v12, v9
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; CHECK-NEXT: vdivu.vv v8, v12, v8
902+
; CHECK-NEXT: vor.vv v9, v13, v9
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; CHECK-NEXT: vor.vv v8, v9, v8
904+
; CHECK-NEXT: ret
905+
%a = load <2 x i8>, ptr %x
906+
%b = load <2 x i8>, ptr %y
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%c = load <2 x i8>, ptr %z
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%d = load <2 x i8>, ptr %w
909+
910+
%as = sext <2 x i8> %a to <2 x i16>
911+
%bs = sext <2 x i8> %b to <2 x i16>
912+
%cs = sext <2 x i8> %c to <2 x i16>
913+
%ds = sext <2 x i8> %d to <2 x i16>
914+
915+
%e = mul <2 x i16> %as, %ds
916+
%f = mul <2 x i16> %bs, %ds ; shares 1 use with %e
917+
%g = udiv <2 x i16> %bs, %cs ; shares 1 use with %f, and no uses with %e
918+
919+
%h = or <2 x i16> %e, %f
920+
%i = or <2 x i16> %h, %g
921+
ret <2 x i16> %i
922+
}

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