Skip to content

Commit 0ba006d

Browse files
jdeguirejdeguire
authored
[MIPS] Fix error messages when rejecting certain assembly not supported by ISA (#94695)
… instructions. This is a fix I stumbled upon while working on something else. I decided to break it out since it seems like a good "first issue" to submit. I updated the comments in the "wrong error" test files to indicate that the messages are no longer incorrect, but I left the names of the test files alone. I was not sure what to do with those, so I would appreciate thoughts or guidance.
1 parent 7e8aba2 commit 0ba006d

19 files changed

+162
-158
lines changed

‎llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6410,7 +6410,12 @@ bool MipsAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
64106410

64116411
// Check if the current operand has a custom associated parser, if so, try to
64126412
// custom parse the operand, or fallback to the general approach.
6413-
ParseStatus Res = MatchOperandParserImpl(Operands, Mnemonic);
6413+
// Setting the third parameter to true tells the parser to keep parsing even
6414+
// if the operands are not supported with the current feature set. In this
6415+
// case, the instruction matcher will output a "instruction requires a CPU
6416+
// feature not currently enabled" error. If this were false, the parser would
6417+
// stop here and output a less useful "invalid operand" error.
6418+
ParseStatus Res = MatchOperandParserImpl(Operands, Mnemonic, true);
64146419
if (Res.isSuccess())
64156420
return false;
64166421
// If there wasn't a custom match, try the generic matcher below. Otherwise,

‎llvm/test/MC/Mips/cnmips/invalid-wrong-error.s

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,10 @@
1+
# These were correctly rejected as not being supported but the wrong
2+
# error message was emitted.
13
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=octeon 2>%t1
24
# RUN: FileCheck %s < %t1
35

46
.set noat
5-
lwc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction
6-
swc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction
7-
ldc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction
8-
sdc3 $4, 0($5) # CHECK: :{{[0-9]+}}:{{[0-9]+}}: error: invalid operand for instruction
7+
lwc3 $4, 0($5) # CHECK: :[[#]]:[[#]]: error: instruction requires a CPU feature not currently enabled
8+
swc3 $4, 0($5) # CHECK: :[[#]]:[[#]]: error: instruction requires a CPU feature not currently enabled
9+
ldc3 $4, 0($5) # CHECK: :[[#]]:[[#]]: error: instruction requires a CPU feature not currently enabled
10+
sdc3 $4, 0($5) # CHECK: :[[#]]:[[#]]: error: instruction requires a CPU feature not currently enabled

‎llvm/test/MC/Mips/eva/invalid-noeva-wrong-error.s

Lines changed: 50 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
# invalid operand for instructions that are invalid without -mattr=+eva flag and
2-
# are correctly rejected but use the wrong error message at the moment.
1+
# Instructions that are invalid without -mattr=+eva flag. These were rejected
2+
# correctly but used to emit an incorrect error message.
33
#
44
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r2 2>%t1
55
# RUN: FileCheck %s < %t1
@@ -19,51 +19,51 @@
1919
# RUN: FileCheck %s < %t1
2020

2121
.set noat
22-
cachee 31, 255($7) # CHECK: :[[@LINE]]:23: error: invalid operand for instruction
23-
cachee 0, -256($4) # CHECK: :[[@LINE]]:22: error: invalid operand for instruction
24-
cachee 5, -140($4) # CHECK: :[[@LINE]]:22: error: invalid operand for instruction
25-
lbe $10,-256($25) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
26-
lbe $13,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
27-
lbe $11,146($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
28-
lbue $13,-256($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
29-
lbue $13,255($v0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
30-
lbue $13,-190($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
31-
lhe $13,-256($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
32-
lhe $12,255($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
33-
lhe $13,81($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
34-
lhue $s2,-256($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
35-
lhue $s2,255($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
36-
lhue $s6,-168($v0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
37-
lle $v0,-256($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
38-
lle $v1,255($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
39-
lle $v1,-71($s6) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
40-
lwe $15,255($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
41-
lwe $13,-256($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
42-
lwe $15,-200($a1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
43-
lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
44-
lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
45-
lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
46-
lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
47-
lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
48-
lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
49-
prefe 14, -256($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
50-
prefe 11, 255($3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
51-
prefe 14, -37($3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
52-
sbe $s1,255($11) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
53-
sbe $s1,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
54-
sbe $s3,0($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
55-
sce $9,255($s2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
56-
sce $12,-256($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
57-
sce $13,-31($s7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
58-
she $14,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
59-
she $14,-256($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
60-
she $9,235($11) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
61-
swe $ra,255($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
62-
swe $ra,-256($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
63-
swe $ra,-53($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
64-
swle $9,255($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
65-
swle $10,-256($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
66-
swle $8,131($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
67-
swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
68-
swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
69-
swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
22+
cachee 31, 255($7) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
23+
cachee 0, -256($4) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
24+
cachee 5, -140($4) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
25+
lbe $10,-256($25) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
26+
lbe $13,255($15) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
27+
lbe $11,146($14) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
28+
lbue $13,-256($v1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
29+
lbue $13,255($v0) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
30+
lbue $13,-190($v1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
31+
lhe $13,-256($s5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
32+
lhe $12,255($s0) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
33+
lhe $13,81($s0) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
34+
lhue $s2,-256($v1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
35+
lhue $s2,255($v1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
36+
lhue $s6,-168($v0) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
37+
lle $v0,-256($s5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
38+
lle $v1,255($s3) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
39+
lle $v1,-71($s6) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
40+
lwe $15,255($a2) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
41+
lwe $13,-256($a2) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
42+
lwe $15,-200($a1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
43+
lwle $s6,255($15) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
44+
lwle $s7,-256($10) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
45+
lwle $s7,-176($13) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
46+
lwre $zero,255($gp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
47+
lwre $zero,-256($gp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
48+
lwre $zero,-176($gp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
49+
prefe 14, -256($2) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
50+
prefe 11, 255($3) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
51+
prefe 14, -37($3) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
52+
sbe $s1,255($11) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
53+
sbe $s1,-256($10) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
54+
sbe $s3,0($14) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
55+
sce $9,255($s2) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
56+
sce $12,-256($s5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
57+
sce $13,-31($s7) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
58+
she $14,255($15) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
59+
she $14,-256($15) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
60+
she $9,235($11) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
61+
swe $ra,255($sp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
62+
swe $ra,-256($sp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
63+
swe $ra,-53($sp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
64+
swle $9,255($s1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
65+
swle $10,-256($s3) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
66+
swle $8,131($s5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
67+
swre $s4,255($13) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
68+
swre $s4,-256($13) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
69+
swre $s2,86($14) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled

‎llvm/test/MC/Mips/eva/invalid_R6.s

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -6,18 +6,18 @@
66
# RUN: FileCheck %s < %t1
77

88
.set noat
9-
lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10-
lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11-
lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12-
lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13-
lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14-
lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15-
swle $9,255($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16-
swle $10,-256($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17-
swle $8,131($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
18-
swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
19-
swre $s4,-256($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
20-
swre $s2,86($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9+
lwle $s6,255($15) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
10+
lwle $s7,-256($10) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
11+
lwle $s7,-176($13) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
12+
lwre $zero,255($gp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
13+
lwre $zero,-256($gp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
14+
lwre $zero,-176($gp) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
15+
swle $9,255($s1) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
16+
swle $10,-256($s3) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
17+
swle $8,131($s5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
18+
swre $s4,255($13) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
19+
swre $s4,-256($13) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
20+
swre $s2,86($14) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
2121
lle $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid register number
2222
lle $4, 8($33) # CHECK: :[[@LINE]]:25: error: invalid register number
2323
lle $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset

‎llvm/test/MC/Mips/micromips32r6/invalid-wrong-error.s

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
1-
# Instructions that are correctly rejected but emit a wrong or misleading error.
1+
# Instructions that were correctly rejected but used to emit a wrong or
2+
# misleading error.
23
# RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r6 -mattr=micromips 2>%t1
34
# RUN: FileCheck %s < %t1
45

@@ -28,7 +29,7 @@
2829
sc $4, -513($5) # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
2930
ll $4, 512($5) # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
3031
ll $4, -513($5) # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
31-
lwr $4, 1($5) # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
32-
lwl $4, 1($5) # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
33-
swr $4, 1($5) # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
34-
swl $4, 1($5) # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
32+
lwr $4, 1($5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
33+
lwl $4, 1($5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
34+
swr $4, 1($5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled
35+
swl $4, 1($5) # CHECK: :[[#@LINE]]:[[#]]: error: instruction requires a CPU feature not currently enabled

0 commit comments

Comments
 (0)