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[AMDGPU] Assert if stack grows downwards. (#119888)
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2 files changed

+5
-7
lines changed

2 files changed

+5
-7
lines changed

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1181,8 +1181,8 @@ bool AMDGPURegisterBankInfo::applyMappingDynStackAlloc(
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// Guard in case the stack growth direction ever changes with scratch
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// instructions.
1184-
if (TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown)
1185-
return false;
1184+
assert(TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
1185+
"Stack grows upwards for AMDGPU");
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11871187
Register Dst = MI.getOperand(0).getReg();
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Register AllocSize = MI.getOperand(1).getReg();

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4041,17 +4041,15 @@ SDValue SITargetLowering::lowerDYNAMIC_STACKALLOCImpl(SDValue Op,
40414041
Chain = SP.getValue(1);
40424042
MaybeAlign Alignment = cast<ConstantSDNode>(Tmp3)->getMaybeAlignValue();
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const TargetFrameLowering *TFL = Subtarget->getFrameLowering();
4044-
unsigned Opc =
4045-
TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp
4046-
? ISD::ADD
4047-
: ISD::SUB;
4044+
assert(TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
4045+
"Stack grows upwards for AMDGPU");
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40494047
SDValue ScaledSize = DAG.getNode(
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ISD::SHL, dl, VT, Size,
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DAG.getConstant(Subtarget->getWavefrontSizeLog2(), dl, MVT::i32));
40524050

40534051
Align StackAlign = TFL->getStackAlign();
4054-
Tmp1 = DAG.getNode(Opc, dl, VT, SP, ScaledSize); // Value
4052+
Tmp1 = DAG.getNode(ISD::ADD, dl, VT, SP, ScaledSize); // Value
40554053
if (Alignment && *Alignment > StackAlign) {
40564054
Tmp1 = DAG.getNode(
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ISD::AND, dl, VT, Tmp1,

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