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[RISCV] Remove unneeded casts from int64_t to uint64_t in RISCVMatInt.cpp. NFC
Most of these were to avoid undefined behavior if a shift left changed the sign of the result. I don't think its possible to change the sign of the result here. We're shifting left by 12 after an arithmetic right shift by more than 12. The bits we are shifting out with the left shift are guaranteed to be sign bits. Also use SignExtend64<32> to force upper bits to all 1s instead of an Or. We know the value isUInt<32> && !isInt<32> which means bit 31 is set.
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llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -115,30 +115,29 @@ static void generateInstSeqImpl(int64_t Val, const MCSubtargetInfo &STI,
115115
Val >>= ShiftAmount;
116116

117117
// If the remaining bits don't fit in 12 bits, we might be able to reduce
118-
// the // shift amount in order to use LUI which will zero the lower 12
119-
// bits.
118+
// the shift amount in order to use LUI which will zero the lower 12 bits.
120119
if (ShiftAmount > 12 && !isInt<12>(Val)) {
121-
if (isInt<32>((uint64_t)Val << 12)) {
120+
if (isInt<32>(Val << 12)) {
122121
// Reduce the shift amount and add zeros to the LSBs so it will match
123122
// LUI.
124123
ShiftAmount -= 12;
125-
Val = (uint64_t)Val << 12;
126-
} else if (isUInt<32>((uint64_t)Val << 12) &&
124+
Val = Val << 12;
125+
} else if (isUInt<32>(Val << 12) &&
127126
STI.hasFeature(RISCV::FeatureStdExtZba)) {
128127
// Reduce the shift amount and add zeros to the LSBs so it will match
129128
// LUI, then shift left with SLLI.UW to clear the upper 32 set bits.
130129
ShiftAmount -= 12;
131-
Val = ((uint64_t)Val << 12) | (0xffffffffull << 32);
130+
Val = SignExtend64<32>(Val << 12);
132131
Unsigned = true;
133132
}
134133
}
135134

136135
// Try to use SLLI_UW for Val when it is uint32 but not int32.
137-
if (isUInt<32>((uint64_t)Val) && !isInt<32>((uint64_t)Val) &&
136+
if (isUInt<32>(Val) && !isInt<32>(Val) &&
138137
STI.hasFeature(RISCV::FeatureStdExtZba)) {
139-
// Use LUI+ADDI or LUI to compose, then clear the upper 32 bits with
138+
// Use LUI+ADDI(W) or LUI to compose, then clear the upper 32 bits with
140139
// SLLI_UW.
141-
Val = ((uint64_t)Val) | (0xffffffffull << 32);
140+
Val = SignExtend64<32>(Val);
142141
Unsigned = true;
143142
}
144143
}

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