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[test][lsr] Add term-folding test cases with estimated trip counts
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‎llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll

+115-1
Original file line numberDiff line numberDiff line change
@@ -453,7 +453,7 @@ define void @non_branch_terminator(ptr %a) {
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; CHECK-NEXT: [[UGLYGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i64 4
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; CHECK-NEXT: [[LSR_IV_NEXT3]] = add nsw i64 [[LSR_IV2]], -1
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; CHECK-NEXT: switch i64 [[LSR_IV2]], label [[FOR_BODY]] [
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; CHECK-NEXT: i64 0, label [[FOR_END:%.*]]
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; CHECK-NEXT: i64 0, label [[FOR_END:%.*]]
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; CHECK-NEXT: ]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
@@ -473,3 +473,117 @@ for.body: ; preds = %for.body, %entry
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for.end: ; preds = %for.body
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ret void
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}
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define void @expensive_expand_short_tc(ptr %a, i32 %offset, i32 %n) {
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; CHECK-LABEL: @expensive_expand_short_tc(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 84
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[OFFSET:%.*]] to i64
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; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[TMP4]], 84
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[UGLYGEP2:%.*]], [[FOR_BODY]] ], [ [[UGLYGEP]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: store i32 1, ptr [[LSR_IV1]], align 4
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; CHECK-NEXT: [[UGLYGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i32 [[OFFSET]]
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; CHECK-NEXT: [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND:%.*]] = icmp eq ptr [[UGLYGEP2]], [[SCEVGEP]]
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; CHECK-NEXT: br i1 [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !prof [[PROF0:![0-9]+]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%uglygep = getelementptr i8, ptr %a, i64 84
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%lsr.iv1 = phi ptr [ %uglygep2, %for.body ], [ %uglygep, %entry ]
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%lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 0, %entry ]
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store i32 1, ptr %lsr.iv1, align 4
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%lsr.iv.next = add nsw i32 %lsr.iv, 1
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%uglygep2 = getelementptr i8, ptr %lsr.iv1, i32 %offset
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%exitcond.not = icmp eq i32 %lsr.iv.next, %n
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br i1 %exitcond.not, label %for.end, label %for.body, !prof !{!"branch_weights", i32 1, i32 3}
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for.end: ; preds = %for.body
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ret void
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}
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define void @expensive_expand_long_tc(ptr %a, i32 %offset, i32 %n) {
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; CHECK-LABEL: @expensive_expand_long_tc(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 84
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[OFFSET:%.*]] to i64
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; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[TMP4]], 84
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[UGLYGEP2:%.*]], [[FOR_BODY]] ], [ [[UGLYGEP]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: store i32 1, ptr [[LSR_IV1]], align 4
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; CHECK-NEXT: [[UGLYGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i32 [[OFFSET]]
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; CHECK-NEXT: [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND:%.*]] = icmp eq ptr [[UGLYGEP2]], [[SCEVGEP]]
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; CHECK-NEXT: br i1 [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !prof [[PROF1:![0-9]+]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%uglygep = getelementptr i8, ptr %a, i64 84
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%lsr.iv1 = phi ptr [ %uglygep2, %for.body ], [ %uglygep, %entry ]
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%lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 0, %entry ]
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store i32 1, ptr %lsr.iv1, align 4
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%lsr.iv.next = add nsw i32 %lsr.iv, 1
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%uglygep2 = getelementptr i8, ptr %lsr.iv1, i32 %offset
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%exitcond.not = icmp eq i32 %lsr.iv.next, %n
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br i1 %exitcond.not, label %for.end, label %for.body, !prof !{!"branch_weights", i32 1, i32 300}
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for.end: ; preds = %for.body
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ret void
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}
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define void @expensive_expand_unknown_tc(ptr %a, i32 %offset, i32 %n) {
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; CHECK-LABEL: @expensive_expand_unknown_tc(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 84
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
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; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[OFFSET:%.*]] to i64
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; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = add nsw i64 [[TMP4]], 84
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[UGLYGEP2:%.*]], [[FOR_BODY]] ], [ [[UGLYGEP]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: store i32 1, ptr [[LSR_IV1]], align 4
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; CHECK-NEXT: [[UGLYGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i32 [[OFFSET]]
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; CHECK-NEXT: [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND:%.*]] = icmp eq ptr [[UGLYGEP2]], [[SCEVGEP]]
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; CHECK-NEXT: br i1 [[LSR_FOLD_TERM_COND_REPLACED_TERM_COND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%uglygep = getelementptr i8, ptr %a, i64 84
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%lsr.iv1 = phi ptr [ %uglygep2, %for.body ], [ %uglygep, %entry ]
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%lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ 0, %entry ]
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store i32 1, ptr %lsr.iv1, align 4
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%lsr.iv.next = add nsw i32 %lsr.iv, 1
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%uglygep2 = getelementptr i8, ptr %lsr.iv1, i32 %offset
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%exitcond.not = icmp eq i32 %lsr.iv.next, %n
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br i1 %exitcond.not, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}

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