Skip to content

Commit 597f444

Browse files
committed
[TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
Fix: llvm/llvm-project#58843 Reviewed By: samtebbs Differential Revision: https://reviews.llvm.org/D137613
1 parent 1984f01 commit 597f444

File tree

2 files changed

+27
-1
lines changed

2 files changed

+27
-1
lines changed

llvm/lib/CodeGen/TypePromotion.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -578,7 +578,8 @@ void IRPromoter::TruncateSinks() {
578578
void IRPromoter::Cleanup() {
579579
LLVM_DEBUG(dbgs() << "IR Promotion: Cleanup..\n");
580580
// Some zexts will now have become redundant, along with their trunc
581-
// operands, so remove them
581+
// operands, so remove them.
582+
// Some zexts need to be replaced with truncate if src bitwidth is larger.
582583
for (auto *V : Visited) {
583584
if (!isa<ZExtInst>(V))
584585
continue;
@@ -593,6 +594,11 @@ void IRPromoter::Cleanup() {
593594
<< "\n");
594595
ReplaceAllUsersOfWith(ZExt, Src);
595596
continue;
597+
} else if (ZExt->getSrcTy()->getScalarSizeInBits() > PromotedWidth) {
598+
IRBuilder<> Builder{ZExt};
599+
Value *Trunc = Builder.CreateTrunc(Src, ZExt->getDestTy());
600+
ReplaceAllUsersOfWith(ZExt, Trunc);
601+
continue;
596602
}
597603

598604
// We've inserted a trunc for a zext sink, but we already know that the
Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2+
; RUN: opt -mtriple=aarch64 -type-promotion -verify -S %s -o - | FileCheck %s
3+
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
4+
5+
; Check the case don't crash due to zext source type bitwidth
6+
; larger than dest type bitwidth.
7+
define i1 @test(i8 %arg) {
8+
; CHECK-LABEL: @test(
9+
; CHECK-NEXT: [[EXT1:%.*]] = zext i8 [[ARG:%.*]] to i64
10+
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[EXT1]], 7
11+
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
12+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP2]], 0
13+
; CHECK-NEXT: ret i1 [[CMP]]
14+
;
15+
%ext1 = zext i8 %arg to i64
16+
%trunc = trunc i64 %ext1 to i3
17+
%ext2 = zext i3 %trunc to i8
18+
%cmp = icmp ne i8 %ext2, 0
19+
ret i1 %cmp
20+
}

0 commit comments

Comments
 (0)